diff options
| author | Jason Wright <jason@cvs.openbsd.org> | 2001-09-06 03:31:35 +0000 |
|---|---|---|
| committer | Jason Wright <jason@cvs.openbsd.org> | 2001-09-06 03:31:35 +0000 |
| commit | 0f12323184448a9dac888847f3eb18bb3e0b061c (patch) | |
| tree | 13672723bfafdd9e0c57c778843e623818744d3e /sys/dev/pci/hifn7751.c | |
| parent | fbd3022b65fff916be370fc0f8ec99ced09227ed (diff) | |
Rewrite interrupt handler a bit... ack interrupts sooner.
Diffstat (limited to 'sys/dev/pci/hifn7751.c')
| -rw-r--r-- | sys/dev/pci/hifn7751.c | 26 |
1 files changed, 6 insertions, 20 deletions
diff --git a/sys/dev/pci/hifn7751.c b/sys/dev/pci/hifn7751.c index 7879f0f639c..30ca41f298c 100644 --- a/sys/dev/pci/hifn7751.c +++ b/sys/dev/pci/hifn7751.c @@ -1,4 +1,4 @@ -/* $OpenBSD: hifn7751.c,v 1.102 2001/08/28 21:40:54 jason Exp $ */ +/* $OpenBSD: hifn7751.c,v 1.103 2001/09/06 03:31:34 jason Exp $ */ /* * Invertex AEON / Hifn 7751 driver @@ -1508,7 +1508,7 @@ hifn_intr(arg) { struct hifn_softc *sc = arg; struct hifn_dma *dma = sc->sc_dma; - u_int32_t dmacsr, restart, rings = 0; + u_int32_t dmacsr, restart; int i, u; dmacsr = READ_REG_1(sc, HIFN_1_DMA_CSR); @@ -1524,19 +1524,17 @@ hifn_intr(arg) if ((dmacsr & sc->sc_dmaier) == 0) return (0); + WRITE_REG_1(sc, HIFN_1_DMA_CSR, dmacsr & sc->sc_dmaier); + if ((sc->sc_flags & HIFN_HAS_PUBLIC) && - (dmacsr & HIFN_DMACSR_PUBDONE)) { - dmacsr &= ~HIFN_DMACSR_PUBDONE; + (dmacsr & HIFN_DMACSR_PUBDONE)) WRITE_REG_1(sc, HIFN_1_PUB_STATUS, READ_REG_1(sc, HIFN_1_PUB_STATUS) | HIFN_PUBSTS_DONE); - } restart = dmacsr & (HIFN_DMACSR_S_OVER | HIFN_DMACSR_D_OVER | HIFN_DMACSR_R_OVER); - if (restart) { + if (restart) printf("%s: overrun %x\n", sc->sc_dv.dv_xname, dmacsr); - WRITE_REG_1(sc, HIFN_1_DMA_CSR, restart); - } restart = dmacsr & (HIFN_DMACSR_C_ABORT | HIFN_DMACSR_S_ABORT | HIFN_DMACSR_D_ABORT | HIFN_DMACSR_R_ABORT); @@ -1546,10 +1544,6 @@ hifn_intr(arg) return (1); } - if (dma->resu > HIFN_D_RES_RSIZE) - printf("%s: Internal Error -- ring overflow\n", - sc->sc_dv.dv_xname); - if ((dmacsr & HIFN_DMACSR_C_WAIT) && (dma->cmdu == 0)) { /* * If no slots to process and we receive a "waiting on @@ -1560,7 +1554,6 @@ hifn_intr(arg) WRITE_REG_1(sc, HIFN_1_DMA_IER, sc->sc_dmaier); } - /* clear the rings */ i = dma->resk; u = dma->resu; while (u != 0) { @@ -1628,13 +1621,6 @@ hifn_intr(arg) } dma->cmdk = i; dma->cmdu = u; - /* - * Clear "result done" and "command wait" flags in status register. - * If we still have slots to process and we received a "command wait" - * interrupt, this will interupt us again. - */ - WRITE_REG_1(sc, HIFN_1_DMA_CSR, - HIFN_DMACSR_R_DONE | HIFN_DMACSR_C_WAIT | rings); return (1); } |