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authorDamien Bergamini <damien@cvs.openbsd.org>2004-10-27 21:22:15 +0000
committerDamien Bergamini <damien@cvs.openbsd.org>2004-10-27 21:22:15 +0000
commitd865a8383a71b9335c4ce381656d041fdbc03dbf (patch)
tree9968f7926cd501591643ce824179e10fd1097c34 /sys/dev/pci/if_ipwreg.h
parent8e090bce28179d99854dbc51a3e4fc7f18375d67 (diff)
Read MAC address from EEPROM in ipw_attach(). The address is now known
before the firmware has been sent. Imported from iwi.
Diffstat (limited to 'sys/dev/pci/if_ipwreg.h')
-rw-r--r--sys/dev/pci/if_ipwreg.h27
1 files changed, 25 insertions, 2 deletions
diff --git a/sys/dev/pci/if_ipwreg.h b/sys/dev/pci/if_ipwreg.h
index 7ed3149e5f2..2252fb0c1c5 100644
--- a/sys/dev/pci/if_ipwreg.h
+++ b/sys/dev/pci/if_ipwreg.h
@@ -1,4 +1,4 @@
-/* $Id: if_ipwreg.h,v 1.5 2004/10/27 21:21:16 damien Exp $ */
+/* $Id: if_ipwreg.h,v 1.6 2004/10/27 21:22:14 damien Exp $ */
/*-
* Copyright (c) 2004
@@ -102,7 +102,6 @@
#define IPW_INFO_CURRENT_TX_RATE 768
/* table2 offsets */
-#define IPW_INFO_ADAPTER_MAC 8
#define IPW_INFO_CURRENT_SSID 48
#define IPW_INFO_CURRENT_BSSID 112
@@ -251,6 +250,22 @@ struct ipw_configuration {
u_int32_t ibss_chan;
} __attribute__((__packed__));
+/* EEPROM = Electrically Erasable Programmable Read-Only Memory */
+
+#define IPW_MEM_EEPROM_CTL 0x00300040
+
+#define IPW_EEPROM_MAC 0x21
+
+#define IPW_EEPROM_DELAY 1 /* minimum hold time (microsecond) */
+
+#define IPW_EEPROM_C (1 << 0) /* Serial Clock */
+#define IPW_EEPROM_S (1 << 1) /* Chip Select */
+#define IPW_EEPROM_D (1 << 2) /* Serial data input */
+#define IPW_EEPROM_Q (1 << 4) /* Serial data output */
+
+#define IPW_EEPROM_SHIFT_D 2
+#define IPW_EEPROM_SHIFT_Q 4
+
/*
* control and status registers access macros
*/
@@ -299,3 +314,11 @@ struct ipw_configuration {
CSR_WRITE_MULTI_1((sc), IPW_CSR_INDIRECT_DATA, (buf), (len)); \
} while (/* CONSTCOND */0)
+/*
+ * EEPROM access macro
+ */
+#define IPW_EEPROM_CTL(sc, val) do { \
+ MEM_WRITE_4((sc), IPW_MEM_EEPROM_CTL, (val)); \
+ DELAY(IPW_EEPROM_DELAY); \
+} while (0)
+