oops some snapshot tests fell in

1 files changed, 14 insertions, 23 deletions

diff --git a/sys/dev/pci/ixgbe_82599.c b/sys/dev/pci/ixgbe_82599.c
index 00fb693710c..e2d8b31cf03 100644
--- a/sys/dev/pci/ixgbe_82599.c
+++ b/sys/dev/pci/ixgbe_82599.c
@@ -1,9 +1,8 @@
-/*	$OpenBSD: ixgbe_82599.c,v 1.17 2020/02/28 04:59:07 deraadt Exp $	*/
+/*	$OpenBSD: ixgbe_82599.c,v 1.18 2020/02/28 05:22:53 deraadt Exp $	*/
 
 /******************************************************************************
-  SPDX-License-Identifier: BSD-3-Clause
 
-  Copyright (c) 2001-2017, Intel Corporation
+  Copyright (c) 2001-2015, Intel Corporation
   All rights reserved.
 
   Redistribution and use in source and binary forms, with or without
@@ -33,8 +32,7 @@
   POSSIBILITY OF SUCH DAMAGE.
 
 ******************************************************************************/
-/*$FreeBSD: head/sys/dev/ixgbe/ixgbe_82599.c 326022 2017-11-20 19:36:21Z pfg $*/
-
+/*$FreeBSD: head/sys/dev/ixgbe/ixgbe_82599.c 292674 2015-12-23 22:45:17Z sbruno $*/
 
 #include <dev/pci/ixgbe.h>
 #include <dev/pci/ixgbe_type.h>
@@ -73,7 +71,7 @@ int32_t ixgbe_write_analog_reg8_82599(struct ixgbe_hw *hw, uint32_t reg,
 int32_t ixgbe_start_hw_82599(struct ixgbe_hw *hw);
 int32_t ixgbe_identify_phy_82599(struct ixgbe_hw *hw);
 int32_t ixgbe_init_phy_ops_82599(struct ixgbe_hw *hw);
-uint64_t ixgbe_get_supported_physical_layer_82599(struct ixgbe_hw *hw);
+uint32_t ixgbe_get_supported_physical_layer_82599(struct ixgbe_hw *hw);
 int32_t ixgbe_enable_rx_dma_82599(struct ixgbe_hw *hw, uint32_t regval);
 int32_t prot_autoc_read_82599(struct ixgbe_hw *, bool *locked, uint32_t *reg_val);
 int32_t prot_autoc_write_82599(struct ixgbe_hw *, uint32_t reg_val, bool locked);
@@ -306,7 +304,7 @@ int32_t prot_autoc_read_82599(struct ixgbe_hw *hw, bool *locked,
 /**
  * prot_autoc_write_82599 - Hides MAC differences needed for AUTOC write
  * @hw: pointer to hardware structure
- * @autoc: value to write to AUTOC
+ * @reg_val: value to write to AUTOC
  * @locked: bool to indicate whether the SW/FW lock was already taken by
  *           previous proc_autoc_read_82599.
  *
@@ -364,7 +362,7 @@ int32_t ixgbe_init_ops_82599(struct ixgbe_hw *hw)
 
 	DEBUGFUNC("ixgbe_init_ops_82599");
 
-	ixgbe_init_phy_ops_generic(hw);
+	ret_val = ixgbe_init_phy_ops_generic(hw);
 	ret_val = ixgbe_init_ops_generic(hw);
 
 	/* PHY */
@@ -382,7 +380,7 @@ int32_t ixgbe_init_ops_82599(struct ixgbe_hw *hw)
 	mac->ops.read_analog_reg8 = ixgbe_read_analog_reg8_82599;
 	mac->ops.write_analog_reg8 = ixgbe_write_analog_reg8_82599;
 	mac->ops.start_hw = ixgbe_start_hw_82599;
-	mac->ops.get_device_caps = ixgbe_get_device_caps_generic;
+
 	mac->ops.prot_autoc_read = prot_autoc_read_82599;
 	mac->ops.prot_autoc_write = prot_autoc_write_82599;
 
@@ -411,9 +409,6 @@ int32_t ixgbe_init_ops_82599(struct ixgbe_hw *hw)
 	mac->max_tx_queues	= IXGBE_82599_MAX_TX_QUEUES;
 	mac->max_msix_vectors	= 0 /*ixgbe_get_pcie_msix_count_generic(hw)*/;
 
-	mac->arc_subsystem_valid = !!(IXGBE_READ_REG(hw, IXGBE_FWSM_BY_MAC(hw))
-				      & IXGBE_FWSM_MODE_MASK);
-
 	hw->mbx.ops.init_params = ixgbe_init_mbx_params_pf;
 
 	/* EEPROM */
@@ -607,11 +602,10 @@ void ixgbe_stop_mac_link_on_d3_82599(struct ixgbe_hw *hw)
 	uint16_t ee_ctrl_2 = 0;
 
 	DEBUGFUNC("ixgbe_stop_mac_link_on_d3_82599");
-	if (hw->eeprom.ops.read)
-		hw->eeprom.ops.read(hw, IXGBE_EEPROM_CTRL_2, &ee_ctrl_2);
+	ixgbe_read_eeprom_82599(hw, IXGBE_EEPROM_CTRL_2, &ee_ctrl_2);
 
-	if (!ixgbe_mng_present(hw) && !hw->wol_enabled &&
-	    ee_ctrl_2 & IXGBE_EEPROM_CCD_BIT) {
+	if (!ixgbe_mng_present(hw) &&
+	    (ee_ctrl_2 & IXGBE_EEPROM_CCD_BIT)) {
 		autoc2_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
 		autoc2_reg |= IXGBE_AUTOC2_LINK_DISABLE_ON_D3_MASK;
 		IXGBE_WRITE_REG(hw, IXGBE_AUTOC2, autoc2_reg);
@@ -926,7 +920,7 @@ int32_t ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw,
 	DEBUGFUNC("ixgbe_setup_mac_link_82599");
 
 	/* Check to see if speed passed in is supported. */
-	status = hw->mac.ops.get_link_capabilities(hw, &link_capabilities,
+	status = ixgbe_get_link_capabilities_82599(hw, &link_capabilities,
 	    &autoneg);
 	if (status)
 		goto out;
@@ -1164,8 +1158,7 @@ mac_reset_top:
 		 * Likewise if we support WoL we don't want change the
 		 * LMS state.
 		 */
-		if ((hw->phy.multispeed_fiber && ixgbe_mng_enabled(hw)) ||
-		    hw->wol_enabled)
+		if (hw->phy.multispeed_fiber && ixgbe_mng_enabled(hw))
 			hw->mac.orig_autoc =
 				(hw->mac.orig_autoc & ~IXGBE_AUTOC_LMS_MASK) |
 				curr_lms;
@@ -1324,9 +1317,9 @@ int32_t ixgbe_identify_phy_82599(struct ixgbe_hw *hw)
  *
  *  Determines physical layer capabilities of the current configuration.
  **/
-uint64_t ixgbe_get_supported_physical_layer_82599(struct ixgbe_hw *hw)
+uint32_t ixgbe_get_supported_physical_layer_82599(struct ixgbe_hw *hw)
 {
-	uint64_t physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN;
+	uint32_t physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN;
 	uint32_t autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);
 	uint32_t autoc2 = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
 	uint32_t pma_pmd_10g_serial = autoc2 & IXGBE_AUTOC2_10G_SERIAL_PMA_PMD_MASK;
@@ -1630,7 +1623,6 @@ reset_pipeline_out:
  *  ixgbe_read_i2c_byte_82599 - Reads 8 bit word over I2C
  *  @hw: pointer to hardware structure
  *  @byte_offset: byte offset to read
- *  @dev_addr: address to read from
  *  @data: value read
  *
  *  Performs byte read operation to SFP module's EEPROM over I2C interface at
@@ -1688,7 +1680,6 @@ release_i2c_access:
  *  ixgbe_write_i2c_byte_82599 - Writes 8 bit word over I2C
  *  @hw: pointer to hardware structure
  *  @byte_offset: byte offset to write
- *  @dev_addr: address to read from
  *  @data: value to write
  *
  *  Performs byte write operation to SFP module's EEPROM over I2C interface at