diff options
author | Jonathan Gray <jsg@cvs.openbsd.org> | 2021-01-16 05:09:03 +0000 |
---|---|---|
committer | Jonathan Gray <jsg@cvs.openbsd.org> | 2021-01-16 05:09:03 +0000 |
commit | 3c195f78e0e99f4f4552e140eafac07637474836 (patch) | |
tree | 4ec371a5f7fdfd2c800fdab4161b41bbdeb86914 /sys/dev/pci/pcidevs.h | |
parent | a9feaecd04ac0c20b24083eba606ca7cd3d4b3b4 (diff) |
regen
Diffstat (limited to 'sys/dev/pci/pcidevs.h')
-rw-r--r-- | sys/dev/pci/pcidevs.h | 25 |
1 files changed, 23 insertions, 2 deletions
diff --git a/sys/dev/pci/pcidevs.h b/sys/dev/pci/pcidevs.h index aa5cada4ca2..025c7aeed87 100644 --- a/sys/dev/pci/pcidevs.h +++ b/sys/dev/pci/pcidevs.h @@ -2,7 +2,7 @@ * THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT. * * generated from: - * OpenBSD: pcidevs,v 1.1947 2020/12/28 10:35:59 kettenis Exp + * OpenBSD: pcidevs,v 1.1948 2021/01/16 05:08:19 jsg Exp */ /* $NetBSD: pcidevs,v 1.30 1997/06/24 06:20:24 thorpej Exp $ */ @@ -5559,6 +5559,25 @@ #define PCI_PRODUCT_INTEL_C610_MS_SMB_1 0x8d7d /* C610 MS SMBus */ #define PCI_PRODUCT_INTEL_C610_MS_SMB_2 0x8d7e /* C610 MS SMBus */ #define PCI_PRODUCT_INTEL_C610_MS_SMB_3 0x8d7f /* C610 MS SMBus */ +#define PCI_PRODUCT_INTEL_TGL_UP4_2C_HB 0x9a02 /* Core 11G Host */ +#define PCI_PRODUCT_INTEL_TGL_DTT 0x9a03 /* Core 11G DTT */ +#define PCI_PRODUCT_INTEL_TGL_UP3_2C_HB 0x9a04 /* Core 11G Host */ +#define PCI_PRODUCT_INTEL_TGL_PCIE_1 0x9a09 /* Core 11G PCIE */ +#define PCI_PRODUCT_INTEL_TGL_VMD 0x9a0b /* Core 11G VMD */ +#define PCI_PRODUCT_INTEL_TGL_SRAM 0x9a0d /* Core 11G SRAM */ +#define PCI_PRODUCT_INTEL_TGL_GNA 0x9a11 /* Core 11G GNA */ +#define PCI_PRODUCT_INTEL_TGL_UP4_4C_HB 0x9a12 /* Core 11G Host */ +#define PCI_PRODUCT_INTEL_TGL_XHCI 0x9a13 /* Core 11G xHCI */ +#define PCI_PRODUCT_INTEL_TGL_UP3_4C_HB 0x9a14 /* Core 11G Host */ +#define PCI_PRODUCT_INTEL_TGL_XDCI 0x9a15 /* Core 11G xDCI */ +#define PCI_PRODUCT_INTEL_TGL_IPU 0x9a19 /* Core 11G IPU */ +#define PCI_PRODUCT_INTEL_TGL_TBT_DMA0 0x9a1b /* Core 11G TBT */ +#define PCI_PRODUCT_INTEL_TGL_TBT_DMA1 0x9a1d /* Core 11G TBT */ +#define PCI_PRODUCT_INTEL_TGL_PCIE_2 0x9a23 /* Core 11G PCIE */ +#define PCI_PRODUCT_INTEL_TGL_PCIE_3 0x9a25 /* Core 11G PCIE */ +#define PCI_PRODUCT_INTEL_TGL_PCIE_4 0x9a27 /* Core 11G PCIE */ +#define PCI_PRODUCT_INTEL_TGL_PCIE_5 0x9a29 /* Core 11G PCIE */ +#define PCI_PRODUCT_INTEL_TGL_NPK 0x9a33 /* Core 11G NPK */ #define PCI_PRODUCT_INTEL_I2OPCIB 0x9620 /* I2O RAID */ #define PCI_PRODUCT_INTEL_RCU21 0x9621 /* RCU21 I2O RAID */ #define PCI_PRODUCT_INTEL_RCUXX 0x9622 /* RCUxx I2O RAID */ @@ -5758,7 +5777,8 @@ #define PCI_PRODUCT_INTEL_PINEVIEW_M_DMI 0xa010 /* Pineview DMI */ #define PCI_PRODUCT_INTEL_PINEVIEW_M_IGC_1 0xa011 /* Pineview Video */ #define PCI_PRODUCT_INTEL_PINEVIEW_M_IGC_2 0xa012 /* Pineview Video */ -#define PCI_PRODUCT_INTEL_500SERIES_LP_ESPI 0xa082 /* 500 Series eSPI */ +#define PCI_PRODUCT_INTEL_500SERIES_LP_ESPI_UP3 0xa082 /* 500 Series eSPI */ +#define PCI_PRODUCT_INTEL_500SERIES_LP_ESPI_UP4 0xa087 /* 500 Series eSPI */ #define PCI_PRODUCT_INTEL_500SERIES_LP_P2SB 0xa0a0 /* 500 Series P2SB */ #define PCI_PRODUCT_INTEL_500SERIES_LP_PMC 0xa0a1 /* 500 Series PMC */ #define PCI_PRODUCT_INTEL_500SERIES_LP_SMB 0xa0a3 /* 500 Series SMBus */ @@ -7698,6 +7718,7 @@ #define PCI_PRODUCT_SANDISK_PCSN520_1 0x5003 /* PC SN520 */ #define PCI_PRODUCT_SANDISK_PCSN520_2 0x5004 /* PC SN520 */ #define PCI_PRODUCT_SANDISK_WDSXXXG3X0C 0x5006 /* WD Black NVMe */ +#define PCI_PRODUCT_SANDISK_PCSN530 0x5008 /* PC SN530 */ /* Sangoma products */ #define PCI_PRODUCT_SANGOMA_A10X 0x0300 /* A10x */ |