from NetBSD:

Add support for Acard ATP850/860, Highpoint HPT370A, and ALi UDMA4/5 controllers
Workaround some OPTi chipset bugs (opti_chip_map still disabled by default)

1 files changed, 23 insertions, 3 deletions

diff --git a/sys/dev/pci/pciide_acer_reg.h b/sys/dev/pci/pciide_acer_reg.h
index 023164917e7..6befb6105af 100644
--- a/sys/dev/pci/pciide_acer_reg.h
+++ b/sys/dev/pci/pciide_acer_reg.h
@@ -1,5 +1,5 @@
-/*	$OpenBSD: pciide_acer_reg.h,v 1.3 2001/04/04 07:02:52 csapuntz Exp $	*/
-/*	$NetBSD: pciide_acer_reg.h,v 1.3 2000/05/15 08:46:01 bouyer Exp $	*/
+/*	$OpenBSD: pciide_acer_reg.h,v 1.4 2001/08/03 22:03:44 chris Exp $	*/
+/*	$NetBSD: pciide_acer_reg.h,v 1.4 2001/07/26 20:02:22 bouyer Exp $	*/
 
 /*
  * Copyright (c) 1999 Manuel Bouyer.
@@ -38,6 +38,20 @@
 #define ACER_CHANSTATUS_RO            0x40
 #define PCIIDE_CHAN_RO(chan)            (0x20 >> (chan))
 
+/* from Linux, 80 pins cable detect */
+#define ACER_0x4A	0x4a
+/*
+ * bit 0 is 0 -> primary has 80 pin cable
+ * bit 1 is 0 -> secondary has 80 pin cable
+ */
+#define ACER_0x4A_80PIN(chan)	(0x1 << (chan))
+
+/* From FreeBSD, for UDMA mode > 2 */
+#define ACER_0x4B	0x4b
+#define ACER_0x4B_UDMA66	0x01
+/* From Linux */
+#define ACER_0x4B_CDETECT	0x08
+
 /* class code attribute register 2 (1 byte) */
 #define ACER_CCAR2	0x4d
 #define ACER_CHANSTATUSREGS_RO 0x80
@@ -74,13 +88,19 @@
 #define ACER_CHIDS_DRV(channel)	((0x4) << (channel))
 #define ACER_CHIDS_INT(channel)	((0x1) << (channel))
 
+/* Linux: south-bridge's enable bit (m1533) */
+#define ACER_0x79	0x79
+#define ACER_0x79_REVC2_EN	0x4
+#define ACER_0x79_EN		0x2
+
 /*
  * IDE bus frequency (1 byte)
  * This should be setup by the BIOS - can we rely on this ?
  */
 #define ACER_IDE_CLK	0x78 
 
-static int8_t acer_udma[] = {0x4, 0x3, 0x2};
+/* acer UDMA3/4/5 from FreeBSD */
+static int8_t acer_udma[] = {0x4, 0x3, 0x2, 0x1, 0x0, 0x7};
 static int8_t acer_pio[] = {0x0c, 0x58, 0x44, 0x33, 0x31};
 #ifdef unused
 static int8_t acer_dma[] = {0x08, 0x33, 0x31};