Add a stubbed out version of drm_pcie_get_speed_cap_mask() and

enable all the code in the various radeon pcie_gen2_enable() functions.
no functional change

5 files changed, 63 insertions, 21 deletions

diff --git a/sys/dev/pci/drm/drmP.h b/sys/dev/pci/drm/drmP.h
index 2bb861952fe..a134406e8d1 100644
--- a/sys/dev/pci/drm/drmP.h
+++ b/sys/dev/pci/drm/drmP.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: drmP.h,v 1.144 2013/08/14 02:49:19 jsg Exp $ */
+/* $OpenBSD: drmP.h,v 1.145 2013/08/26 05:15:20 jsg Exp $ */
 /* drmP.h -- Private header for Direct Rendering Manager -*- linux-c -*-
  * Created: Mon Jan  4 10:05:05 1999 by faith@precisioninsight.com
  */
@@ -1034,6 +1034,11 @@ static __inline__ int drm_core_check_feature(struct drm_device *dev,
 
 #endif
 
+#define DRM_PCIE_SPEED_25 1
+#define DRM_PCIE_SPEED_50 2
+#define DRM_PCIE_SPEED_80 4
+
+int	 drm_pcie_get_speed_cap_mask(struct drm_device *, u32 *);
 
 #endif /* __KERNEL__ */
 #endif /* _DRM_P_H_ */
diff --git a/sys/dev/pci/drm/drm_drv.c b/sys/dev/pci/drm/drm_drv.c
index 8c7470e7d6d..f7446a0a5bc 100644
--- a/sys/dev/pci/drm/drm_drv.c
+++ b/sys/dev/pci/drm/drm_drv.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: drm_drv.c,v 1.110 2013/08/12 04:11:52 jsg Exp $ */
+/* $OpenBSD: drm_drv.c,v 1.111 2013/08/26 05:15:20 jsg Exp $ */
 /*-
  * Copyright 2007-2009 Owain G. Ainsworth <oga@openbsd.org>
  * Copyright © 2008 Intel Corporation
@@ -1822,6 +1822,58 @@ again:
 	return &obj->uobj;
 }
 
+int drm_pcie_get_speed_cap_mask(struct drm_device *dev, u32 *mask)
+{
+	printf("%s stub\n", __func__);
+	return -EINVAL;
+#ifdef notyet
+	struct pci_dev *root;
+	int pos;
+	u32 lnkcap = 0, lnkcap2 = 0;
+
+	*mask = 0;
+	if (!dev->pdev)
+		return -EINVAL;
+
+	if (!pci_is_pcie(dev->pdev))
+		return -EINVAL;
+
+	root = dev->pdev->bus->self;
+
+	pos = pci_pcie_cap(root);
+	if (!pos)
+		return -EINVAL;
+
+	/* we've been informed via and serverworks don't make the cut */
+	if (root->vendor == PCI_VENDOR_ID_VIA ||
+	    root->vendor == PCI_VENDOR_ID_SERVERWORKS)
+		return -EINVAL;
+
+	pci_read_config_dword(root, pos + PCI_EXP_LNKCAP, &lnkcap);
+	pci_read_config_dword(root, pos + PCI_EXP_LNKCAP2, &lnkcap2);
+
+	lnkcap &= PCI_EXP_LNKCAP_SLS;
+	lnkcap2 &= 0xfe;
+
+	if (lnkcap2) { /* PCIE GEN 3.0 */
+		if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_2_5GB)
+			*mask |= DRM_PCIE_SPEED_25;
+		if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_5_0GB)
+			*mask |= DRM_PCIE_SPEED_50;
+		if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_8_0GB)
+			*mask |= DRM_PCIE_SPEED_80;
+	} else {
+		if (lnkcap & 1)
+			*mask |= DRM_PCIE_SPEED_25;
+		if (lnkcap & 2)
+			*mask |= DRM_PCIE_SPEED_50;
+	}
+
+	DRM_INFO("probing gen 2 caps for device %x:%x = %x/%x\n", root->vendor, root->device, lnkcap, lnkcap2);
+	return 0;
+#endif
+}
+
 int
 drm_handle_cmp(struct drm_handle *a, struct drm_handle *b)
 {
diff --git a/sys/dev/pci/drm/radeon/evergreen.c b/sys/dev/pci/drm/radeon/evergreen.c
index e6a4488e17d..f0cda01f800 100644
--- a/sys/dev/pci/drm/radeon/evergreen.c
+++ b/sys/dev/pci/drm/radeon/evergreen.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: evergreen.c,v 1.2 2013/08/18 10:45:32 jsg Exp $	*/
+/*	$OpenBSD: evergreen.c,v 1.3 2013/08/26 05:15:21 jsg Exp $	*/
 /*
  * Copyright 2010 Advanced Micro Devices, Inc.
  *
@@ -3805,10 +3805,8 @@ void evergreen_fini(struct radeon_device *rdev)
 
 void evergreen_pcie_gen2_enable(struct radeon_device *rdev)
 {
-#ifdef notyet
 	u32 link_width_cntl, speed_cntl, mask;
 	int ret;
-#endif
 
 	if (radeon_pcie_gen2 == 0)
 		return;
@@ -3823,9 +3821,7 @@ void evergreen_pcie_gen2_enable(struct radeon_device *rdev)
 	if (ASIC_IS_X2(rdev))
 		return;
 	
-	printf("%s partial stub\n", __func__);
-#ifdef notyet
-	ret = drm_pcie_get_speed_cap_mask(ddev, &mask);
+	ret = drm_pcie_get_speed_cap_mask(rdev->ddev, &mask);
 	if (ret != 0)
 		return;
 
@@ -3872,5 +3868,4 @@ void evergreen_pcie_gen2_enable(struct radeon_device *rdev)
 			link_width_cntl &= ~LC_UPCONFIGURE_DIS;
 		WREG32_PCIE_P(PCIE_LC_LINK_WIDTH_CNTL, link_width_cntl);
 	}
-#endif
 }
diff --git a/sys/dev/pci/drm/radeon/r600.c b/sys/dev/pci/drm/radeon/r600.c
index 55aba56b0a7..d1cad0fdfc3 100644
--- a/sys/dev/pci/drm/radeon/r600.c
+++ b/sys/dev/pci/drm/radeon/r600.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: r600.c,v 1.2 2013/08/18 10:45:32 jsg Exp $	*/
+/*	$OpenBSD: r600.c,v 1.3 2013/08/26 05:15:21 jsg Exp $	*/
 /*
  * Copyright 2008 Advanced Micro Devices, Inc.
  * Copyright 2008 Red Hat Inc.
@@ -4235,12 +4235,10 @@ int r600_get_pcie_lanes(struct radeon_device *rdev)
 
 static void r600_pcie_gen2_enable(struct radeon_device *rdev)
 {
-#ifdef notyet
 	u32 link_width_cntl, lanes, speed_cntl, training_cntl, tmp;
 	u16 link_cntl2;
 	u32 mask;
 	int ret;
-#endif
 
 	if (radeon_pcie_gen2 == 0)
 		return;
@@ -4259,8 +4257,6 @@ static void r600_pcie_gen2_enable(struct radeon_device *rdev)
 	if (rdev->family <= CHIP_R600)
 		return;
 
-	printf("%s partial stub\n", __func__);
-#ifdef notyet
 	ret = drm_pcie_get_speed_cap_mask(rdev->ddev, &mask);
 	if (ret != 0)
 		return;
@@ -4354,7 +4350,6 @@ static void r600_pcie_gen2_enable(struct radeon_device *rdev)
 			link_width_cntl &= ~LC_UPCONFIGURE_DIS;
 		WREG32_PCIE_P(PCIE_LC_LINK_WIDTH_CNTL, link_width_cntl);
 	}
-#endif
 }
 
 /**
diff --git a/sys/dev/pci/drm/radeon/rv770.c b/sys/dev/pci/drm/radeon/rv770.c
index fd8ce663ded..ccf88ce8497 100644
--- a/sys/dev/pci/drm/radeon/rv770.c
+++ b/sys/dev/pci/drm/radeon/rv770.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: rv770.c,v 1.2 2013/08/18 10:45:32 jsg Exp $	*/
+/*	$OpenBSD: rv770.c,v 1.3 2013/08/26 05:15:21 jsg Exp $	*/
 /*
  * Copyright 2008 Advanced Micro Devices, Inc.
  * Copyright 2008 Red Hat Inc.
@@ -1211,12 +1211,10 @@ void rv770_fini(struct radeon_device *rdev)
 
 static void rv770_pcie_gen2_enable(struct radeon_device *rdev)
 {
-#ifdef notyet
 	u32 link_width_cntl, lanes, speed_cntl, tmp;
 	u16 link_cntl2;
 	u32 mask;
 	int ret;
-#endif
 
 	if (radeon_pcie_gen2 == 0)
 		return;
@@ -1231,8 +1229,6 @@ static void rv770_pcie_gen2_enable(struct radeon_device *rdev)
 	if (ASIC_IS_X2(rdev))
 		return;
 	
-	printf("%s partial stub\n", __func__);
-#ifdef notyet
 	ret = drm_pcie_get_speed_cap_mask(rdev->ddev, &mask);
 	if (ret != 0)
 		return;
@@ -1297,5 +1293,4 @@ static void rv770_pcie_gen2_enable(struct radeon_device *rdev)
 			link_width_cntl &= ~LC_UPCONFIGURE_DIS;
 		WREG32_PCIE_P(PCIE_LC_LINK_WIDTH_CNTL, link_width_cntl);
 	}
-#endif
 }