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authorBrad Smith <brad@cvs.openbsd.org>2004-10-09 02:17:04 +0000
committerBrad Smith <brad@cvs.openbsd.org>2004-10-09 02:17:04 +0000
commit59df16c4e8fb5f13364e5fc792eb212fe8850dc6 (patch)
tree0775bb1eb0fc14bb6b7dceaa51b63ac779ce9dae /sys/dev/pci
parent74566017b8f9543b54823bb0600c54d58d505ee7 (diff)
Allow a little time for the reset to settle in before we start polling
the BMCR again. The DP83840A manual states that there should be a 500us delay between asserting software reset and attempting MII serial operations. From NetBSD ok mcbride@
Diffstat (limited to 'sys/dev/pci')
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