diff options
| author | Owain Ainsworth <oga@cvs.openbsd.org> | 2010-04-19 14:34:08 +0000 |
|---|---|---|
| committer | Owain Ainsworth <oga@cvs.openbsd.org> | 2010-04-19 14:34:08 +0000 |
| commit | 69eaefac6b073f51c95ec54dc45db3bd706a7863 (patch) | |
| tree | 0451f910642d9861815326b2d9d40979914d9867 /sys/dev/pci | |
| parent | 44e79357cc294f56424b59b3e6099e9c09a43ce9 (diff) | |
Enable VS timer dispatch, from Eric Anholt upstream.
The spec says this bit should always be set. It can help resolve
hardware deadlocks where a unit downstream of the VS is waiting for more
input, the VS has one vertex queueed up but not dispatched because it
hope to get one more vertex so it can dispatch a 2x4 block, and software
isn't handing any more vertices due to waiting on rendering.
Diffstat (limited to 'sys/dev/pci')
| -rw-r--r-- | sys/dev/pci/drm/i915_drv.c | 4 | ||||
| -rw-r--r-- | sys/dev/pci/drm/i915_drv.h | 4 |
2 files changed, 8 insertions, 0 deletions
diff --git a/sys/dev/pci/drm/i915_drv.c b/sys/dev/pci/drm/i915_drv.c index 49c9677dfa9..134ab947297 100644 --- a/sys/dev/pci/drm/i915_drv.c +++ b/sys/dev/pci/drm/i915_drv.c @@ -3676,6 +3676,10 @@ inteldrm_start_ring(struct drm_i915_private *dev_priv) /* Update our cache of the ring state */ inteldrm_update_ring(dev_priv); + if (IS_I9XX(dev_priv) && !IS_GEN3(dev_priv)) + I915_WRITE(MI_MODE, (VS_TIMER_DISPATCH) << 15 | + VS_TIMER_DISPATCH); + return (0); } diff --git a/sys/dev/pci/drm/i915_drv.h b/sys/dev/pci/drm/i915_drv.h index 8bbee04a356..dae028ceaec 100644 --- a/sys/dev/pci/drm/i915_drv.h +++ b/sys/dev/pci/drm/i915_drv.h @@ -764,6 +764,10 @@ read64(struct drm_i915_private *dev_priv, bus_size_t off) #define INSTDONE 0x02090 #define NOPID 0x02094 #define HWSTAM 0x02098 + +#define MI_MODE 0x0209c +#define VS_TIMER_DISPATCH (1 << 6) + #define SCPD0 0x0209c /* 915+ only */ #define IER 0x020a0 #define IIR 0x020a4 |