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authorMark Kettenis <kettenis@cvs.openbsd.org>2016-05-04 14:30:02 +0000
committerMark Kettenis <kettenis@cvs.openbsd.org>2016-05-04 14:30:02 +0000
commit9d334b2855481277934921c24f1afd7d537e3eb4 (patch)
treecf65425fcfa6a58830f0aa0517be6cb6dc2407d6 /sys/dev/pci
parentaf81b7d497efd16720cc2ac3d3c2e762a68b3d38 (diff)
Initial support for MSI-X. Only supported on amd64 for now. I have diffs to
actually use this in em(4) and xhci(4), but I'm not committing those yet because we almost certainly need to save and restore the MSI-X registers during suspend/resume. However, this allows mpi@ to play with multiple-vector support in networking hardware. Requested by mpi@ ok mlarkin@, mikeb@
Diffstat (limited to 'sys/dev/pci')
-rw-r--r--sys/dev/pci/pcireg.h17
1 files changed, 16 insertions, 1 deletions
diff --git a/sys/dev/pci/pcireg.h b/sys/dev/pci/pcireg.h
index 3f415bd2650..5278989eb8b 100644
--- a/sys/dev/pci/pcireg.h
+++ b/sys/dev/pci/pcireg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: pcireg.h,v 1.48 2015/06/02 15:26:19 mpi Exp $ */
+/* $OpenBSD: pcireg.h,v 1.49 2016/05/04 14:30:00 kettenis Exp $ */
/* $NetBSD: pcireg.h,v 1.26 2000/05/10 16:58:42 thorpej Exp $ */
/*
@@ -594,6 +594,21 @@ typedef u_int8_t pci_revision_t;
#define PCI_PCIE_LCAP2 0x2c
/*
+ * Extended Message Signaled Interrups; access via capability pointer.
+ */
+#define PCI_MSIX_MC_MSIXE 0x80000000
+#define PCI_MSIX_MC_TBLSZ 0x000007ff
+#define PCI_MSIX_TABLE 0x04
+#define PCI_MSIX_TABLE_BIR 0x00000007
+#define PCI_MSIX_TABLE_OFF ~(PCI_MSIX_TABLE_BIR)
+
+#define PCI_MSIX_MA(i) ((i) * 16 + 0)
+#define PCI_MSIX_MAU32(i) ((i) * 16 + 0)
+#define PCI_MSIX_MD(i) ((i) * 16 + 8)
+#define PCI_MSIX_VC(i) ((i) * 16 + 12)
+#define PCI_MSIX_VC_MASK 0x00000001
+
+/*
* Interrupt Configuration Register; contains interrupt pin and line.
*/
#define PCI_INTERRUPT_REG 0x3c