Fix a one character typo that broke interrupt handling on ironlake.

we disable the interrupt while we are handling it (this is required according to
intel) but instead of writing the version with the master enable bit back to the
Interrupt Enable Register, we wrote it to the Interrupt Indication Register, so
after the first interrupt we only got lucky due to shared interrupts when we
were after anything.

s/IIR/IMR/ on that one call and it works.

tested by guenther@ and marco@ and myself. Fixes hangs when waiting for
the chip which were unstuck by moving the mouse.

0 files changed, 0 insertions, 0 deletions