diff options
| author | Yojiro Uo <yuo@cvs.openbsd.org> | 2014-07-12 17:38:52 +0000 |
|---|---|---|
| committer | Yojiro Uo <yuo@cvs.openbsd.org> | 2014-07-12 17:38:52 +0000 |
| commit | 1009312d5ba1e26b927a6b5631e9b791a12767be (patch) | |
| tree | 2ce1a283181b2d07a692ca0fbea8d77365310798 /sys/dev/usb/xhcireg.h | |
| parent | c178c5ca5166dc3afa4c67aca9fd52b2c523d265 (diff) | |
To enable Intel XHCI host controller, re-route all of usb port to xhci
instead of connected to ehci.
ok mpi@
Diffstat (limited to 'sys/dev/usb/xhcireg.h')
| -rw-r--r-- | sys/dev/usb/xhcireg.h | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/sys/dev/usb/xhcireg.h b/sys/dev/usb/xhcireg.h index e8ac28cee51..6ea860468a0 100644 --- a/sys/dev/usb/xhcireg.h +++ b/sys/dev/usb/xhcireg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: xhcireg.h,v 1.1 2014/03/08 14:34:11 mpi Exp $ */ +/* $OpenBSD: xhcireg.h,v 1.2 2014/07/12 17:38:51 yuo Exp $ */ /*- * Copyright (c) 2014 Martin Pieuchot. All rights reserved. @@ -44,7 +44,9 @@ #define PCI_XHCI_FLADJ 0x61 /* RW frame length adjust */ #define PCI_XHCI_INTEL_XUSB2PR 0xd0 /* Intel USB2 Port Routing */ +#define PCI_XHCI_INTEL_XUSB2PRM 0xd4 /* Intel USB2 Port Routing Mask */ #define PCI_XHCI_INTEL_USB3_PSSEN 0xd8 /* Intel USB3 Port SuperSpeed Enable */ +#define PCI_XHCI_INTEL_USB3PRM 0xdc /* Intel USB3 Port Routing Mask */ /* XHCI capability registers */ #define XHCI_CAPLENGTH 0x00 /* RO Capability reg. length field */ @@ -194,7 +196,8 @@ #define XHCI_IMOD_IVAL_SET(x) (((x) & 0xffff) << 0) /* 250ns unit */ #define XHCI_IMOD_ICNT_GET(x) (((x) >> 16) & 0xffff) /* 250ns unit */ #define XHCI_IMOD_ICNT_SET(x) (((x) & 0xffff) << 16) /* 250ns unit */ -#define XHCI_IMOD_DEFAULT 0x000003E8U /* 8000 IRQ/second */ +#define XHCI_IMOD_DEFAULT 0x000001F4U /* 8000 IRQ/second */ +#define XHCI_IMOD_DEFAULT_LP 0x000003E8U /* 4000 IRQ/second */ /* XHCI event ring segment table size */ #define XHCI_ERSTSZ(n) (0x0028 + (0x20 * (n))) |