diff options
| author | Jonathan Gray <jsg@cvs.openbsd.org> | 2022-04-21 09:49:15 +0000 |
|---|---|---|
| committer | Jonathan Gray <jsg@cvs.openbsd.org> | 2022-04-21 09:49:15 +0000 |
| commit | 1fe4bc882f9dc1b4dcf66ae24cbd40e3e6bed799 (patch) | |
| tree | 3a8f00ac38be85969d65bebdb95973473d1fd00b /sys/dev | |
| parent | 7ec74be4e269ec05edeb24d9e40c2d69508b94b4 (diff) | |
drm/amd/display: Enable power gating before init_pipes
From Roman Li
eab8e585840f84c6a352eaab70e5495eda7ebb6f in linux 5.15.y/5.15.35
58e16c752e9540b28a873c44c3bee83e022007c1 in mainline linux
Diffstat (limited to 'sys/dev')
| -rw-r--r-- | sys/dev/pci/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 5 | ||||
| -rw-r--r-- | sys/dev/pci/drm/amd/display/dc/dcn30/dcn30_hwseq.c | 5 | ||||
| -rw-r--r-- | sys/dev/pci/drm/amd/display/dc/dcn31/dcn31_hwseq.c | 5 |
3 files changed, 9 insertions, 6 deletions
diff --git a/sys/dev/pci/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/sys/dev/pci/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c index b3a0499f855..711b18d96ea 100644 --- a/sys/dev/pci/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +++ b/sys/dev/pci/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c @@ -1439,6 +1439,9 @@ void dcn10_init_hw(struct dc *dc) } } + if (hws->funcs.enable_power_gating_plane) + hws->funcs.enable_power_gating_plane(dc->hwseq, true); + /* If taking control over from VBIOS, we may want to optimize our first * mode set, so we need to skip powering down pipes until we know which * pipes we want to use. @@ -1491,8 +1494,6 @@ void dcn10_init_hw(struct dc *dc) REG_UPDATE(DCFCLK_CNTL, DCFCLK_GATE_DIS, 0); } - if (hws->funcs.enable_power_gating_plane) - hws->funcs.enable_power_gating_plane(dc->hwseq, true); if (dc->clk_mgr->funcs->notify_wm_ranges) dc->clk_mgr->funcs->notify_wm_ranges(dc->clk_mgr); diff --git a/sys/dev/pci/drm/amd/display/dc/dcn30/dcn30_hwseq.c b/sys/dev/pci/drm/amd/display/dc/dcn30/dcn30_hwseq.c index 0950784bafa..f8345737581 100644 --- a/sys/dev/pci/drm/amd/display/dc/dcn30/dcn30_hwseq.c +++ b/sys/dev/pci/drm/amd/display/dc/dcn30/dcn30_hwseq.c @@ -570,6 +570,9 @@ void dcn30_init_hw(struct dc *dc) } } + if (hws->funcs.enable_power_gating_plane) + hws->funcs.enable_power_gating_plane(dc->hwseq, true); + /* If taking control over from VBIOS, we may want to optimize our first * mode set, so we need to skip powering down pipes until we know which * pipes we want to use. @@ -647,8 +650,6 @@ void dcn30_init_hw(struct dc *dc) REG_UPDATE(DCFCLK_CNTL, DCFCLK_GATE_DIS, 0); } - if (hws->funcs.enable_power_gating_plane) - hws->funcs.enable_power_gating_plane(dc->hwseq, true); if (!dcb->funcs->is_accelerated_mode(dcb) && dc->res_pool->hubbub->funcs->init_watermarks) dc->res_pool->hubbub->funcs->init_watermarks(dc->res_pool->hubbub); diff --git a/sys/dev/pci/drm/amd/display/dc/dcn31/dcn31_hwseq.c b/sys/dev/pci/drm/amd/display/dc/dcn31/dcn31_hwseq.c index 3afa1159a5f..b72d080b302 100644 --- a/sys/dev/pci/drm/amd/display/dc/dcn31/dcn31_hwseq.c +++ b/sys/dev/pci/drm/amd/display/dc/dcn31/dcn31_hwseq.c @@ -204,6 +204,9 @@ void dcn31_init_hw(struct dc *dc) } } + if (hws->funcs.enable_power_gating_plane) + hws->funcs.enable_power_gating_plane(dc->hwseq, true); + /* If taking control over from VBIOS, we may want to optimize our first * mode set, so we need to skip powering down pipes until we know which * pipes we want to use. @@ -287,8 +290,6 @@ void dcn31_init_hw(struct dc *dc) REG_UPDATE(DCFCLK_CNTL, DCFCLK_GATE_DIS, 0); } - if (hws->funcs.enable_power_gating_plane) - hws->funcs.enable_power_gating_plane(dc->hwseq, true); if (!dcb->funcs->is_accelerated_mode(dcb) && dc->res_pool->hubbub->funcs->init_watermarks) dc->res_pool->hubbub->funcs->init_watermarks(dc->res_pool->hubbub); |