beautify the code by renaming HAL functions with capitalized words (i

always wanted to do that). this breaks HAL compatibility but porting
should be easy, have a look at athvar.h. no functional changes.

10 files changed, 829 insertions, 829 deletions

diff --git a/sys/dev/ic/ar5210.c b/sys/dev/ic/ar5210.c
index fb17b26c521..da31228ae23 100644
--- a/sys/dev/ic/ar5210.c
+++ b/sys/dev/ic/ar5210.c
@@ -1,4 +1,4 @@
-/*     $OpenBSD: ar5210.c,v 1.19 2005/04/08 22:12:21 reyk Exp $        */
+/*     $OpenBSD: ar5210.c,v 1.20 2005/04/18 18:42:55 reyk Exp $        */
 
 /*
  * Copyright (c) 2004, 2005 Reyk Floeter <reyk@vantronix.net>
@@ -29,7 +29,7 @@ HAL_BOOL	 ar5k_ar5210_nic_reset(struct ath_hal *, u_int32_t);
 HAL_BOOL	 ar5k_ar5210_nic_wakeup(struct ath_hal *, HAL_BOOL, HAL_BOOL);
 void		 ar5k_ar5210_init_tx_queue(struct ath_hal *, u_int, HAL_BOOL);
 const void	 ar5k_ar5210_fill(struct ath_hal *);
-HAL_BOOL	 ar5k_ar5210_calibrate(struct ath_hal *, HAL_CHANNEL *);
+HAL_BOOL	 ar5k_ar5210_do_calibrate(struct ath_hal *, HAL_CHANNEL *);
 HAL_BOOL	 ar5k_ar5210_noise_floor(struct ath_hal *, HAL_CHANNEL *);
 
 AR5K_HAL_FUNCTIONS(extern, ar5k_ar5210,);
@@ -43,116 +43,116 @@ ar5k_ar5210_fill(hal)
 	/*
 	 * Init/Exit functions
 	 */
-	AR5K_HAL_FUNCTION(hal, ar5210, getRateTable);
+	AR5K_HAL_FUNCTION(hal, ar5210, get_rate_table);
 	AR5K_HAL_FUNCTION(hal, ar5210, detach);
 
 	/*
 	 * Reset functions
 	 */
 	AR5K_HAL_FUNCTION(hal, ar5210, reset);
-	AR5K_HAL_FUNCTION(hal, ar5210, setPCUConfig);
-	AR5K_HAL_FUNCTION(hal, ar5210, perCalibration);
+	AR5K_HAL_FUNCTION(hal, ar5210, set_opmode);
+	AR5K_HAL_FUNCTION(hal, ar5210, calibrate);
 
 	/*
 	 * TX functions
 	 */
-	AR5K_HAL_FUNCTION(hal, ar5210, updateTxTrigLevel);
-	AR5K_HAL_FUNCTION(hal, ar5210, setupTxQueue);
-	AR5K_HAL_FUNCTION(hal, ar5210, setTxQueueProps);
-	AR5K_HAL_FUNCTION(hal, ar5210, releaseTxQueue);
-	AR5K_HAL_FUNCTION(hal, ar5210, resetTxQueue);
-	AR5K_HAL_FUNCTION(hal, ar5210, getTxDP);
-	AR5K_HAL_FUNCTION(hal, ar5210, setTxDP);
-	AR5K_HAL_FUNCTION(hal, ar5210, startTxDma);
-	AR5K_HAL_FUNCTION(hal, ar5210, stopTxDma);
-	AR5K_HAL_FUNCTION(hal, ar5210, setupTxDesc);
-	AR5K_HAL_FUNCTION(hal, ar5210, setupXTxDesc);
-	AR5K_HAL_FUNCTION(hal, ar5210, fillTxDesc);
-	AR5K_HAL_FUNCTION(hal, ar5210, procTxDesc);
-	AR5K_HAL_FUNCTION(hal, ar5210, hasVEOL);
+	AR5K_HAL_FUNCTION(hal, ar5210, update_tx_triglevel);
+	AR5K_HAL_FUNCTION(hal, ar5210, setup_tx_queue);
+	AR5K_HAL_FUNCTION(hal, ar5210, setup_tx_queueprops);
+	AR5K_HAL_FUNCTION(hal, ar5210, release_tx_queue);
+	AR5K_HAL_FUNCTION(hal, ar5210, reset_tx_queue);
+	AR5K_HAL_FUNCTION(hal, ar5210, get_tx_buf);
+	AR5K_HAL_FUNCTION(hal, ar5210, put_tx_buf);
+	AR5K_HAL_FUNCTION(hal, ar5210, tx_start);
+	AR5K_HAL_FUNCTION(hal, ar5210, stop_tx_dma);
+	AR5K_HAL_FUNCTION(hal, ar5210, setup_tx_desc);
+	AR5K_HAL_FUNCTION(hal, ar5210, setup_xtx_desc);
+	AR5K_HAL_FUNCTION(hal, ar5210, fill_tx_desc);
+	AR5K_HAL_FUNCTION(hal, ar5210, proc_tx_desc);
+	AR5K_HAL_FUNCTION(hal, ar5210, has_veol);
 
 	/*
 	 * RX functions
 	 */
-	AR5K_HAL_FUNCTION(hal, ar5210, getRxDP);
-	AR5K_HAL_FUNCTION(hal, ar5210, setRxDP);
-	AR5K_HAL_FUNCTION(hal, ar5210, enableReceive);
-	AR5K_HAL_FUNCTION(hal, ar5210, stopDmaReceive);
-	AR5K_HAL_FUNCTION(hal, ar5210, startPcuReceive);
-	AR5K_HAL_FUNCTION(hal, ar5210, stopPcuReceive);
-	AR5K_HAL_FUNCTION(hal, ar5210, setMulticastFilter);
-	AR5K_HAL_FUNCTION(hal, ar5210, setMulticastFilterIndex);
-	AR5K_HAL_FUNCTION(hal, ar5210, clrMulticastFilterIndex);
-	AR5K_HAL_FUNCTION(hal, ar5210, getRxFilter);
-	AR5K_HAL_FUNCTION(hal, ar5210, setRxFilter);
-	AR5K_HAL_FUNCTION(hal, ar5210, setupRxDesc);
-	AR5K_HAL_FUNCTION(hal, ar5210, procRxDesc);
-	AR5K_HAL_FUNCTION(hal, ar5210, rxMonitor);
+	AR5K_HAL_FUNCTION(hal, ar5210, get_rx_buf);
+	AR5K_HAL_FUNCTION(hal, ar5210, put_rx_buf);
+	AR5K_HAL_FUNCTION(hal, ar5210, start_rx);
+	AR5K_HAL_FUNCTION(hal, ar5210, stop_rx_dma);
+	AR5K_HAL_FUNCTION(hal, ar5210, start_rx_pcu);
+	AR5K_HAL_FUNCTION(hal, ar5210, stop_pcu_recv);
+	AR5K_HAL_FUNCTION(hal, ar5210, set_mcast_filter);
+	AR5K_HAL_FUNCTION(hal, ar5210, set_mcast_filterindex);
+	AR5K_HAL_FUNCTION(hal, ar5210, clear_mcast_filter_idx);
+	AR5K_HAL_FUNCTION(hal, ar5210, get_rx_filter);
+	AR5K_HAL_FUNCTION(hal, ar5210, set_rx_filter);
+	AR5K_HAL_FUNCTION(hal, ar5210, setup_rx_desc);
+	AR5K_HAL_FUNCTION(hal, ar5210, proc_rx_desc);
+	AR5K_HAL_FUNCTION(hal, ar5210, set_rx_monitor);
 
 	/*
 	 * Misc functions
 	 */
-	AR5K_HAL_FUNCTION(hal, ar5210, dumpState);
-	AR5K_HAL_FUNCTION(hal, ar5210, getDiagState);
-	AR5K_HAL_FUNCTION(hal, ar5210, getMacAddress);
-	AR5K_HAL_FUNCTION(hal, ar5210, setMacAddress);
-	AR5K_HAL_FUNCTION(hal, ar5210, setRegulatoryDomain);
-	AR5K_HAL_FUNCTION(hal, ar5210, setLedState);
-	AR5K_HAL_FUNCTION(hal, ar5210, writeAssocid);
-	AR5K_HAL_FUNCTION(hal, ar5210, gpioCfgInput);
-	AR5K_HAL_FUNCTION(hal, ar5210, gpioCfgOutput);
-	AR5K_HAL_FUNCTION(hal, ar5210, gpioGet);
-	AR5K_HAL_FUNCTION(hal, ar5210, gpioSet);
-	AR5K_HAL_FUNCTION(hal, ar5210, gpioSetIntr);
-	AR5K_HAL_FUNCTION(hal, ar5210, getTsf32);
-	AR5K_HAL_FUNCTION(hal, ar5210, getTsf64);
-	AR5K_HAL_FUNCTION(hal, ar5210, resetTsf);
-	AR5K_HAL_FUNCTION(hal, ar5210, getRegDomain);
-	AR5K_HAL_FUNCTION(hal, ar5210, detectCardPresent);
-	AR5K_HAL_FUNCTION(hal, ar5210, updateMibCounters);
-	AR5K_HAL_FUNCTION(hal, ar5210, getRfGain);
-	AR5K_HAL_FUNCTION(hal, ar5210, setSlotTime);
-	AR5K_HAL_FUNCTION(hal, ar5210, getSlotTime);
-	AR5K_HAL_FUNCTION(hal, ar5210, setAckTimeout);
-	AR5K_HAL_FUNCTION(hal, ar5210, getAckTimeout);
-	AR5K_HAL_FUNCTION(hal, ar5210, setCTSTimeout);
-	AR5K_HAL_FUNCTION(hal, ar5210, getCTSTimeout);
+	AR5K_HAL_FUNCTION(hal, ar5210, dump_state);
+	AR5K_HAL_FUNCTION(hal, ar5210, get_diag_state);
+	AR5K_HAL_FUNCTION(hal, ar5210, get_lladdr);
+	AR5K_HAL_FUNCTION(hal, ar5210, set_lladdr);
+	AR5K_HAL_FUNCTION(hal, ar5210, set_regdomain);
+	AR5K_HAL_FUNCTION(hal, ar5210, set_ledstate);
+	AR5K_HAL_FUNCTION(hal, ar5210, set_associd);
+	AR5K_HAL_FUNCTION(hal, ar5210, set_gpio_input);
+	AR5K_HAL_FUNCTION(hal, ar5210, set_gpio_output);
+	AR5K_HAL_FUNCTION(hal, ar5210, get_gpio);
+	AR5K_HAL_FUNCTION(hal, ar5210, set_gpio);
+	AR5K_HAL_FUNCTION(hal, ar5210, set_gpio_intr);
+	AR5K_HAL_FUNCTION(hal, ar5210, get_tsf32);
+	AR5K_HAL_FUNCTION(hal, ar5210, get_tsf64);
+	AR5K_HAL_FUNCTION(hal, ar5210, reset_tsf);
+	AR5K_HAL_FUNCTION(hal, ar5210, get_regdomain);
+	AR5K_HAL_FUNCTION(hal, ar5210, detect_card_present);
+	AR5K_HAL_FUNCTION(hal, ar5210, update_mib_counters);
+	AR5K_HAL_FUNCTION(hal, ar5210, get_rf_gain);
+	AR5K_HAL_FUNCTION(hal, ar5210, set_slot_time);
+	AR5K_HAL_FUNCTION(hal, ar5210, get_slot_time);
+	AR5K_HAL_FUNCTION(hal, ar5210, set_ack_timeout);
+	AR5K_HAL_FUNCTION(hal, ar5210, get_ack_timeout);
+	AR5K_HAL_FUNCTION(hal, ar5210, set_cts_timeout);
+	AR5K_HAL_FUNCTION(hal, ar5210, get_cts_timeout);
 
 	/*
 	 * Key table (WEP) functions
 	 */
-	AR5K_HAL_FUNCTION(hal, ar5210, isHwCipherSupported);
-	AR5K_HAL_FUNCTION(hal, ar5210, getKeyCacheSize);
-	AR5K_HAL_FUNCTION(hal, ar5210, resetKeyCacheEntry);
-	AR5K_HAL_FUNCTION(hal, ar5210, isKeyCacheEntryValid);
-	AR5K_HAL_FUNCTION(hal, ar5210, setKeyCacheEntry);
-	AR5K_HAL_FUNCTION(hal, ar5210, setKeyCacheEntryMac);
+	AR5K_HAL_FUNCTION(hal, ar5210, is_cipher_supported);
+	AR5K_HAL_FUNCTION(hal, ar5210, get_keycache_size);
+	AR5K_HAL_FUNCTION(hal, ar5210, reset_key);
+	AR5K_HAL_FUNCTION(hal, ar5210, is_key_valid);
+	AR5K_HAL_FUNCTION(hal, ar5210, set_key);
+	AR5K_HAL_FUNCTION(hal, ar5210, set_key_lladdr);
 
 	/*
 	 * Power management functions
 	 */
-	AR5K_HAL_FUNCTION(hal, ar5210, setPowerMode);
-	AR5K_HAL_FUNCTION(hal, ar5210, getPowerMode);
-	AR5K_HAL_FUNCTION(hal, ar5210, queryPSPollSupport);
-	AR5K_HAL_FUNCTION(hal, ar5210, initPSPoll);
-	AR5K_HAL_FUNCTION(hal, ar5210, enablePSPoll);
-	AR5K_HAL_FUNCTION(hal, ar5210, disablePSPoll);
+	AR5K_HAL_FUNCTION(hal, ar5210, set_power);
+	AR5K_HAL_FUNCTION(hal, ar5210, get_power_mode);
+	AR5K_HAL_FUNCTION(hal, ar5210, query_pspoll_support);
+	AR5K_HAL_FUNCTION(hal, ar5210, init_pspoll);
+	AR5K_HAL_FUNCTION(hal, ar5210, enable_pspoll);
+	AR5K_HAL_FUNCTION(hal, ar5210, disable_pspoll);
 
 	/*
 	 * Beacon functions
 	 */
-	AR5K_HAL_FUNCTION(hal, ar5210, beaconInit);
-	AR5K_HAL_FUNCTION(hal, ar5210, setStationBeaconTimers);
-	AR5K_HAL_FUNCTION(hal, ar5210, resetStationBeaconTimers);
-	AR5K_HAL_FUNCTION(hal, ar5210, waitForBeaconDone);
+	AR5K_HAL_FUNCTION(hal, ar5210, init_beacon);
+	AR5K_HAL_FUNCTION(hal, ar5210, set_beacon_timers);
+	AR5K_HAL_FUNCTION(hal, ar5210, reset_beacon);
+	AR5K_HAL_FUNCTION(hal, ar5210, wait_for_beacon);
 
 	/*
 	 * Interrupt functions
 	 */
-	AR5K_HAL_FUNCTION(hal, ar5210, isInterruptPending);
-	AR5K_HAL_FUNCTION(hal, ar5210, getPendingInterrupts);
-	AR5K_HAL_FUNCTION(hal, ar5210, getInterrupts);
-	AR5K_HAL_FUNCTION(hal, ar5210, setInterrupts);
+	AR5K_HAL_FUNCTION(hal, ar5210, is_intr_pending);
+	AR5K_HAL_FUNCTION(hal, ar5210, get_isr);
+	AR5K_HAL_FUNCTION(hal, ar5210, get_intr);
+	AR5K_HAL_FUNCTION(hal, ar5210, set_intr);
 
 	/*
 	 * Chipset functions (ar5k-specific, non-HAL)
@@ -208,9 +208,9 @@ ar5k_ar5210_attach(device, sc, st, sh, status)
 	hal->ah_phy = AR5K_AR5210_PHY(0);
 
 	bcopy(etherbroadcastaddr, mac, IEEE80211_ADDR_LEN);
-	ar5k_ar5210_writeAssocid(hal, mac, 0, 0);
-	ar5k_ar5210_getMacAddress(hal, mac);
-	ar5k_ar5210_setPCUConfig(hal);
+	ar5k_ar5210_set_associd(hal, mac, 0, 0);
+	ar5k_ar5210_get_lladdr(hal, mac);
+	ar5k_ar5210_set_opmode(hal);
 
 	return (hal);
 }
@@ -273,7 +273,7 @@ ar5k_ar5210_nic_wakeup(hal, turbo, initial)
 	}
 
 	/* ...wakeup the device */
-	if (ar5k_ar5210_setPowerMode(hal,
+	if (ar5k_ar5210_set_power(hal,
 		HAL_PM_AWAKE, AH_TRUE, 0) == AH_FALSE) {
 		AR5K_PRINT("failed to resume the AR5210 chipset\n");
 		return (AH_FALSE);
@@ -301,7 +301,7 @@ ar5k_ar5210_nic_wakeup(hal, turbo, initial)
 	AR5K_DELAY(2300);
 
 	/* ...wakeup (again) */
-	if (ar5k_ar5210_setPowerMode(hal,
+	if (ar5k_ar5210_set_power(hal,
 		HAL_PM_AWAKE, AH_TRUE, 0) == AH_FALSE) {
 		AR5K_PRINT("failed to resume the AR5210 (again)\n");
 		return (AH_FALSE);
@@ -317,7 +317,7 @@ ar5k_ar5210_nic_wakeup(hal, turbo, initial)
 }
 
 const HAL_RATE_TABLE *
-ar5k_ar5210_getRateTable(hal, mode)
+ar5k_ar5210_get_rate_table(hal, mode)
 	struct ath_hal *hal;
 	u_int mode;
 {
@@ -368,7 +368,7 @@ ar5k_ar5210_reset(hal, op_mode, channel, change_channel, status)
 	 * Initialize operating mode
 	 */
 	hal->ah_op_mode = op_mode;
-	ar5k_ar5210_setPCUConfig(hal);
+	ar5k_ar5210_set_opmode(hal);
 
 	/*
 	 * Write initial mode register settings
@@ -411,7 +411,7 @@ ar5k_ar5210_reset(hal, op_mode, channel, change_channel, status)
 	AR5K_REG_WRITE(AR5K_AR5210_PHY_ACTIVE, AR5K_AR5210_PHY_ENABLE);
 	AR5K_DELAY(1000);
 
-	ar5k_ar5210_calibrate(hal, channel);
+	ar5k_ar5210_do_calibrate(hal, channel);
 	if (ar5k_ar5210_noise_floor(hal, channel) == AH_FALSE)
 		return (AH_FALSE);
 
@@ -419,11 +419,11 @@ ar5k_ar5210_reset(hal, op_mode, channel, change_channel, status)
 	 * Set RF kill flags if supported by the device (read from the EEPROM)
 	 */
 	if (AR5K_EEPROM_HDR_RFKILL(hal->ah_capabilities.cap_eeprom.ee_header)) {
-		ar5k_ar5210_gpioCfgInput(hal, 0);
-		if ((hal->ah_gpio[0] = ar5k_ar5210_gpioGet(hal, 0)) == 0) {
-			ar5k_ar5210_gpioSetIntr(hal, 0, 1);
+		ar5k_ar5210_set_gpio_input(hal, 0);
+		if ((hal->ah_gpio[0] = ar5k_ar5210_get_gpio(hal, 0)) == 0) {
+			ar5k_ar5210_set_gpio_intr(hal, 0, 1);
 		} else {
-			ar5k_ar5210_gpioSetIntr(hal, 0, 0);
+			ar5k_ar5210_set_gpio_intr(hal, 0, 0);
 		}
 	}
 
@@ -431,7 +431,7 @@ ar5k_ar5210_reset(hal, op_mode, channel, change_channel, status)
 	 * Reset queues and start beacon timers at the end of the reset routine
 	 */
 	for (i = 0; i < hal->ah_capabilities.cap_queues.q_tx_num; i++) {
-		if (ar5k_ar5210_resetTxQueue(hal, i) == AH_FALSE) {
+		if (ar5k_ar5210_reset_tx_queue(hal, i) == AH_FALSE) {
 			AR5K_PRINTF("failed to reset TX queue #%d\n", i);
 			return (AH_FALSE);
 		}
@@ -444,7 +444,7 @@ ar5k_ar5210_reset(hal, op_mode, channel, change_channel, status)
 }
 
 void
-ar5k_ar5210_setPCUConfig(hal)
+ar5k_ar5210_set_opmode(hal)
 	struct ath_hal *hal;
 {
 	u_int32_t pcu_reg, beacon_reg, low_id, high_id;
@@ -494,7 +494,7 @@ ar5k_ar5210_setPCUConfig(hal)
 }
 
 HAL_BOOL
-ar5k_ar5210_perCalibration(hal, channel)
+ar5k_ar5210_calibrate(hal, channel)
 	struct ath_hal *hal;
 	HAL_CHANNEL *channel;
 {
@@ -573,7 +573,7 @@ ar5k_ar5210_perCalibration(hal, channel)
 
 	AR5K_DELAY(1000);
 
-	ret = ar5k_ar5210_calibrate(hal, channel);
+	ret = ar5k_ar5210_do_calibrate(hal, channel);
 
 	/* Reset to normal state */
 	AR5K_REG_WRITE(AR5K_AR5210_PHY_SIG, phy_sig);
@@ -600,7 +600,7 @@ ar5k_ar5210_perCalibration(hal, channel)
 }
 
 HAL_BOOL
-ar5k_ar5210_calibrate(hal, channel)
+ar5k_ar5210_do_calibrate(hal, channel)
 	struct ath_hal *hal;
 	HAL_CHANNEL *channel;
 {
@@ -666,7 +666,7 @@ ar5k_ar5210_noise_floor(hal, channel)
  */
 
 HAL_BOOL
-ar5k_ar5210_updateTxTrigLevel(hal, increase)
+ar5k_ar5210_update_tx_triglevel(hal, increase)
 	struct ath_hal *hal;
 	HAL_BOOL increase;
 {
@@ -704,7 +704,7 @@ ar5k_ar5210_updateTxTrigLevel(hal, increase)
 }
 
 int
-ar5k_ar5210_setupTxQueue(hal, queue_type, queue_info)
+ar5k_ar5210_setup_tx_queue(hal, queue_type, queue_info)
 	struct ath_hal *hal;
 	HAL_TX_QUEUE queue_type;
 	const HAL_TXQ_INFO *queue_info;
@@ -733,7 +733,7 @@ ar5k_ar5210_setupTxQueue(hal, queue_type, queue_info)
 	hal->ah_txq[queue].tqi_type = queue_type;
 
 	if (queue_info != NULL) {
-		if (ar5k_ar5210_setTxQueueProps(hal,
+		if (ar5k_ar5210_setup_tx_queueprops(hal,
 			queue, queue_info) != AH_TRUE)
 			return (-1);
 	}
@@ -742,7 +742,7 @@ ar5k_ar5210_setupTxQueue(hal, queue_type, queue_info)
 }
 
 HAL_BOOL
-ar5k_ar5210_setTxQueueProps(hal, queue, queue_info)
+ar5k_ar5210_setup_tx_queueprops(hal, queue, queue_info)
 	struct ath_hal *hal;
 	int queue;
 	const HAL_TXQ_INFO *queue_info;
@@ -761,7 +761,7 @@ ar5k_ar5210_setTxQueueProps(hal, queue, queue_info)
 }
 
 HAL_BOOL
-ar5k_ar5210_releaseTxQueue(hal, queue)
+ar5k_ar5210_release_tx_queue(hal, queue)
 	struct ath_hal *hal;
 	u_int queue;
 {
@@ -795,7 +795,7 @@ ar5k_ar5210_init_tx_queue(hal, aifs, turbo)
 }
 
 HAL_BOOL
-ar5k_ar5210_resetTxQueue(hal, queue)
+ar5k_ar5210_reset_tx_queue(hal, queue)
 	struct ath_hal *hal;
 	u_int queue;
 {
@@ -851,7 +851,7 @@ ar5k_ar5210_resetTxQueue(hal, queue)
 }
 
 u_int32_t
-ar5k_ar5210_getTxDP(hal, queue)
+ar5k_ar5210_get_tx_buf(hal, queue)
 	struct ath_hal *hal;
 	u_int queue;
 {
@@ -878,7 +878,7 @@ ar5k_ar5210_getTxDP(hal, queue)
 }
 
 HAL_BOOL
-ar5k_ar5210_setTxDP(hal, queue, phys_addr)
+ar5k_ar5210_put_tx_buf(hal, queue, phys_addr)
 	struct ath_hal *hal;
 	u_int queue;
 	u_int32_t phys_addr;
@@ -909,7 +909,7 @@ ar5k_ar5210_setTxDP(hal, queue, phys_addr)
 }
 
 HAL_BOOL
-ar5k_ar5210_startTxDma(hal, queue)
+ar5k_ar5210_tx_start(hal, queue)
 	struct ath_hal *hal;
 	u_int queue;
 {
@@ -951,7 +951,7 @@ ar5k_ar5210_startTxDma(hal, queue)
 }
 
 HAL_BOOL
-ar5k_ar5210_stopTxDma(hal, queue)
+ar5k_ar5210_stop_tx_dma(hal, queue)
 	struct ath_hal *hal;
 	u_int queue;
 {
@@ -987,8 +987,8 @@ ar5k_ar5210_stopTxDma(hal, queue)
 }
 
 HAL_BOOL
-ar5k_ar5210_setupTxDesc(hal, desc, packet_length, header_length, type, tx_power,
-    tx_rate0, tx_tries0, key_index, antenna_mode, flags, rtscts_rate,
+ar5k_ar5210_setup_tx_desc(hal, desc, packet_length, header_length, type,
+    tx_power, tx_rate0, tx_tries0, key_index, antenna_mode, flags, rtscts_rate,
     rtscts_duration)
 	struct ath_hal *hal;
 	struct ath_desc *desc;
@@ -1029,15 +1029,15 @@ ar5k_ar5210_setupTxDesc(hal, desc, packet_length, header_length, type, tx_power,
 		frame_type = AR5K_AR5210_DESC_TX_FRAME_TYPE_PIFS;
 	else
 		frame_type = type;
-	
+
 	tx_desc->tx_control_0 =
 	    AR5K_REG_SM(frame_type, AR5K_AR5210_DESC_TX_CTL0_FRAME_TYPE);
 	tx_desc->tx_control_0 |=
 	    AR5K_REG_SM(tx_rate0, AR5K_AR5210_DESC_TX_CTL0_XMIT_RATE);
 
-#define _TX_FLAGS(_c, _flag)	 					\
+#define _TX_FLAGS(_c, _flag)						\
 	if (flags & HAL_TXDESC_##_flag)					\
-		tx_desc->tx_control_##_c |=    				\
+		tx_desc->tx_control_##_c |=				\
 			AR5K_AR5210_DESC_TX_CTL##_c##_##_flag
 
 	_TX_FLAGS(0, CLRDMASK);
@@ -1069,7 +1069,7 @@ ar5k_ar5210_setupTxDesc(hal, desc, packet_length, header_length, type, tx_power,
 }
 
 HAL_BOOL
-ar5k_ar5210_fillTxDesc(hal, desc, segment_length, first_segment, last_segment)
+ar5k_ar5210_fill_tx_desc(hal, desc, segment_length, first_segment, last_segment)
 	struct ath_hal *hal;
 	struct ath_desc *desc;
 	u_int segment_length;
@@ -1098,7 +1098,7 @@ ar5k_ar5210_fillTxDesc(hal, desc, segment_length, first_segment, last_segment)
 }
 
 HAL_BOOL
-ar5k_ar5210_setupXTxDesc(hal, desc, tx_rate1, tx_tries1, tx_rate2, tx_tries2,
+ar5k_ar5210_setup_xtx_desc(hal, desc, tx_rate1, tx_tries1, tx_rate2, tx_tries2,
     tx_rate3, tx_tries3)
 	struct ath_hal *hal;
 	struct ath_desc *desc;
@@ -1118,7 +1118,7 @@ ar5k_ar5210_setupXTxDesc(hal, desc, tx_rate1, tx_tries1, tx_rate2, tx_tries2,
 }
 
 HAL_STATUS
-ar5k_ar5210_procTxDesc(hal, desc)
+ar5k_ar5210_proc_tx_desc(hal, desc)
 	struct ath_hal *hal;
 	struct ath_desc *desc;
 {
@@ -1175,7 +1175,7 @@ ar5k_ar5210_procTxDesc(hal, desc)
 }
 
 HAL_BOOL
-ar5k_ar5210_hasVEOL(hal)
+ar5k_ar5210_has_veol(hal)
 	struct ath_hal *hal;
 {
 	return (AH_FALSE);
@@ -1186,14 +1186,14 @@ ar5k_ar5210_hasVEOL(hal)
  */
 
 u_int32_t
-ar5k_ar5210_getRxDP(hal)
+ar5k_ar5210_get_rx_buf(hal)
 	struct ath_hal *hal;
 {
 	return (AR5K_REG_READ(AR5K_AR5210_RXDP));
 }
 
 void
-ar5k_ar5210_setRxDP(hal, phys_addr)
+ar5k_ar5210_put_rx_buf(hal, phys_addr)
 	struct ath_hal *hal;
 	u_int32_t phys_addr;
 {
@@ -1201,14 +1201,14 @@ ar5k_ar5210_setRxDP(hal, phys_addr)
 }
 
 void
-ar5k_ar5210_enableReceive(hal)
+ar5k_ar5210_start_rx(hal)
 	struct ath_hal *hal;
 {
 	AR5K_REG_WRITE(AR5K_AR5210_CR, AR5K_AR5210_CR_RXE);
 }
 
 HAL_BOOL
-ar5k_ar5210_stopDmaReceive(hal)
+ar5k_ar5210_stop_rx_dma(hal)
 	struct ath_hal *hal;
 {
 	int i;
@@ -1227,21 +1227,21 @@ ar5k_ar5210_stopDmaReceive(hal)
 }
 
 void
-ar5k_ar5210_startPcuReceive(hal)
+ar5k_ar5210_start_rx_pcu(hal)
 	struct ath_hal *hal;
 {
 	AR5K_REG_DISABLE_BITS(AR5K_AR5210_DIAG_SW, AR5K_AR5210_DIAG_SW_DIS_RX);
 }
 
 void
-ar5k_ar5210_stopPcuReceive(hal)
+ar5k_ar5210_stop_pcu_recv(hal)
 	struct ath_hal *hal;
 {
 	AR5K_REG_ENABLE_BITS(AR5K_AR5210_DIAG_SW, AR5K_AR5210_DIAG_SW_DIS_RX);
 }
 
 void
-ar5k_ar5210_setMulticastFilter(hal, filter0, filter1)
+ar5k_ar5210_set_mcast_filter(hal, filter0, filter1)
 	struct ath_hal *hal;
 	u_int32_t filter0;
 	u_int32_t filter1;
@@ -1252,7 +1252,7 @@ ar5k_ar5210_setMulticastFilter(hal, filter0, filter1)
 }
 
 HAL_BOOL
-ar5k_ar5210_setMulticastFilterIndex(hal, index)
+ar5k_ar5210_set_mcast_filterindex(hal, index)
 	struct ath_hal *hal;
 	u_int32_t index;
 {
@@ -1270,7 +1270,7 @@ ar5k_ar5210_setMulticastFilterIndex(hal, index)
 }
 
 HAL_BOOL
-ar5k_ar5210_clrMulticastFilterIndex(hal, index)
+ar5k_ar5210_clear_mcast_filter_idx(hal, index)
 	struct ath_hal *hal;
 	u_int32_t index;
 {
@@ -1288,14 +1288,14 @@ ar5k_ar5210_clrMulticastFilterIndex(hal, index)
 }
 
 u_int32_t
-ar5k_ar5210_getRxFilter(hal)
+ar5k_ar5210_get_rx_filter(hal)
 	struct ath_hal *hal;
 {
 	return (AR5K_REG_READ(AR5K_AR5210_RX_FILTER));
 }
 
 void
-ar5k_ar5210_setRxFilter(hal, filter)
+ar5k_ar5210_set_rx_filter(hal, filter)
 	struct ath_hal *hal;
 	u_int32_t filter;
 {
@@ -1311,7 +1311,7 @@ ar5k_ar5210_setRxFilter(hal, filter)
 }
 
 HAL_BOOL
-ar5k_ar5210_setupRxDesc(hal, desc, size, flags)
+ar5k_ar5210_setup_rx_desc(hal, desc, size, flags)
 	struct ath_hal *hal;
 	struct ath_desc *desc;
 	u_int32_t size;
@@ -1332,7 +1332,7 @@ ar5k_ar5210_setupRxDesc(hal, desc, size, flags)
 }
 
 HAL_STATUS
-ar5k_ar5210_procRxDesc(hal, desc, phys_addr, next)
+ar5k_ar5210_proc_rx_desc(hal, desc, phys_addr, next)
 	struct ath_hal *hal;
 	struct ath_desc *desc;
 	u_int32_t phys_addr;
@@ -1408,7 +1408,7 @@ ar5k_ar5210_procRxDesc(hal, desc, phys_addr, next)
 }
 
 void
-ar5k_ar5210_rxMonitor(hal)
+ar5k_ar5210_set_rx_monitor(hal)
 	struct ath_hal *hal;
 {
 	/*
@@ -1423,7 +1423,7 @@ ar5k_ar5210_rxMonitor(hal)
  */
 
 void
-ar5k_ar5210_dumpState(hal)
+ar5k_ar5210_dump_state(hal)
 	struct ath_hal *hal;
 {
 #ifdef AR5K_DEBUG
@@ -1514,7 +1514,7 @@ ar5k_ar5210_dumpState(hal)
 }
 
 HAL_BOOL
-ar5k_ar5210_getDiagState(hal, id, device, size)
+ar5k_ar5210_get_diag_state(hal, id, device, size)
 	struct ath_hal *hal;
 	int id;
 	void **device;
@@ -1529,7 +1529,7 @@ ar5k_ar5210_getDiagState(hal, id, device, size)
 }
 
 void
-ar5k_ar5210_getMacAddress(hal, mac)
+ar5k_ar5210_get_lladdr(hal, mac)
 	struct ath_hal *hal;
 	u_int8_t *mac;
 {
@@ -1537,7 +1537,7 @@ ar5k_ar5210_getMacAddress(hal, mac)
 }
 
 HAL_BOOL
-ar5k_ar5210_setMacAddress(hal, mac)
+ar5k_ar5210_set_lladdr(hal, mac)
 	struct ath_hal *hal;
 	const u_int8_t *mac;
 {
@@ -1557,7 +1557,7 @@ ar5k_ar5210_setMacAddress(hal, mac)
 }
 
 HAL_BOOL
-ar5k_ar5210_setRegulatoryDomain(hal, regdomain, status)
+ar5k_ar5210_set_regdomain(hal, regdomain, status)
 	struct ath_hal *hal;
 	u_int16_t regdomain;
 	HAL_STATUS *status;
@@ -1579,7 +1579,7 @@ ar5k_ar5210_setRegulatoryDomain(hal, regdomain, status)
 }
 
 void
-ar5k_ar5210_setLedState(hal, state)
+ar5k_ar5210_set_ledstate(hal, state)
 	struct ath_hal *hal;
 	HAL_LED_STATE state;
 {
@@ -1612,7 +1612,7 @@ ar5k_ar5210_setLedState(hal, state)
 }
 
 void
-ar5k_ar5210_writeAssocid(hal, bssid, assoc_id, tim_offset)
+ar5k_ar5210_set_associd(hal, bssid, assoc_id, tim_offset)
 	struct ath_hal *hal;
 	const u_int8_t *bssid;
 	u_int16_t assoc_id;
@@ -1631,18 +1631,18 @@ ar5k_ar5210_writeAssocid(hal, bssid, assoc_id, tim_offset)
 	bcopy(bssid, &hal->ah_bssid, IEEE80211_ADDR_LEN);
 
 	if (assoc_id == 0) {
-		ar5k_ar5210_disablePSPoll(hal);
+		ar5k_ar5210_disable_pspoll(hal);
 		return;
 	}
 
 	AR5K_REG_WRITE_BITS(AR5K_AR5210_BEACON, AR5K_AR5210_BEACON_TIM,
 	    tim_offset ? tim_offset + 4 : 0);
 
-	ar5k_ar5210_enablePSPoll(hal, NULL, 0);
+	ar5k_ar5210_enable_pspoll(hal, NULL, 0);
 }
 
 HAL_BOOL
-ar5k_ar5210_gpioCfgOutput(hal, gpio)
+ar5k_ar5210_set_gpio_output(hal, gpio)
 	struct ath_hal *hal;
 	u_int32_t gpio;
 {
@@ -1657,7 +1657,7 @@ ar5k_ar5210_gpioCfgOutput(hal, gpio)
 }
 
 HAL_BOOL
-ar5k_ar5210_gpioCfgInput(hal, gpio)
+ar5k_ar5210_set_gpio_input(hal, gpio)
 	struct ath_hal *hal;
 	u_int32_t gpio;
 {
@@ -1672,7 +1672,7 @@ ar5k_ar5210_gpioCfgInput(hal, gpio)
 }
 
 u_int32_t
-ar5k_ar5210_gpioGet(hal, gpio)
+ar5k_ar5210_get_gpio(hal, gpio)
 	struct ath_hal *hal;
 	u_int32_t gpio;
 {
@@ -1685,7 +1685,7 @@ ar5k_ar5210_gpioGet(hal, gpio)
 }
 
 HAL_BOOL
-ar5k_ar5210_gpioSet(hal, gpio, val)
+ar5k_ar5210_set_gpio(hal, gpio, val)
 	struct ath_hal *hal;
 	u_int32_t gpio;
 	u_int32_t val;
@@ -1707,7 +1707,7 @@ ar5k_ar5210_gpioSet(hal, gpio, val)
 }
 
 void
-ar5k_ar5210_gpioSetIntr(hal, gpio, interrupt_level)
+ar5k_ar5210_set_gpio_intr(hal, gpio, interrupt_level)
 	struct ath_hal *hal;
 	u_int gpio;
 	u_int32_t interrupt_level;
@@ -1735,14 +1735,14 @@ ar5k_ar5210_gpioSetIntr(hal, gpio, interrupt_level)
 }
 
 u_int32_t
-ar5k_ar5210_getTsf32(hal)
+ar5k_ar5210_get_tsf32(hal)
 	struct ath_hal *hal;
 {
 	return (AR5K_REG_READ(AR5K_AR5210_TSF_L32));
 }
 
 u_int64_t
-ar5k_ar5210_getTsf64(hal)
+ar5k_ar5210_get_tsf64(hal)
 	struct ath_hal *hal;
 {
 	u_int64_t tsf = AR5K_REG_READ(AR5K_AR5210_TSF_U32);
@@ -1750,7 +1750,7 @@ ar5k_ar5210_getTsf64(hal)
 }
 
 void
-ar5k_ar5210_resetTsf(hal)
+ar5k_ar5210_reset_tsf(hal)
 	struct ath_hal *hal;
 {
 	AR5K_REG_ENABLE_BITS(AR5K_AR5210_BEACON,
@@ -1758,14 +1758,14 @@ ar5k_ar5210_resetTsf(hal)
 }
 
 u_int16_t
-ar5k_ar5210_getRegDomain(hal)
+ar5k_ar5210_get_regdomain(hal)
 	struct ath_hal *hal;
 {
 	return (ar5k_get_regdomain(hal));
 }
 
 HAL_BOOL
-ar5k_ar5210_detectCardPresent(hal)
+ar5k_ar5210_detect_card_present(hal)
 	struct ath_hal *hal;
 {
 	u_int16_t magic;
@@ -1782,7 +1782,7 @@ ar5k_ar5210_detectCardPresent(hal)
 }
 
 void
-ar5k_ar5210_updateMibCounters(hal, statistics)
+ar5k_ar5210_update_mib_counters(hal, statistics)
 	struct ath_hal *hal;
 	HAL_MIB_STATS *statistics;
 {
@@ -1794,14 +1794,14 @@ ar5k_ar5210_updateMibCounters(hal, statistics)
 }
 
 HAL_RFGAIN
-ar5k_ar5210_getRfGain(hal)
+ar5k_ar5210_get_rf_gain(hal)
 	struct ath_hal *hal;
 {
 	return (HAL_RFGAIN_INACTIVE);
 }
 
 HAL_BOOL
-ar5k_ar5210_setSlotTime(hal, slot_time)
+ar5k_ar5210_set_slot_time(hal, slot_time)
 	struct ath_hal *hal;
 	u_int slot_time;
 
@@ -1816,7 +1816,7 @@ ar5k_ar5210_setSlotTime(hal, slot_time)
 }
 
 u_int
-ar5k_ar5210_getSlotTime(hal)
+ar5k_ar5210_get_slot_time(hal)
 	struct ath_hal *hal;
 {
 	return (ar5k_clocktoh(AR5K_REG_READ(AR5K_AR5210_SLOT_TIME) &
@@ -1824,7 +1824,7 @@ ar5k_ar5210_getSlotTime(hal)
 }
 
 HAL_BOOL
-ar5k_ar5210_setAckTimeout(hal, timeout)
+ar5k_ar5210_set_ack_timeout(hal, timeout)
 	struct ath_hal *hal;
 	u_int timeout;
 {
@@ -1839,7 +1839,7 @@ ar5k_ar5210_setAckTimeout(hal, timeout)
 }
 
 u_int
-ar5k_ar5210_getAckTimeout(hal)
+ar5k_ar5210_get_ack_timeout(hal)
 	struct ath_hal *hal;
 {
 	return (ar5k_clocktoh(AR5K_REG_MS(AR5K_REG_READ(AR5K_AR5210_TIME_OUT),
@@ -1847,7 +1847,7 @@ ar5k_ar5210_getAckTimeout(hal)
 }
 
 HAL_BOOL
-ar5k_ar5210_setCTSTimeout(hal, timeout)
+ar5k_ar5210_set_cts_timeout(hal, timeout)
 	struct ath_hal *hal;
 	u_int timeout;
 {
@@ -1862,7 +1862,7 @@ ar5k_ar5210_setCTSTimeout(hal, timeout)
 }
 
 u_int
-ar5k_ar5210_getCTSTimeout(hal)
+ar5k_ar5210_get_cts_timeout(hal)
 	struct ath_hal *hal;
 {
 	return (ar5k_clocktoh(AR5K_REG_MS(AR5K_REG_READ(AR5K_AR5210_TIME_OUT),
@@ -1874,7 +1874,7 @@ ar5k_ar5210_getCTSTimeout(hal)
  */
 
 HAL_BOOL
-ar5k_ar5210_isHwCipherSupported(hal, cipher)
+ar5k_ar5210_is_cipher_supported(hal, cipher)
 	struct ath_hal *hal;
 	HAL_CIPHER cipher;
 {
@@ -1888,14 +1888,14 @@ ar5k_ar5210_isHwCipherSupported(hal, cipher)
 }
 
 u_int32_t
-ar5k_ar5210_getKeyCacheSize(hal)
+ar5k_ar5210_get_keycache_size(hal)
 	struct ath_hal *hal;
 {
 	return (AR5K_AR5210_KEYCACHE_SIZE);
 }
 
 HAL_BOOL
-ar5k_ar5210_resetKeyCacheEntry(hal, entry)
+ar5k_ar5210_reset_key(hal, entry)
 	struct ath_hal *hal;
 	u_int16_t entry;
 {
@@ -1910,7 +1910,7 @@ ar5k_ar5210_resetKeyCacheEntry(hal, entry)
 }
 
 HAL_BOOL
-ar5k_ar5210_isKeyCacheEntryValid(hal, entry)
+ar5k_ar5210_is_key_valid(hal, entry)
 	struct ath_hal *hal;
 	u_int16_t entry;
 {
@@ -1927,7 +1927,7 @@ ar5k_ar5210_isKeyCacheEntryValid(hal, entry)
 }
 
 HAL_BOOL
-ar5k_ar5210_setKeyCacheEntry(hal, entry, keyval, mac, xor_notused)
+ar5k_ar5210_set_key(hal, entry, keyval, mac, xor_notused)
 	struct ath_hal *hal;
 	u_int16_t entry;
 	const HAL_KEYVAL *keyval;
@@ -1974,11 +1974,11 @@ ar5k_ar5210_setKeyCacheEntry(hal, entry, keyval, mac, xor_notused)
 	for (i = 0; i < elements; i++)
 		AR5K_REG_WRITE(AR5K_AR5210_KEYTABLE_OFF(entry, i), key_v[i]);
 
-	return (ar5k_ar5210_setKeyCacheEntryMac(hal, entry, mac));
+	return (ar5k_ar5210_set_key_lladdr(hal, entry, mac));
 }
 
 HAL_BOOL
-ar5k_ar5210_setKeyCacheEntryMac(hal, entry, mac)
+ar5k_ar5210_set_key_lladdr(hal, entry, mac)
 	struct ath_hal *hal;
 	u_int16_t entry;
 	const u_int8_t *mac;
@@ -2009,7 +2009,7 @@ ar5k_ar5210_setKeyCacheEntryMac(hal, entry, mac)
  */
 
 HAL_BOOL
-ar5k_ar5210_setPowerMode(hal, mode, set_chip, sleep_duration)
+ar5k_ar5210_set_power(hal, mode, set_chip, sleep_duration)
 	struct ath_hal *hal;
 	HAL_POWER_MODE mode;
 	HAL_BOOL set_chip;
@@ -2074,14 +2074,14 @@ ar5k_ar5210_setPowerMode(hal, mode, set_chip, sleep_duration)
 }
 
 HAL_POWER_MODE
-ar5k_ar5210_getPowerMode(hal)
+ar5k_ar5210_get_power_mode(hal)
 	struct ath_hal *hal;
 {
 	return (hal->ah_power_mode);
 }
 
 HAL_BOOL
-ar5k_ar5210_queryPSPollSupport(hal)
+ar5k_ar5210_query_pspoll_support(hal)
 	struct ath_hal *hal;
 {
 	/* I think so, why not? */
@@ -2089,7 +2089,7 @@ ar5k_ar5210_queryPSPollSupport(hal)
 }
 
 HAL_BOOL
-ar5k_ar5210_initPSPoll(hal)
+ar5k_ar5210_init_pspoll(hal)
 	struct ath_hal *hal;
 {
 	/*
@@ -2099,7 +2099,7 @@ ar5k_ar5210_initPSPoll(hal)
 }
 
 HAL_BOOL
-ar5k_ar5210_enablePSPoll(hal, bssid, assoc_id)
+ar5k_ar5210_enable_pspoll(hal, bssid, assoc_id)
 	struct ath_hal *hal;
 	u_int8_t *bssid;
 	u_int16_t assoc_id;
@@ -2112,7 +2112,7 @@ ar5k_ar5210_enablePSPoll(hal, bssid, assoc_id)
 }
 
 HAL_BOOL
-ar5k_ar5210_disablePSPoll(hal)
+ar5k_ar5210_disable_pspoll(hal)
 	struct ath_hal *hal;
 {
 	AR5K_REG_ENABLE_BITS(AR5K_AR5210_STA_ID1,
@@ -2127,7 +2127,7 @@ ar5k_ar5210_disablePSPoll(hal)
  */
 
 void
-ar5k_ar5210_beaconInit(hal, next_beacon, interval)
+ar5k_ar5210_init_beacon(hal, next_beacon, interval)
 	struct ath_hal *hal;
 	u_int32_t next_beacon;
 	u_int32_t interval;
@@ -2166,7 +2166,7 @@ ar5k_ar5210_beaconInit(hal, next_beacon, interval)
 }
 
 void
-ar5k_ar5210_setStationBeaconTimers(hal, state, tsf, dtim_count, cfp_count)
+ar5k_ar5210_set_beacon_timers(hal, state, tsf, dtim_count, cfp_count)
 	struct ath_hal *hal;
 	const HAL_BEACON_STATE *state;
 	u_int32_t tsf;
@@ -2230,7 +2230,7 @@ ar5k_ar5210_setStationBeaconTimers(hal, state, tsf, dtim_count, cfp_count)
 }
 
 void
-ar5k_ar5210_resetStationBeaconTimers(hal)
+ar5k_ar5210_reset_beacon(hal)
 	struct ath_hal *hal;
 {
 	/*
@@ -2247,7 +2247,7 @@ ar5k_ar5210_resetStationBeaconTimers(hal)
 }
 
 HAL_BOOL
-ar5k_ar5210_waitForBeaconDone(hal, phys_addr)
+ar5k_ar5210_wait_for_beacon(hal, phys_addr)
 	struct ath_hal *hal;
 	bus_addr_t phys_addr;
 {
@@ -2282,14 +2282,14 @@ ar5k_ar5210_waitForBeaconDone(hal, phys_addr)
  */
 
 HAL_BOOL
-ar5k_ar5210_isInterruptPending(hal)
+ar5k_ar5210_is_intr_pending(hal)
 	struct ath_hal *hal;
 {
 	return (AR5K_REG_READ(AR5K_AR5210_INTPEND) == 0 ? AH_FALSE : AH_TRUE);
 }
 
 HAL_BOOL
-ar5k_ar5210_getPendingInterrupts(hal, interrupt_mask)
+ar5k_ar5210_get_isr(hal, interrupt_mask)
 	struct ath_hal *hal;
 	u_int32_t *interrupt_mask;
 {
@@ -2326,7 +2326,7 @@ ar5k_ar5210_getPendingInterrupts(hal, interrupt_mask)
 }
 
 u_int32_t
-ar5k_ar5210_getInterrupts(hal)
+ar5k_ar5210_get_intr(hal)
 	struct ath_hal *hal;
 {
 	/* Return the interrupt mask stored previously */
@@ -2334,7 +2334,7 @@ ar5k_ar5210_getInterrupts(hal)
 }
 
 HAL_INT
-ar5k_ar5210_setInterrupts(hal, new_mask)
+ar5k_ar5210_set_intr(hal, new_mask)
 	struct ath_hal *hal;
 	HAL_INT new_mask;
 {
diff --git a/sys/dev/ic/ar5210var.h b/sys/dev/ic/ar5210var.h
index c2af624a9cd..5ead7bc3c28 100644
--- a/sys/dev/ic/ar5210var.h
+++ b/sys/dev/ic/ar5210var.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ar5210var.h,v 1.9 2005/04/09 00:20:42 reyk Exp $	*/
+/*	$OpenBSD: ar5210var.h,v 1.10 2005/04/18 18:42:55 reyk Exp $	*/
 
 /*
  * Copyright (c) 2004, 2005 Reyk Floeter <reyk@vantronix.net>
@@ -68,7 +68,7 @@ struct ar5k_ar5210_rx_status {
 	 * RX status word 0
 	 */
 	u_int32_t	rx_status_0;
-	
+
 #define AR5K_AR5210_DESC_RX_STATUS0_DATA_LEN		0x00000fff
 #define AR5K_AR5210_DESC_RX_STATUS0_MORE		0x00001000
 #define AR5K_AR5210_DESC_RX_STATUS0_RECEIVE_ANTENNA	0x00004000
diff --git a/sys/dev/ic/ar5211.c b/sys/dev/ic/ar5211.c
index 060fa111ebe..dc5f260e203 100644
--- a/sys/dev/ic/ar5211.c
+++ b/sys/dev/ic/ar5211.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ar5211.c,v 1.10 2005/04/08 22:12:21 reyk Exp $	*/
+/*	$OpenBSD: ar5211.c,v 1.11 2005/04/18 18:42:55 reyk Exp $	*/
 
 /*
  * Copyright (c) 2004, 2005 Reyk Floeter <reyk@vantronix.net>
@@ -49,116 +49,116 @@ ar5k_ar5211_fill(hal)
 	/*
 	 * Init/Exit functions
 	 */
-	AR5K_HAL_FUNCTION(hal, ar5211, getRateTable);
+	AR5K_HAL_FUNCTION(hal, ar5211, get_rate_table);
 	AR5K_HAL_FUNCTION(hal, ar5211, detach);
 
 	/*
 	 * Reset functions
 	 */
 	AR5K_HAL_FUNCTION(hal, ar5211, reset);
-	AR5K_HAL_FUNCTION(hal, ar5211, setPCUConfig);
-	AR5K_HAL_FUNCTION(hal, ar5211, perCalibration);
+	AR5K_HAL_FUNCTION(hal, ar5211, set_opmode);
+	AR5K_HAL_FUNCTION(hal, ar5211, calibrate);
 
 	/*
 	 * TX functions
 	 */
-	AR5K_HAL_FUNCTION(hal, ar5211, updateTxTrigLevel);
-	AR5K_HAL_FUNCTION(hal, ar5211, setupTxQueue);
-	AR5K_HAL_FUNCTION(hal, ar5211, setTxQueueProps);
-	AR5K_HAL_FUNCTION(hal, ar5211, releaseTxQueue);
-	AR5K_HAL_FUNCTION(hal, ar5211, resetTxQueue);
-	AR5K_HAL_FUNCTION(hal, ar5211, getTxDP);
-	AR5K_HAL_FUNCTION(hal, ar5211, setTxDP);
-	AR5K_HAL_FUNCTION(hal, ar5211, startTxDma);
-	AR5K_HAL_FUNCTION(hal, ar5211, stopTxDma);
-	AR5K_HAL_FUNCTION(hal, ar5211, setupTxDesc);
-	AR5K_HAL_FUNCTION(hal, ar5211, setupXTxDesc);
-	AR5K_HAL_FUNCTION(hal, ar5211, fillTxDesc);
-	AR5K_HAL_FUNCTION(hal, ar5211, procTxDesc);
-	AR5K_HAL_FUNCTION(hal, ar5211, hasVEOL);
+	AR5K_HAL_FUNCTION(hal, ar5211, update_tx_triglevel);
+	AR5K_HAL_FUNCTION(hal, ar5211, setup_tx_queue);
+	AR5K_HAL_FUNCTION(hal, ar5211, setup_tx_queueprops);
+	AR5K_HAL_FUNCTION(hal, ar5211, release_tx_queue);
+	AR5K_HAL_FUNCTION(hal, ar5211, reset_tx_queue);
+	AR5K_HAL_FUNCTION(hal, ar5211, get_tx_buf);
+	AR5K_HAL_FUNCTION(hal, ar5211, put_tx_buf);
+	AR5K_HAL_FUNCTION(hal, ar5211, tx_start);
+	AR5K_HAL_FUNCTION(hal, ar5211, stop_tx_dma);
+	AR5K_HAL_FUNCTION(hal, ar5211, setup_tx_desc);
+	AR5K_HAL_FUNCTION(hal, ar5211, setup_xtx_desc);
+	AR5K_HAL_FUNCTION(hal, ar5211, fill_tx_desc);
+	AR5K_HAL_FUNCTION(hal, ar5211, proc_tx_desc);
+	AR5K_HAL_FUNCTION(hal, ar5211, has_veol);
 
 	/*
 	 * RX functions
 	 */
-	AR5K_HAL_FUNCTION(hal, ar5211, getRxDP);
-	AR5K_HAL_FUNCTION(hal, ar5211, setRxDP);
-	AR5K_HAL_FUNCTION(hal, ar5211, enableReceive);
-	AR5K_HAL_FUNCTION(hal, ar5211, stopDmaReceive);
-	AR5K_HAL_FUNCTION(hal, ar5211, startPcuReceive);
-	AR5K_HAL_FUNCTION(hal, ar5211, stopPcuReceive);
-	AR5K_HAL_FUNCTION(hal, ar5211, setMulticastFilter);
-	AR5K_HAL_FUNCTION(hal, ar5211, setMulticastFilterIndex);
-	AR5K_HAL_FUNCTION(hal, ar5211, clrMulticastFilterIndex);
-	AR5K_HAL_FUNCTION(hal, ar5211, getRxFilter);
-	AR5K_HAL_FUNCTION(hal, ar5211, setRxFilter);
-	AR5K_HAL_FUNCTION(hal, ar5211, setupRxDesc);
-	AR5K_HAL_FUNCTION(hal, ar5211, procRxDesc);
-	AR5K_HAL_FUNCTION(hal, ar5211, rxMonitor);
+	AR5K_HAL_FUNCTION(hal, ar5211, get_rx_buf);
+	AR5K_HAL_FUNCTION(hal, ar5211, put_rx_buf);
+	AR5K_HAL_FUNCTION(hal, ar5211, start_rx);
+	AR5K_HAL_FUNCTION(hal, ar5211, stop_rx_dma);
+	AR5K_HAL_FUNCTION(hal, ar5211, start_rx_pcu);
+	AR5K_HAL_FUNCTION(hal, ar5211, stop_pcu_recv);
+	AR5K_HAL_FUNCTION(hal, ar5211, set_mcast_filter);
+	AR5K_HAL_FUNCTION(hal, ar5211, set_mcast_filterindex);
+	AR5K_HAL_FUNCTION(hal, ar5211, clear_mcast_filter_idx);
+	AR5K_HAL_FUNCTION(hal, ar5211, get_rx_filter);
+	AR5K_HAL_FUNCTION(hal, ar5211, set_rx_filter);
+	AR5K_HAL_FUNCTION(hal, ar5211, setup_rx_desc);
+	AR5K_HAL_FUNCTION(hal, ar5211, proc_rx_desc);
+	AR5K_HAL_FUNCTION(hal, ar5211, set_rx_monitor);
 
 	/*
 	 * Misc functions
 	 */
-	AR5K_HAL_FUNCTION(hal, ar5211, dumpState);
-	AR5K_HAL_FUNCTION(hal, ar5211, getDiagState);
-	AR5K_HAL_FUNCTION(hal, ar5211, getMacAddress);
-	AR5K_HAL_FUNCTION(hal, ar5211, setMacAddress);
-	AR5K_HAL_FUNCTION(hal, ar5211, setRegulatoryDomain);
-	AR5K_HAL_FUNCTION(hal, ar5211, setLedState);
-	AR5K_HAL_FUNCTION(hal, ar5211, writeAssocid);
-	AR5K_HAL_FUNCTION(hal, ar5211, gpioCfgInput);
-	AR5K_HAL_FUNCTION(hal, ar5211, gpioCfgOutput);
-	AR5K_HAL_FUNCTION(hal, ar5211, gpioGet);
-	AR5K_HAL_FUNCTION(hal, ar5211, gpioSet);
-	AR5K_HAL_FUNCTION(hal, ar5211, gpioSetIntr);
-	AR5K_HAL_FUNCTION(hal, ar5211, getTsf32);
-	AR5K_HAL_FUNCTION(hal, ar5211, getTsf64);
-	AR5K_HAL_FUNCTION(hal, ar5211, resetTsf);
-	AR5K_HAL_FUNCTION(hal, ar5211, getRegDomain);
-	AR5K_HAL_FUNCTION(hal, ar5211, detectCardPresent);
-	AR5K_HAL_FUNCTION(hal, ar5211, updateMibCounters);
-	AR5K_HAL_FUNCTION(hal, ar5211, getRfGain);
-	AR5K_HAL_FUNCTION(hal, ar5211, setSlotTime);
-	AR5K_HAL_FUNCTION(hal, ar5211, getSlotTime);
-	AR5K_HAL_FUNCTION(hal, ar5211, setAckTimeout);
-	AR5K_HAL_FUNCTION(hal, ar5211, getAckTimeout);
-	AR5K_HAL_FUNCTION(hal, ar5211, setCTSTimeout);
-	AR5K_HAL_FUNCTION(hal, ar5211, getCTSTimeout);
+	AR5K_HAL_FUNCTION(hal, ar5211, dump_state);
+	AR5K_HAL_FUNCTION(hal, ar5211, get_diag_state);
+	AR5K_HAL_FUNCTION(hal, ar5211, get_lladdr);
+	AR5K_HAL_FUNCTION(hal, ar5211, set_lladdr);
+	AR5K_HAL_FUNCTION(hal, ar5211, set_regdomain);
+	AR5K_HAL_FUNCTION(hal, ar5211, set_ledstate);
+	AR5K_HAL_FUNCTION(hal, ar5211, set_associd);
+	AR5K_HAL_FUNCTION(hal, ar5211, set_gpio_input);
+	AR5K_HAL_FUNCTION(hal, ar5211, set_gpio_output);
+	AR5K_HAL_FUNCTION(hal, ar5211, get_gpio);
+	AR5K_HAL_FUNCTION(hal, ar5211, set_gpio);
+	AR5K_HAL_FUNCTION(hal, ar5211, set_gpio_intr);
+	AR5K_HAL_FUNCTION(hal, ar5211, get_tsf32);
+	AR5K_HAL_FUNCTION(hal, ar5211, get_tsf64);
+	AR5K_HAL_FUNCTION(hal, ar5211, reset_tsf);
+	AR5K_HAL_FUNCTION(hal, ar5211, get_regdomain);
+	AR5K_HAL_FUNCTION(hal, ar5211, detect_card_present);
+	AR5K_HAL_FUNCTION(hal, ar5211, update_mib_counters);
+	AR5K_HAL_FUNCTION(hal, ar5211, get_rf_gain);
+	AR5K_HAL_FUNCTION(hal, ar5211, set_slot_time);
+	AR5K_HAL_FUNCTION(hal, ar5211, get_slot_time);
+	AR5K_HAL_FUNCTION(hal, ar5211, set_ack_timeout);
+	AR5K_HAL_FUNCTION(hal, ar5211, get_ack_timeout);
+	AR5K_HAL_FUNCTION(hal, ar5211, set_cts_timeout);
+	AR5K_HAL_FUNCTION(hal, ar5211, get_cts_timeout);
 
 	/*
 	 * Key table (WEP) functions
 	 */
-	AR5K_HAL_FUNCTION(hal, ar5211, isHwCipherSupported);
-	AR5K_HAL_FUNCTION(hal, ar5211, getKeyCacheSize);
-	AR5K_HAL_FUNCTION(hal, ar5211, resetKeyCacheEntry);
-	AR5K_HAL_FUNCTION(hal, ar5211, isKeyCacheEntryValid);
-	AR5K_HAL_FUNCTION(hal, ar5211, setKeyCacheEntry);
-	AR5K_HAL_FUNCTION(hal, ar5211, setKeyCacheEntryMac);
+	AR5K_HAL_FUNCTION(hal, ar5211, is_cipher_supported);
+	AR5K_HAL_FUNCTION(hal, ar5211, get_keycache_size);
+	AR5K_HAL_FUNCTION(hal, ar5211, reset_key);
+	AR5K_HAL_FUNCTION(hal, ar5211, is_key_valid);
+	AR5K_HAL_FUNCTION(hal, ar5211, set_key);
+	AR5K_HAL_FUNCTION(hal, ar5211, set_key_lladdr);
 
 	/*
 	 * Power management functions
 	 */
-	AR5K_HAL_FUNCTION(hal, ar5211, setPowerMode);
-	AR5K_HAL_FUNCTION(hal, ar5211, getPowerMode);
-	AR5K_HAL_FUNCTION(hal, ar5211, queryPSPollSupport);
-	AR5K_HAL_FUNCTION(hal, ar5211, initPSPoll);
-	AR5K_HAL_FUNCTION(hal, ar5211, enablePSPoll);
-	AR5K_HAL_FUNCTION(hal, ar5211, disablePSPoll);
+	AR5K_HAL_FUNCTION(hal, ar5211, set_power);
+	AR5K_HAL_FUNCTION(hal, ar5211, get_power_mode);
+	AR5K_HAL_FUNCTION(hal, ar5211, query_pspoll_support);
+	AR5K_HAL_FUNCTION(hal, ar5211, init_pspoll);
+	AR5K_HAL_FUNCTION(hal, ar5211, enable_pspoll);
+	AR5K_HAL_FUNCTION(hal, ar5211, disable_pspoll);
 
 	/*
 	 * Beacon functions
 	 */
-	AR5K_HAL_FUNCTION(hal, ar5211, beaconInit);
-	AR5K_HAL_FUNCTION(hal, ar5211, setStationBeaconTimers);
-	AR5K_HAL_FUNCTION(hal, ar5211, resetStationBeaconTimers);
-	AR5K_HAL_FUNCTION(hal, ar5211, waitForBeaconDone);
+	AR5K_HAL_FUNCTION(hal, ar5211, init_beacon);
+	AR5K_HAL_FUNCTION(hal, ar5211, set_beacon_timers);
+	AR5K_HAL_FUNCTION(hal, ar5211, reset_beacon);
+	AR5K_HAL_FUNCTION(hal, ar5211, wait_for_beacon);
 
 	/*
 	 * Interrupt functions
 	 */
-	AR5K_HAL_FUNCTION(hal, ar5211, isInterruptPending);
-	AR5K_HAL_FUNCTION(hal, ar5211, getPendingInterrupts);
-	AR5K_HAL_FUNCTION(hal, ar5211, getInterrupts);
-	AR5K_HAL_FUNCTION(hal, ar5211, setInterrupts);
+	AR5K_HAL_FUNCTION(hal, ar5211, is_intr_pending);
+	AR5K_HAL_FUNCTION(hal, ar5211, get_isr);
+	AR5K_HAL_FUNCTION(hal, ar5211, get_intr);
+	AR5K_HAL_FUNCTION(hal, ar5211, set_intr);
 
 	/*
 	 * Chipset functions (ar5k-specific, non-HAL)
@@ -213,9 +213,9 @@ ar5k_ar5211_attach(device, sc, st, sh, status)
 	hal->ah_phy = AR5K_AR5211_PHY(0);
 
 	bcopy(etherbroadcastaddr, mac, IEEE80211_ADDR_LEN);
-	ar5k_ar5211_writeAssocid(hal, mac, 0, 0);
-	ar5k_ar5211_getMacAddress(hal, mac);
-	ar5k_ar5211_setPCUConfig(hal);
+	ar5k_ar5211_set_associd(hal, mac, 0, 0);
+	ar5k_ar5211_get_lladdr(hal, mac);
+	ar5k_ar5211_set_opmode(hal);
 
 	return (hal);
 }
@@ -310,7 +310,7 @@ ar5k_ar5211_nic_wakeup(hal, flags)
 	}
 
 	/* ...wakeup */
-	if (ar5k_ar5211_setPowerMode(hal,
+	if (ar5k_ar5211_set_power(hal,
 		HAL_PM_AWAKE, AH_TRUE, 0) == AH_FALSE) {
 		AR5K_PRINT("failed to resume the AR5211 (again)\n");
 		return (AH_FALSE);
@@ -373,7 +373,7 @@ ar5k_ar5211_radio_revision(hal, chip)
 }
 
 const HAL_RATE_TABLE *
-ar5k_ar5211_getRateTable(hal, mode)
+ar5k_ar5211_get_rate_table(hal, mode)
 	struct ath_hal *hal;
 	u_int mode;
 {
@@ -567,8 +567,8 @@ ar5k_ar5211_reset(hal, op_mode, channel, change_channel, status)
 	 * Misc
 	 */
 	bcopy(etherbroadcastaddr, mac, IEEE80211_ADDR_LEN);
-	ar5k_ar5211_writeAssocid(hal, mac, 0, 0);
-	ar5k_ar5211_setPCUConfig(hal);
+	ar5k_ar5211_set_associd(hal, mac, 0, 0);
+	ar5k_ar5211_set_opmode(hal);
 	AR5K_REG_WRITE(AR5K_AR5211_PISR, 0xffffffff);
 	AR5K_REG_WRITE(AR5K_AR5211_RSSI_THR, AR5K_TUNE_RSSI_THRES);
 
@@ -612,24 +612,24 @@ ar5k_ar5211_reset(hal, op_mode, channel, change_channel, status)
 	 */
 	for (i = 0; i < hal->ah_capabilities.cap_queues.q_tx_num; i++) {
 		AR5K_REG_WRITE_Q(AR5K_AR5211_DCU_QCUMASK(i), i);
-		if (ar5k_ar5211_resetTxQueue(hal, i) == AH_FALSE) {
+		if (ar5k_ar5211_reset_tx_queue(hal, i) == AH_FALSE) {
 			AR5K_PRINTF("failed to reset TX queue #%d\n", i);
 			return (AH_FALSE);
 		}
 	}
 
 	/* Pre-enable interrupts */
-	ar5k_ar5211_setInterrupts(hal, HAL_INT_RX | HAL_INT_TX | HAL_INT_FATAL);
+	ar5k_ar5211_set_intr(hal, HAL_INT_RX | HAL_INT_TX | HAL_INT_FATAL);
 
 	/*
 	 * Set RF kill flags if supported by the device (read from the EEPROM)
 	 */
 	if (AR5K_EEPROM_HDR_RFKILL(hal->ah_capabilities.cap_eeprom.ee_header)) {
-		ar5k_ar5211_gpioCfgInput(hal, 0);
-		if ((hal->ah_gpio[0] = ar5k_ar5211_gpioGet(hal, 0)) == 0)
-			ar5k_ar5211_gpioSetIntr(hal, 0, 1);
+		ar5k_ar5211_set_gpio_input(hal, 0);
+		if ((hal->ah_gpio[0] = ar5k_ar5211_get_gpio(hal, 0)) == 0)
+			ar5k_ar5211_set_gpio_intr(hal, 0, 1);
 		else
-			ar5k_ar5211_gpioSetIntr(hal, 0, 0);
+			ar5k_ar5211_set_gpio_intr(hal, 0, 0);
 	}
 
 	/* 
@@ -642,7 +642,7 @@ ar5k_ar5211_reset(hal, op_mode, channel, change_channel, status)
 }
 
 void
-ar5k_ar5211_setPCUConfig(hal)
+ar5k_ar5211_set_opmode(hal)
 	struct ath_hal *hal;
 {
 	u_int32_t pcu_reg, low_id, high_id;
@@ -681,7 +681,7 @@ ar5k_ar5211_setPCUConfig(hal)
 }
 
 HAL_BOOL
-ar5k_ar5211_perCalibration(hal, channel)
+ar5k_ar5211_calibrate(hal, channel)
 	struct ath_hal *hal;
 	HAL_CHANNEL *channel;
 {
@@ -725,7 +725,7 @@ ar5k_ar5211_perCalibration(hal, channel)
  */
 
 HAL_BOOL
-ar5k_ar5211_updateTxTrigLevel(hal, increase)
+ar5k_ar5211_update_tx_triglevel(hal, increase)
 	struct ath_hal *hal;
 	HAL_BOOL increase;
 {
@@ -735,7 +735,7 @@ ar5k_ar5211_updateTxTrigLevel(hal, increase)
 	/*
 	 * Disable interrupts by setting the mask
 	 */
-	imr = ar5k_ar5211_setInterrupts(hal, hal->ah_imr & ~HAL_INT_GLOBAL);
+	imr = ar5k_ar5211_set_intr(hal, hal->ah_imr & ~HAL_INT_GLOBAL);
 
 	trigger_level = AR5K_REG_MS(AR5K_REG_READ(AR5K_AR5211_TXCFG),
 	    AR5K_AR5211_TXCFG_TXFULL);
@@ -758,13 +758,13 @@ ar5k_ar5211_updateTxTrigLevel(hal, increase)
 	/*
 	 * Restore interrupt mask
 	 */
-	ar5k_ar5211_setInterrupts(hal, imr);
+	ar5k_ar5211_set_intr(hal, imr);
 
 	return (status);
 }
 
 int
-ar5k_ar5211_setupTxQueue(hal, queue_type, queue_info)
+ar5k_ar5211_setup_tx_queue(hal, queue_type, queue_info)
 	struct ath_hal *hal;
 	HAL_TX_QUEUE queue_type;
 	const HAL_TXQ_INFO *queue_info;
@@ -796,7 +796,7 @@ ar5k_ar5211_setupTxQueue(hal, queue_type, queue_info)
 	hal->ah_txq[queue].tqi_type = queue_type;
 
 	if (queue_info != NULL) {
-		if (ar5k_ar5211_setTxQueueProps(hal, queue, queue_info)
+		if (ar5k_ar5211_setup_tx_queueprops(hal, queue, queue_info)
 		    != AH_TRUE)
 			return (-1);
 	}
@@ -807,7 +807,7 @@ ar5k_ar5211_setupTxQueue(hal, queue_type, queue_info)
 }
 
 HAL_BOOL
-ar5k_ar5211_setTxQueueProps(hal, queue, queue_info)
+ar5k_ar5211_setup_tx_queueprops(hal, queue, queue_info)
 	struct ath_hal *hal;
 	int queue;
 	const HAL_TXQ_INFO *queue_info;
@@ -829,7 +829,7 @@ ar5k_ar5211_setTxQueueProps(hal, queue, queue_info)
 }
 
 HAL_BOOL
-ar5k_ar5211_releaseTxQueue(hal, queue)
+ar5k_ar5211_release_tx_queue(hal, queue)
 	struct ath_hal *hal;
 	u_int queue;
 {
@@ -843,7 +843,7 @@ ar5k_ar5211_releaseTxQueue(hal, queue)
 }
 
 HAL_BOOL
-ar5k_ar5211_resetTxQueue(hal, queue)
+ar5k_ar5211_reset_tx_queue(hal, queue)
 	struct ath_hal *hal;
 	u_int queue;
 {
@@ -1021,7 +1021,7 @@ ar5k_ar5211_resetTxQueue(hal, queue)
 }
 
 u_int32_t
-ar5k_ar5211_getTxDP(hal, queue)
+ar5k_ar5211_get_tx_buf(hal, queue)
 	struct ath_hal *hal;
 	u_int queue;
 {
@@ -1034,7 +1034,7 @@ ar5k_ar5211_getTxDP(hal, queue)
 }
 
 HAL_BOOL
-ar5k_ar5211_setTxDP(hal, queue, phys_addr)
+ar5k_ar5211_put_tx_buf(hal, queue, phys_addr)
 	struct ath_hal *hal;
 	u_int queue;
 	u_int32_t phys_addr;
@@ -1054,7 +1054,7 @@ ar5k_ar5211_setTxDP(hal, queue, phys_addr)
 }
 
 HAL_BOOL
-ar5k_ar5211_startTxDma(hal, queue)
+ar5k_ar5211_tx_start(hal, queue)
 	struct ath_hal *hal;
 	u_int queue;
 {
@@ -1071,7 +1071,7 @@ ar5k_ar5211_startTxDma(hal, queue)
 }
 
 HAL_BOOL
-ar5k_ar5211_stopTxDma(hal, queue)
+ar5k_ar5211_stop_tx_dma(hal, queue)
 	struct ath_hal *hal;
 	u_int queue;
 {
@@ -1097,8 +1097,8 @@ ar5k_ar5211_stopTxDma(hal, queue)
 }
 
 HAL_BOOL
-ar5k_ar5211_setupTxDesc(hal, desc, packet_length, header_length, type, tx_power,
-    tx_rate0, tx_tries0, key_index, antenna_mode, flags, rtscts_rate,
+ar5k_ar5211_setup_tx_desc(hal, desc, packet_length, header_length, type,
+    tx_power, tx_rate0, tx_tries0, key_index, antenna_mode, flags, rtscts_rate,
     rtscts_duration)
 	struct ath_hal *hal;
 	struct ath_desc *desc;
@@ -1134,9 +1134,9 @@ ar5k_ar5211_setupTxDesc(hal, desc, packet_length, header_length, type, tx_power,
 	tx_desc->tx_control_1 =
 	    AR5K_REG_SM(type, AR5K_AR5211_DESC_TX_CTL1_FRAME_TYPE);
 
-#define _TX_FLAGS(_c, _flag)	 					\
+#define _TX_FLAGS(_c, _flag)						\
 	if (flags & HAL_TXDESC_##_flag)					\
-		tx_desc->tx_control_##_c |=    				\
+		tx_desc->tx_control_##_c |=				\
 			AR5K_AR5211_DESC_TX_CTL##_c##_##_flag
 
 	_TX_FLAGS(0, CLRDMASK);
@@ -1162,7 +1162,7 @@ ar5k_ar5211_setupTxDesc(hal, desc, packet_length, header_length, type, tx_power,
 }
 
 HAL_BOOL
-ar5k_ar5211_fillTxDesc(hal, desc, segment_length, first_segment, last_segment)
+ar5k_ar5211_fill_tx_desc(hal, desc, segment_length, first_segment, last_segment)
 	struct ath_hal *hal;
 	struct ath_desc *desc;
 	u_int segment_length;
@@ -1191,7 +1191,7 @@ ar5k_ar5211_fillTxDesc(hal, desc, segment_length, first_segment, last_segment)
 }
 
 HAL_BOOL
-ar5k_ar5211_setupXTxDesc(hal, desc, tx_rate1, tx_tries1, tx_rate2, tx_tries2,
+ar5k_ar5211_setup_xtx_desc(hal, desc, tx_rate1, tx_tries1, tx_rate2, tx_tries2,
     tx_rate3, tx_tries3)
 	struct ath_hal *hal;
 	struct ath_desc *desc;
@@ -1206,7 +1206,7 @@ ar5k_ar5211_setupXTxDesc(hal, desc, tx_rate1, tx_tries1, tx_rate2, tx_tries2,
 }
 
 HAL_STATUS
-ar5k_ar5211_procTxDesc(hal, desc)
+ar5k_ar5211_proc_tx_desc(hal, desc)
 	struct ath_hal *hal;
 	struct ath_desc *desc;
 {
@@ -1263,7 +1263,7 @@ ar5k_ar5211_procTxDesc(hal, desc)
 }
 
 HAL_BOOL
-ar5k_ar5211_hasVEOL(hal)
+ar5k_ar5211_has_veol(hal)
 	struct ath_hal *hal;
 {
 	return (AH_TRUE);
@@ -1274,14 +1274,14 @@ ar5k_ar5211_hasVEOL(hal)
  */
 
 u_int32_t
-ar5k_ar5211_getRxDP(hal)
+ar5k_ar5211_get_rx_buf(hal)
 	struct ath_hal *hal;
 {
 	return (AR5K_REG_READ(AR5K_AR5211_RXDP));
 }
 
 void
-ar5k_ar5211_setRxDP(hal, phys_addr)
+ar5k_ar5211_put_rx_buf(hal, phys_addr)
 	struct ath_hal *hal;
 	u_int32_t phys_addr;
 {
@@ -1289,14 +1289,14 @@ ar5k_ar5211_setRxDP(hal, phys_addr)
 }
 
 void
-ar5k_ar5211_enableReceive(hal)
+ar5k_ar5211_start_rx(hal)
 	struct ath_hal *hal;
 {
 	AR5K_REG_WRITE(AR5K_AR5211_CR, AR5K_AR5211_CR_RXE);
 }
 
 HAL_BOOL
-ar5k_ar5211_stopDmaReceive(hal)
+ar5k_ar5211_stop_rx_dma(hal)
 	struct ath_hal *hal;
 {
 	int i;
@@ -1315,21 +1315,21 @@ ar5k_ar5211_stopDmaReceive(hal)
 }
 
 void
-ar5k_ar5211_startPcuReceive(hal)
+ar5k_ar5211_start_rx_pcu(hal)
 	struct ath_hal *hal;
 {
 	AR5K_REG_DISABLE_BITS(AR5K_AR5211_DIAG_SW, AR5K_AR5211_DIAG_SW_DIS_RX);
 }
 
 void
-ar5k_ar5211_stopPcuReceive(hal)
+ar5k_ar5211_stop_pcu_recv(hal)
 	struct ath_hal *hal;
 {
 	AR5K_REG_ENABLE_BITS(AR5K_AR5211_DIAG_SW, AR5K_AR5211_DIAG_SW_DIS_RX);
 }
 
 void
-ar5k_ar5211_setMulticastFilter(hal, filter0, filter1)
+ar5k_ar5211_set_mcast_filter(hal, filter0, filter1)
 	struct ath_hal *hal;
 	u_int32_t filter0;
 	u_int32_t filter1;
@@ -1340,7 +1340,7 @@ ar5k_ar5211_setMulticastFilter(hal, filter0, filter1)
 }
 
 HAL_BOOL
-ar5k_ar5211_setMulticastFilterIndex(hal, index)
+ar5k_ar5211_set_mcast_filterindex(hal, index)
 	struct ath_hal *hal;
 	u_int32_t index;
 {
@@ -1358,7 +1358,7 @@ ar5k_ar5211_setMulticastFilterIndex(hal, index)
 }
 
 HAL_BOOL
-ar5k_ar5211_clrMulticastFilterIndex(hal, index)
+ar5k_ar5211_clear_mcast_filter_idx(hal, index)
 	struct ath_hal *hal;
 	u_int32_t index;
 {
@@ -1377,14 +1377,14 @@ ar5k_ar5211_clrMulticastFilterIndex(hal, index)
 }
 
 u_int32_t
-ar5k_ar5211_getRxFilter(hal)
+ar5k_ar5211_get_rx_filter(hal)
 	struct ath_hal *hal;
 {
 	return (AR5K_REG_READ(AR5K_AR5211_RX_FILTER));
 }
 
 void
-ar5k_ar5211_setRxFilter(hal, filter)
+ar5k_ar5211_set_rx_filter(hal, filter)
 	struct ath_hal *hal;
 	u_int32_t filter;
 {
@@ -1392,7 +1392,7 @@ ar5k_ar5211_setRxFilter(hal, filter)
 }
 
 HAL_BOOL
-ar5k_ar5211_setupRxDesc(hal, desc, size, flags)
+ar5k_ar5211_setup_rx_desc(hal, desc, size, flags)
 	struct ath_hal *hal;
 	struct ath_desc *desc;
 	u_int32_t size;
@@ -1413,7 +1413,7 @@ ar5k_ar5211_setupRxDesc(hal, desc, size, flags)
 }
 
 HAL_STATUS
-ar5k_ar5211_procRxDesc(hal, desc, phys_addr, next)
+ar5k_ar5211_proc_rx_desc(hal, desc, phys_addr, next)
 	struct ath_hal *hal;
 	struct ath_desc *desc;
 	u_int32_t phys_addr;
@@ -1485,7 +1485,7 @@ ar5k_ar5211_procRxDesc(hal, desc, phys_addr, next)
 }
 
 void
-ar5k_ar5211_rxMonitor(hal)
+ar5k_ar5211_set_rx_monitor(hal)
 	struct ath_hal *hal;
 {
 	AR5K_REG_ENABLE_BITS(AR5K_AR5211_RX_FILTER,
@@ -1497,7 +1497,7 @@ ar5k_ar5211_rxMonitor(hal)
  */
 
 void
-ar5k_ar5211_dumpState(hal)
+ar5k_ar5211_dump_state(hal)
 	struct ath_hal *hal;
 {
 #ifdef AR5K_DEBUG
@@ -1587,7 +1587,7 @@ ar5k_ar5211_dumpState(hal)
 }
 
 HAL_BOOL
-ar5k_ar5211_getDiagState(hal, id, device, size)
+ar5k_ar5211_get_diag_state(hal, id, device, size)
 	struct ath_hal *hal;
 	int id;
 	void **device;
@@ -1602,7 +1602,7 @@ ar5k_ar5211_getDiagState(hal, id, device, size)
 }
 
 void
-ar5k_ar5211_getMacAddress(hal, mac)
+ar5k_ar5211_get_lladdr(hal, mac)
 	struct ath_hal *hal;
 	u_int8_t *mac;
 {
@@ -1610,7 +1610,7 @@ ar5k_ar5211_getMacAddress(hal, mac)
 }
 
 HAL_BOOL
-ar5k_ar5211_setMacAddress(hal, mac)
+ar5k_ar5211_set_lladdr(hal, mac)
 	struct ath_hal *hal;
 	const u_int8_t *mac;
 {
@@ -1630,7 +1630,7 @@ ar5k_ar5211_setMacAddress(hal, mac)
 }
 
 HAL_BOOL
-ar5k_ar5211_setRegulatoryDomain(hal, regdomain, status)
+ar5k_ar5211_set_regdomain(hal, regdomain, status)
 	struct ath_hal *hal;
 	u_int16_t regdomain;
 	HAL_STATUS *status;
@@ -1652,7 +1652,7 @@ ar5k_ar5211_setRegulatoryDomain(hal, regdomain, status)
 }
 
 void
-ar5k_ar5211_setLedState(hal, state)
+ar5k_ar5211_set_ledstate(hal, state)
 	struct ath_hal *hal;
 	HAL_LED_STATE state;
 {
@@ -1692,7 +1692,7 @@ ar5k_ar5211_setLedState(hal, state)
 }
 
 void
-ar5k_ar5211_writeAssocid(hal, bssid, assoc_id, tim_offset)
+ar5k_ar5211_set_associd(hal, bssid, assoc_id, tim_offset)
 	struct ath_hal *hal;
 	const u_int8_t *bssid;
 	u_int16_t assoc_id;
@@ -1711,7 +1711,7 @@ ar5k_ar5211_writeAssocid(hal, bssid, assoc_id, tim_offset)
 	bcopy(bssid, hal->ah_bssid, IEEE80211_ADDR_LEN);
 
 	if (assoc_id == 0) {
-		ar5k_ar5211_disablePSPoll(hal);
+		ar5k_ar5211_disable_pspoll(hal);
 		return;
 	}
 
@@ -1722,11 +1722,11 @@ ar5k_ar5211_writeAssocid(hal, bssid, assoc_id, tim_offset)
 	    AR5K_AR5211_BEACON_TIM_S) &
 	    AR5K_AR5211_BEACON_TIM));
 
-	ar5k_ar5211_enablePSPoll(hal, NULL, 0);
+	ar5k_ar5211_enable_pspoll(hal, NULL, 0);
 }
 
 HAL_BOOL
-ar5k_ar5211_gpioCfgOutput(hal, gpio)
+ar5k_ar5211_set_gpio_output(hal, gpio)
 	struct ath_hal *hal;
 	u_int32_t gpio;
 {
@@ -1741,7 +1741,7 @@ ar5k_ar5211_gpioCfgOutput(hal, gpio)
 }
 
 HAL_BOOL
-ar5k_ar5211_gpioCfgInput(hal, gpio)
+ar5k_ar5211_set_gpio_input(hal, gpio)
 	struct ath_hal *hal;
 	u_int32_t gpio;
 {
@@ -1756,7 +1756,7 @@ ar5k_ar5211_gpioCfgInput(hal, gpio)
 }
 
 u_int32_t
-ar5k_ar5211_gpioGet(hal, gpio)
+ar5k_ar5211_get_gpio(hal, gpio)
 	struct ath_hal *hal;
 	u_int32_t gpio;
 {
@@ -1769,7 +1769,7 @@ ar5k_ar5211_gpioGet(hal, gpio)
 }
 
 HAL_BOOL
-ar5k_ar5211_gpioSet(hal, gpio, val)
+ar5k_ar5211_set_gpio(hal, gpio, val)
 	struct ath_hal *hal;
 	u_int32_t gpio;
 	u_int32_t val;
@@ -1791,7 +1791,7 @@ ar5k_ar5211_gpioSet(hal, gpio, val)
 }
 
 void
-ar5k_ar5211_gpioSetIntr(hal, gpio, interrupt_level)
+ar5k_ar5211_set_gpio_intr(hal, gpio, interrupt_level)
 	struct ath_hal *hal;
 	u_int gpio;
 	u_int32_t interrupt_level;
@@ -1819,14 +1819,14 @@ ar5k_ar5211_gpioSetIntr(hal, gpio, interrupt_level)
 }
 
 u_int32_t
-ar5k_ar5211_getTsf32(hal)
+ar5k_ar5211_get_tsf32(hal)
 	struct ath_hal *hal;
 {
 	return (AR5K_REG_READ(AR5K_AR5211_TSF_L32));
 }
 
 u_int64_t
-ar5k_ar5211_getTsf64(hal)
+ar5k_ar5211_get_tsf64(hal)
 	struct ath_hal *hal;
 {
 	u_int64_t tsf = AR5K_REG_READ(AR5K_AR5211_TSF_U32);
@@ -1835,7 +1835,7 @@ ar5k_ar5211_getTsf64(hal)
 }
 
 void
-ar5k_ar5211_resetTsf(hal)
+ar5k_ar5211_reset_tsf(hal)
 	struct ath_hal *hal;
 {
 	AR5K_REG_ENABLE_BITS(AR5K_AR5211_BEACON,
@@ -1843,14 +1843,14 @@ ar5k_ar5211_resetTsf(hal)
 }
 
 u_int16_t
-ar5k_ar5211_getRegDomain(hal)
+ar5k_ar5211_get_regdomain(hal)
 	struct ath_hal *hal;
 {
 	return (ar5k_get_regdomain(hal));
 }
 
 HAL_BOOL
-ar5k_ar5211_detectCardPresent(hal)
+ar5k_ar5211_detect_card_present(hal)
 	struct ath_hal *hal;
 {
 	u_int16_t magic;
@@ -1867,7 +1867,7 @@ ar5k_ar5211_detectCardPresent(hal)
 }
 
 void
-ar5k_ar5211_updateMibCounters(hal, statistics)
+ar5k_ar5211_update_mib_counters(hal, statistics)
 	struct ath_hal *hal;
 	HAL_MIB_STATS *statistics;
 {
@@ -1879,14 +1879,14 @@ ar5k_ar5211_updateMibCounters(hal, statistics)
 }
 
 HAL_RFGAIN
-ar5k_ar5211_getRfGain(hal)
+ar5k_ar5211_get_rf_gain(hal)
 	struct ath_hal *hal;
 {
 	return (HAL_RFGAIN_INACTIVE);
 }
 
 HAL_BOOL
-ar5k_ar5211_setSlotTime(hal, slot_time)
+ar5k_ar5211_set_slot_time(hal, slot_time)
 	struct ath_hal *hal;
 	u_int slot_time;
 {
@@ -1900,7 +1900,7 @@ ar5k_ar5211_setSlotTime(hal, slot_time)
 }
 
 u_int
-ar5k_ar5211_getSlotTime(hal)
+ar5k_ar5211_get_slot_time(hal)
 	struct ath_hal *hal;
 {
 	return (ar5k_clocktoh(AR5K_REG_READ(AR5K_AR5211_DCU_GBL_IFS_SLOT) &
@@ -1908,7 +1908,7 @@ ar5k_ar5211_getSlotTime(hal)
 }
 
 HAL_BOOL
-ar5k_ar5211_setAckTimeout(hal, timeout)
+ar5k_ar5211_set_ack_timeout(hal, timeout)
 	struct ath_hal *hal;
 	u_int timeout;
 {
@@ -1923,7 +1923,7 @@ ar5k_ar5211_setAckTimeout(hal, timeout)
 }
 
 u_int
-ar5k_ar5211_getAckTimeout(hal)
+ar5k_ar5211_get_ack_timeout(hal)
 	struct ath_hal *hal;
 {
 	return (ar5k_clocktoh(AR5K_REG_MS(AR5K_REG_READ(AR5K_AR5211_TIME_OUT),
@@ -1931,7 +1931,7 @@ ar5k_ar5211_getAckTimeout(hal)
 }
 
 HAL_BOOL
-ar5k_ar5211_setCTSTimeout(hal, timeout)
+ar5k_ar5211_set_cts_timeout(hal, timeout)
 	struct ath_hal *hal;
 	u_int timeout;
 {
@@ -1946,7 +1946,7 @@ ar5k_ar5211_setCTSTimeout(hal, timeout)
 }
 
 u_int
-ar5k_ar5211_getCTSTimeout(hal)
+ar5k_ar5211_get_cts_timeout(hal)
 	struct ath_hal *hal;
 {
 	return (ar5k_clocktoh(AR5K_REG_MS(AR5K_REG_READ(AR5K_AR5211_TIME_OUT),
@@ -1958,7 +1958,7 @@ ar5k_ar5211_getCTSTimeout(hal)
  */
 
 HAL_BOOL
-ar5k_ar5211_isHwCipherSupported(hal, cipher)
+ar5k_ar5211_is_cipher_supported(hal, cipher)
 	struct ath_hal *hal;
 	HAL_CIPHER cipher;
 {
@@ -1972,14 +1972,14 @@ ar5k_ar5211_isHwCipherSupported(hal, cipher)
 }
 
 u_int32_t
-ar5k_ar5211_getKeyCacheSize(hal)
+ar5k_ar5211_get_keycache_size(hal)
 	struct ath_hal *hal;
 {
 	return (AR5K_AR5211_KEYCACHE_SIZE);
 }
 
 HAL_BOOL
-ar5k_ar5211_resetKeyCacheEntry(hal, entry)
+ar5k_ar5211_reset_key(hal, entry)
 	struct ath_hal *hal;
 	u_int16_t entry;
 {
@@ -1994,7 +1994,7 @@ ar5k_ar5211_resetKeyCacheEntry(hal, entry)
 }
 
 HAL_BOOL
-ar5k_ar5211_isKeyCacheEntryValid(hal, entry)
+ar5k_ar5211_is_key_valid(hal, entry)
 	struct ath_hal *hal;
 	u_int16_t entry;
 {
@@ -2011,7 +2011,7 @@ ar5k_ar5211_isKeyCacheEntryValid(hal, entry)
 }
 
 HAL_BOOL
-ar5k_ar5211_setKeyCacheEntry(hal, entry, keyval, mac, xor_notused)
+ar5k_ar5211_set_key(hal, entry, keyval, mac, xor_notused)
 	struct ath_hal *hal;
 	u_int16_t entry;
 	const HAL_KEYVAL *keyval;
@@ -2058,11 +2058,11 @@ ar5k_ar5211_setKeyCacheEntry(hal, entry, keyval, mac, xor_notused)
 	for (i = 0; i < elements; i++)
 		AR5K_REG_WRITE(AR5K_AR5211_KEYTABLE_OFF(entry, i), key_v[i]);
 
-	return (ar5k_ar5211_setKeyCacheEntryMac(hal, entry, mac));
+	return (ar5k_ar5211_set_key_lladdr(hal, entry, mac));
 }
 
 HAL_BOOL
-ar5k_ar5211_setKeyCacheEntryMac(hal, entry, mac)
+ar5k_ar5211_set_key_lladdr(hal, entry, mac)
 	struct ath_hal *hal;
 	u_int16_t entry;
 	const u_int8_t *mac;
@@ -2093,7 +2093,7 @@ ar5k_ar5211_setKeyCacheEntryMac(hal, entry, mac)
  */
 
 HAL_BOOL
-ar5k_ar5211_setPowerMode(hal, mode, set_chip, sleep_duration)
+ar5k_ar5211_set_power(hal, mode, set_chip, sleep_duration)
 	struct ath_hal *hal;
 	HAL_POWER_MODE mode;
 	HAL_BOOL set_chip;
@@ -2157,14 +2157,14 @@ ar5k_ar5211_setPowerMode(hal, mode, set_chip, sleep_duration)
 }
 
 HAL_POWER_MODE
-ar5k_ar5211_getPowerMode(hal)
+ar5k_ar5211_get_power_mode(hal)
 	struct ath_hal *hal;
 {
 	return (hal->ah_power_mode);
 }
 
 HAL_BOOL
-ar5k_ar5211_queryPSPollSupport(hal)
+ar5k_ar5211_query_pspoll_support(hal)
 	struct ath_hal *hal;
 {
 	/* nope */
@@ -2172,7 +2172,7 @@ ar5k_ar5211_queryPSPollSupport(hal)
 }
 
 HAL_BOOL
-ar5k_ar5211_initPSPoll(hal)
+ar5k_ar5211_init_pspoll(hal)
 	struct ath_hal *hal;
 {
 	/*
@@ -2182,7 +2182,7 @@ ar5k_ar5211_initPSPoll(hal)
 }
 
 HAL_BOOL
-ar5k_ar5211_enablePSPoll(hal, bssid, assoc_id)
+ar5k_ar5211_enable_pspoll(hal, bssid, assoc_id)
 	struct ath_hal *hal;
 	u_int8_t *bssid;
 	u_int16_t assoc_id;
@@ -2191,7 +2191,7 @@ ar5k_ar5211_enablePSPoll(hal, bssid, assoc_id)
 }
 
 HAL_BOOL
-ar5k_ar5211_disablePSPoll(hal)
+ar5k_ar5211_disable_pspoll(hal)
 	struct ath_hal *hal;
 {
 	return (AH_FALSE);
@@ -2202,7 +2202,7 @@ ar5k_ar5211_disablePSPoll(hal)
  */
 
 void
-ar5k_ar5211_beaconInit(hal, next_beacon, interval)
+ar5k_ar5211_init_beacon(hal, next_beacon, interval)
 	struct ath_hal *hal;
 	u_int32_t next_beacon;
 	u_int32_t interval;
@@ -2243,7 +2243,7 @@ ar5k_ar5211_beaconInit(hal, next_beacon, interval)
 }
 
 void
-ar5k_ar5211_setStationBeaconTimers(hal, state, tsf, dtim_count, cfp_count)
+ar5k_ar5211_set_beacon_timers(hal, state, tsf, dtim_count, cfp_count)
 	struct ath_hal *hal;
 	const HAL_BEACON_STATE *state;
 	u_int32_t tsf;
@@ -2310,7 +2310,7 @@ ar5k_ar5211_setStationBeaconTimers(hal, state, tsf, dtim_count, cfp_count)
 }
 
 void
-ar5k_ar5211_resetStationBeaconTimers(hal)
+ar5k_ar5211_reset_beacon(hal)
 	struct ath_hal *hal;
 {
 	/*
@@ -2327,7 +2327,7 @@ ar5k_ar5211_resetStationBeaconTimers(hal)
 }
 
 HAL_BOOL
-ar5k_ar5211_waitForBeaconDone(hal, phys_addr)
+ar5k_ar5211_wait_for_beacon(hal, phys_addr)
 	struct ath_hal *hal;
 	bus_addr_t phys_addr;
 {
@@ -2351,14 +2351,14 @@ ar5k_ar5211_waitForBeaconDone(hal, phys_addr)
  */
 
 HAL_BOOL
-ar5k_ar5211_isInterruptPending(hal)
+ar5k_ar5211_is_intr_pending(hal)
 	struct ath_hal *hal;
 {
 	return (AR5K_REG_READ(AR5K_AR5211_INTPEND) == 0 ? AH_FALSE : AH_TRUE);
 }
 
 HAL_BOOL
-ar5k_ar5211_getPendingInterrupts(hal, interrupt_mask)
+ar5k_ar5211_get_isr(hal, interrupt_mask)
 	struct ath_hal *hal;
 	u_int32_t *interrupt_mask;
 {
@@ -2397,7 +2397,7 @@ ar5k_ar5211_getPendingInterrupts(hal, interrupt_mask)
 }
 
 u_int32_t
-ar5k_ar5211_getInterrupts(hal)
+ar5k_ar5211_get_intr(hal)
 	struct ath_hal *hal;
 {
 	/* Return the interrupt mask stored previously */
@@ -2405,7 +2405,7 @@ ar5k_ar5211_getInterrupts(hal)
 }
 
 HAL_INT
-ar5k_ar5211_setInterrupts(hal, new_mask)
+ar5k_ar5211_set_intr(hal, new_mask)
 	struct ath_hal *hal;
 	HAL_INT new_mask;
 {
diff --git a/sys/dev/ic/ar5211var.h b/sys/dev/ic/ar5211var.h
index 76fbd35f4ba..4415b357b97 100644
--- a/sys/dev/ic/ar5211var.h
+++ b/sys/dev/ic/ar5211var.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ar5211var.h,v 1.3 2005/04/09 00:20:42 reyk Exp $	*/
+/*	$OpenBSD: ar5211var.h,v 1.4 2005/04/18 18:42:55 reyk Exp $	*/
 
 /*
  * Copyright (c) 2004, 2005 Reyk Floeter <reyk@vantronix.net>
@@ -68,7 +68,7 @@ struct ar5k_ar5211_rx_status {
 	 * RX status word 0
 	 */
 	u_int32_t	rx_status_0;
-	
+
 #define AR5K_AR5211_DESC_RX_STATUS0_DATA_LEN		0x00000fff
 #define AR5K_AR5211_DESC_RX_STATUS0_MORE		0x00001000
 #define AR5K_AR5211_DESC_RX_STATUS0_RECEIVE_RATE	0x00078000
@@ -353,7 +353,7 @@ extern ar5k_attach_t ar5k_ar5211_attach;
 	{ 0x9bfc, 0x00000016 },						\
         /* PHY activation */						\
 	{ 0x98d4, 0x00000020 },						\
-        { 0x98d8, 0x00601068 },						\
+	{ 0x98d8, 0x00601068 },						\
 }
 
 struct ar5k_ar5211_ini_mode {
diff --git a/sys/dev/ic/ar5212.c b/sys/dev/ic/ar5212.c
index 9d358a50740..38467004aa0 100644
--- a/sys/dev/ic/ar5212.c
+++ b/sys/dev/ic/ar5212.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ar5212.c,v 1.14 2005/04/08 22:12:21 reyk Exp $	*/
+/*	$OpenBSD: ar5212.c,v 1.15 2005/04/18 18:42:55 reyk Exp $	*/
 
 /*
  * Copyright (c) 2004, 2005 Reyk Floeter <reyk@vantronix.net>
@@ -50,116 +50,116 @@ ar5k_ar5212_fill(hal)
 	/*
 	 * Init/Exit functions
 	 */
-	AR5K_HAL_FUNCTION(hal, ar5212, getRateTable);
+	AR5K_HAL_FUNCTION(hal, ar5212, get_rate_table);
 	AR5K_HAL_FUNCTION(hal, ar5212, detach);
 
 	/*
 	 * Reset functions
 	 */
 	AR5K_HAL_FUNCTION(hal, ar5212, reset);
-	AR5K_HAL_FUNCTION(hal, ar5212, setPCUConfig);
-	AR5K_HAL_FUNCTION(hal, ar5212, perCalibration);
+	AR5K_HAL_FUNCTION(hal, ar5212, set_opmode);
+	AR5K_HAL_FUNCTION(hal, ar5212, calibrate);
 
 	/*
 	 * TX functions
 	 */
-	AR5K_HAL_FUNCTION(hal, ar5212, updateTxTrigLevel);
-	AR5K_HAL_FUNCTION(hal, ar5212, setupTxQueue);
-	AR5K_HAL_FUNCTION(hal, ar5212, setTxQueueProps);
-	AR5K_HAL_FUNCTION(hal, ar5212, releaseTxQueue);
-	AR5K_HAL_FUNCTION(hal, ar5212, resetTxQueue);
-	AR5K_HAL_FUNCTION(hal, ar5212, getTxDP);
-	AR5K_HAL_FUNCTION(hal, ar5212, setTxDP);
-	AR5K_HAL_FUNCTION(hal, ar5212, startTxDma);
-	AR5K_HAL_FUNCTION(hal, ar5212, stopTxDma);
-	AR5K_HAL_FUNCTION(hal, ar5212, setupTxDesc);
-	AR5K_HAL_FUNCTION(hal, ar5212, setupXTxDesc);
-	AR5K_HAL_FUNCTION(hal, ar5212, fillTxDesc);
-	AR5K_HAL_FUNCTION(hal, ar5212, procTxDesc);
-	AR5K_HAL_FUNCTION(hal, ar5212, hasVEOL);
+	AR5K_HAL_FUNCTION(hal, ar5212, update_tx_triglevel);
+	AR5K_HAL_FUNCTION(hal, ar5212, setup_tx_queue);
+	AR5K_HAL_FUNCTION(hal, ar5212, setup_tx_queueprops);
+	AR5K_HAL_FUNCTION(hal, ar5212, release_tx_queue);
+	AR5K_HAL_FUNCTION(hal, ar5212, reset_tx_queue);
+	AR5K_HAL_FUNCTION(hal, ar5212, get_tx_buf);
+	AR5K_HAL_FUNCTION(hal, ar5212, put_tx_buf);
+	AR5K_HAL_FUNCTION(hal, ar5212, tx_start);
+	AR5K_HAL_FUNCTION(hal, ar5212, stop_tx_dma);
+	AR5K_HAL_FUNCTION(hal, ar5212, setup_tx_desc);
+	AR5K_HAL_FUNCTION(hal, ar5212, setup_xtx_desc);
+	AR5K_HAL_FUNCTION(hal, ar5212, fill_tx_desc);
+	AR5K_HAL_FUNCTION(hal, ar5212, proc_tx_desc);
+	AR5K_HAL_FUNCTION(hal, ar5212, has_veol);
 
 	/*
 	 * RX functions
 	 */
-	AR5K_HAL_FUNCTION(hal, ar5212, getRxDP);
-	AR5K_HAL_FUNCTION(hal, ar5212, setRxDP);
-	AR5K_HAL_FUNCTION(hal, ar5212, enableReceive);
-	AR5K_HAL_FUNCTION(hal, ar5212, stopDmaReceive);
-	AR5K_HAL_FUNCTION(hal, ar5212, startPcuReceive);
-	AR5K_HAL_FUNCTION(hal, ar5212, stopPcuReceive);
-	AR5K_HAL_FUNCTION(hal, ar5212, setMulticastFilter);
-	AR5K_HAL_FUNCTION(hal, ar5212, setMulticastFilterIndex);
-	AR5K_HAL_FUNCTION(hal, ar5212, clrMulticastFilterIndex);
-	AR5K_HAL_FUNCTION(hal, ar5212, getRxFilter);
-	AR5K_HAL_FUNCTION(hal, ar5212, setRxFilter);
-	AR5K_HAL_FUNCTION(hal, ar5212, setupRxDesc);
-	AR5K_HAL_FUNCTION(hal, ar5212, procRxDesc);
-	AR5K_HAL_FUNCTION(hal, ar5212, rxMonitor);
+	AR5K_HAL_FUNCTION(hal, ar5212, get_rx_buf);
+	AR5K_HAL_FUNCTION(hal, ar5212, put_rx_buf);
+	AR5K_HAL_FUNCTION(hal, ar5212, start_rx);
+	AR5K_HAL_FUNCTION(hal, ar5212, stop_rx_dma);
+	AR5K_HAL_FUNCTION(hal, ar5212, start_rx_pcu);
+	AR5K_HAL_FUNCTION(hal, ar5212, stop_pcu_recv);
+	AR5K_HAL_FUNCTION(hal, ar5212, set_mcast_filter);
+	AR5K_HAL_FUNCTION(hal, ar5212, set_mcast_filterindex);
+	AR5K_HAL_FUNCTION(hal, ar5212, clear_mcast_filter_idx);
+	AR5K_HAL_FUNCTION(hal, ar5212, get_rx_filter);
+	AR5K_HAL_FUNCTION(hal, ar5212, set_rx_filter);
+	AR5K_HAL_FUNCTION(hal, ar5212, setup_rx_desc);
+	AR5K_HAL_FUNCTION(hal, ar5212, proc_rx_desc);
+	AR5K_HAL_FUNCTION(hal, ar5212, set_rx_monitor);
 
 	/*
 	 * Misc functions
 	 */
-	AR5K_HAL_FUNCTION(hal, ar5212, dumpState);
-	AR5K_HAL_FUNCTION(hal, ar5212, getDiagState);
-	AR5K_HAL_FUNCTION(hal, ar5212, getMacAddress);
-	AR5K_HAL_FUNCTION(hal, ar5212, setMacAddress);
-	AR5K_HAL_FUNCTION(hal, ar5212, setRegulatoryDomain);
-	AR5K_HAL_FUNCTION(hal, ar5212, setLedState);
-	AR5K_HAL_FUNCTION(hal, ar5212, writeAssocid);
-	AR5K_HAL_FUNCTION(hal, ar5212, gpioCfgInput);
-	AR5K_HAL_FUNCTION(hal, ar5212, gpioCfgOutput);
-	AR5K_HAL_FUNCTION(hal, ar5212, gpioGet);
-	AR5K_HAL_FUNCTION(hal, ar5212, gpioSet);
-	AR5K_HAL_FUNCTION(hal, ar5212, gpioSetIntr);
-	AR5K_HAL_FUNCTION(hal, ar5212, getTsf32);
-	AR5K_HAL_FUNCTION(hal, ar5212, getTsf64);
-	AR5K_HAL_FUNCTION(hal, ar5212, resetTsf);
-	AR5K_HAL_FUNCTION(hal, ar5212, getRegDomain);
-	AR5K_HAL_FUNCTION(hal, ar5212, detectCardPresent);
-	AR5K_HAL_FUNCTION(hal, ar5212, updateMibCounters);
-	AR5K_HAL_FUNCTION(hal, ar5212, getRfGain);
-	AR5K_HAL_FUNCTION(hal, ar5212, setSlotTime);
-	AR5K_HAL_FUNCTION(hal, ar5212, getSlotTime);
-	AR5K_HAL_FUNCTION(hal, ar5212, setAckTimeout);
-	AR5K_HAL_FUNCTION(hal, ar5212, getAckTimeout);
-	AR5K_HAL_FUNCTION(hal, ar5212, setCTSTimeout);
-	AR5K_HAL_FUNCTION(hal, ar5212, getCTSTimeout);
+	AR5K_HAL_FUNCTION(hal, ar5212, dump_state);
+	AR5K_HAL_FUNCTION(hal, ar5212, get_diag_state);
+	AR5K_HAL_FUNCTION(hal, ar5212, get_lladdr);
+	AR5K_HAL_FUNCTION(hal, ar5212, set_lladdr);
+	AR5K_HAL_FUNCTION(hal, ar5212, set_regdomain);
+	AR5K_HAL_FUNCTION(hal, ar5212, set_ledstate);
+	AR5K_HAL_FUNCTION(hal, ar5212, set_associd);
+	AR5K_HAL_FUNCTION(hal, ar5212, set_gpio_input);
+	AR5K_HAL_FUNCTION(hal, ar5212, set_gpio_output);
+	AR5K_HAL_FUNCTION(hal, ar5212, get_gpio);
+	AR5K_HAL_FUNCTION(hal, ar5212, set_gpio);
+	AR5K_HAL_FUNCTION(hal, ar5212, set_gpio_intr);
+	AR5K_HAL_FUNCTION(hal, ar5212, get_tsf32);
+	AR5K_HAL_FUNCTION(hal, ar5212, get_tsf64);
+	AR5K_HAL_FUNCTION(hal, ar5212, reset_tsf);
+	AR5K_HAL_FUNCTION(hal, ar5212, get_regdomain);
+	AR5K_HAL_FUNCTION(hal, ar5212, detect_card_present);
+	AR5K_HAL_FUNCTION(hal, ar5212, update_mib_counters);
+	AR5K_HAL_FUNCTION(hal, ar5212, get_rf_gain);
+	AR5K_HAL_FUNCTION(hal, ar5212, set_slot_time);
+	AR5K_HAL_FUNCTION(hal, ar5212, get_slot_time);
+	AR5K_HAL_FUNCTION(hal, ar5212, set_ack_timeout);
+	AR5K_HAL_FUNCTION(hal, ar5212, get_ack_timeout);
+	AR5K_HAL_FUNCTION(hal, ar5212, set_cts_timeout);
+	AR5K_HAL_FUNCTION(hal, ar5212, get_cts_timeout);
 
 	/*
 	 * Key table (WEP) functions
 	 */
-	AR5K_HAL_FUNCTION(hal, ar5212, isHwCipherSupported);
-	AR5K_HAL_FUNCTION(hal, ar5212, getKeyCacheSize);
-	AR5K_HAL_FUNCTION(hal, ar5212, resetKeyCacheEntry);
-	AR5K_HAL_FUNCTION(hal, ar5212, isKeyCacheEntryValid);
-	AR5K_HAL_FUNCTION(hal, ar5212, setKeyCacheEntry);
-	AR5K_HAL_FUNCTION(hal, ar5212, setKeyCacheEntryMac);
+	AR5K_HAL_FUNCTION(hal, ar5212, is_cipher_supported);
+	AR5K_HAL_FUNCTION(hal, ar5212, get_keycache_size);
+	AR5K_HAL_FUNCTION(hal, ar5212, reset_key);
+	AR5K_HAL_FUNCTION(hal, ar5212, is_key_valid);
+	AR5K_HAL_FUNCTION(hal, ar5212, set_key);
+	AR5K_HAL_FUNCTION(hal, ar5212, set_key_lladdr);
 
 	/*
 	 * Power management functions
 	 */
-	AR5K_HAL_FUNCTION(hal, ar5212, setPowerMode);
-	AR5K_HAL_FUNCTION(hal, ar5212, getPowerMode);
-	AR5K_HAL_FUNCTION(hal, ar5212, queryPSPollSupport);
-	AR5K_HAL_FUNCTION(hal, ar5212, initPSPoll);
-	AR5K_HAL_FUNCTION(hal, ar5212, enablePSPoll);
-	AR5K_HAL_FUNCTION(hal, ar5212, disablePSPoll);
+	AR5K_HAL_FUNCTION(hal, ar5212, set_power);
+	AR5K_HAL_FUNCTION(hal, ar5212, get_power_mode);
+	AR5K_HAL_FUNCTION(hal, ar5212, query_pspoll_support);
+	AR5K_HAL_FUNCTION(hal, ar5212, init_pspoll);
+	AR5K_HAL_FUNCTION(hal, ar5212, enable_pspoll);
+	AR5K_HAL_FUNCTION(hal, ar5212, disable_pspoll);
 
 	/*
 	 * Beacon functions
 	 */
-	AR5K_HAL_FUNCTION(hal, ar5212, beaconInit);
-	AR5K_HAL_FUNCTION(hal, ar5212, setStationBeaconTimers);
-	AR5K_HAL_FUNCTION(hal, ar5212, resetStationBeaconTimers);
-	AR5K_HAL_FUNCTION(hal, ar5212, waitForBeaconDone);
+	AR5K_HAL_FUNCTION(hal, ar5212, init_beacon);
+	AR5K_HAL_FUNCTION(hal, ar5212, set_beacon_timers);
+	AR5K_HAL_FUNCTION(hal, ar5212, reset_beacon);
+	AR5K_HAL_FUNCTION(hal, ar5212, wait_for_beacon);
 
 	/*
 	 * Interrupt functions
 	 */
-	AR5K_HAL_FUNCTION(hal, ar5212, isInterruptPending);
-	AR5K_HAL_FUNCTION(hal, ar5212, getPendingInterrupts);
-	AR5K_HAL_FUNCTION(hal, ar5212, getInterrupts);
-	AR5K_HAL_FUNCTION(hal, ar5212, setInterrupts);
+	AR5K_HAL_FUNCTION(hal, ar5212, is_intr_pending);
+	AR5K_HAL_FUNCTION(hal, ar5212, get_isr);
+	AR5K_HAL_FUNCTION(hal, ar5212, get_intr);
+	AR5K_HAL_FUNCTION(hal, ar5212, set_intr);
 
 	/*
 	 * Chipset functions (ar5k-specific, non-HAL)
@@ -215,9 +215,9 @@ ar5k_ar5212_attach(device, sc, st, sh, status)
 	hal->ah_phy = AR5K_AR5212_PHY(0);
 
 	bcopy(etherbroadcastaddr, mac, IEEE80211_ADDR_LEN);
-	ar5k_ar5212_writeAssocid(hal, mac, 0, 0);
-	ar5k_ar5212_getMacAddress(hal, mac);
-	ar5k_ar5212_setPCUConfig(hal);
+	ar5k_ar5212_set_associd(hal, mac, 0, 0);
+	ar5k_ar5212_get_lladdr(hal, mac);
+	ar5k_ar5212_set_opmode(hal);
 
 	return (hal);
 }
@@ -320,7 +320,7 @@ ar5k_ar5212_nic_wakeup(hal, flags)
 	}
 
 	/* ...wakeup */
-	if (ar5k_ar5212_setPowerMode(hal,
+	if (ar5k_ar5212_set_power(hal,
 		HAL_PM_AWAKE, AH_TRUE, 0) == AH_FALSE) {
 		AR5K_PRINT("failed to resume the AR5212 (again)\n");
 		return (AH_FALSE);
@@ -383,7 +383,7 @@ ar5k_ar5212_radio_revision(hal, chip)
 }
 
 const HAL_RATE_TABLE *
-ar5k_ar5212_getRateTable(hal, mode)
+ar5k_ar5212_get_rate_table(hal, mode)
 	struct ath_hal *hal;
 	u_int mode;
 {
@@ -450,7 +450,7 @@ ar5k_ar5212_reset(hal, op_mode, channel, change_channel, status)
 	s_led[2] = AR5K_REG_READ(AR5K_AR5212_GPIODO);
 
 	if (change_channel == AH_TRUE && hal->ah_rf_banks != NULL)
-		ar5k_ar5212_getRfGain(hal);
+		ar5k_ar5212_get_rf_gain(hal);
 
 	if (ar5k_ar5212_nic_wakeup(hal, channel->c_channel_flags) == AH_FALSE)
 		return (AH_FALSE);
@@ -551,7 +551,7 @@ ar5k_ar5212_reset(hal, op_mode, channel, change_channel, status)
 	/*
 	 * Set rate duration table
 	 */
-	rt = ar5k_ar5212_getRateTable(hal,
+	rt = ar5k_ar5212_get_rate_table(hal,
 	    channel->c_channel_flags & IEEE80211_CHAN_TURBO ?
 	    HAL_MODE_TURBO : HAL_MODE_XR);
 
@@ -562,7 +562,7 @@ ar5k_ar5212_reset(hal, op_mode, channel, change_channel, status)
 	}
 
 	if (!(channel->c_channel_flags & IEEE80211_CHAN_TURBO)) {
-		rt = ar5k_ar5212_getRateTable(hal, HAL_MODE_11B);
+		rt = ar5k_ar5212_get_rate_table(hal, HAL_MODE_11B);
 		for (i = 0; i < rt->rt_rate_count; i++) {
 			data = AR5K_AR5212_RATE_DUR(rt->rt_info[i].r_rate_code);
 			AR5K_REG_WRITE(data,
@@ -630,7 +630,7 @@ ar5k_ar5212_reset(hal, op_mode, channel, change_channel, status)
 	if (hal->ah_ant_diversity == AH_FALSE) {
 		if (freq == AR5K_INI_RFGAIN_2GHZ)
 			ant[0] = HAL_ANT_FIXED_B;
-		else	
+		else
 			ant[1] = HAL_ANT_FIXED_A;
 	}
 
@@ -691,8 +691,8 @@ ar5k_ar5212_reset(hal, op_mode, channel, change_channel, status)
 	 * Misc
 	 */
 	bcopy(etherbroadcastaddr, mac, IEEE80211_ADDR_LEN);
-	ar5k_ar5212_writeAssocid(hal, mac, 0, 0);
-	ar5k_ar5212_setPCUConfig(hal);
+	ar5k_ar5212_set_associd(hal, mac, 0, 0);
+	ar5k_ar5212_set_opmode(hal);
 	AR5K_REG_WRITE(AR5K_AR5212_PISR, 0xffffffff);
 	AR5K_REG_WRITE(AR5K_AR5212_RSSI_THR, AR5K_TUNE_RSSI_THRES);
 
@@ -736,24 +736,24 @@ ar5k_ar5212_reset(hal, op_mode, channel, change_channel, status)
 	 */
 	for (i = 0; i < hal->ah_capabilities.cap_queues.q_tx_num; i++) {
 		AR5K_REG_WRITE_Q(AR5K_AR5212_DCU_QCUMASK(i), i);
-		if (ar5k_ar5212_resetTxQueue(hal, i) == AH_FALSE) {
+		if (ar5k_ar5212_reset_tx_queue(hal, i) == AH_FALSE) {
 			AR5K_PRINTF("failed to reset TX queue #%d\n", i);
 			return (AH_FALSE);
 		}
 	}
 
 	/* Pre-enable interrupts */
-	ar5k_ar5212_setInterrupts(hal, HAL_INT_RX | HAL_INT_TX | HAL_INT_FATAL);
+	ar5k_ar5212_set_intr(hal, HAL_INT_RX | HAL_INT_TX | HAL_INT_FATAL);
 
 	/*
 	 * Set RF kill flags if supported by the device (read from the EEPROM)
 	 */
 	if (AR5K_EEPROM_HDR_RFKILL(hal->ah_capabilities.cap_eeprom.ee_header)) {
-		ar5k_ar5212_gpioCfgInput(hal, 0);
-		if ((hal->ah_gpio[0] = ar5k_ar5212_gpioGet(hal, 0)) == 0)
-			ar5k_ar5212_gpioSetIntr(hal, 0, 1);
+		ar5k_ar5212_set_gpio_input(hal, 0);
+		if ((hal->ah_gpio[0] = ar5k_ar5212_get_gpio(hal, 0)) == 0)
+			ar5k_ar5212_set_gpio_intr(hal, 0, 1);
 		else
-			ar5k_ar5212_gpioSetIntr(hal, 0, 0);
+			ar5k_ar5212_set_gpio_intr(hal, 0, 0);
 	}
 
 	/*
@@ -777,7 +777,7 @@ ar5k_ar5212_reset(hal, op_mode, channel, change_channel, status)
 }
 
 void
-ar5k_ar5212_setPCUConfig(hal)
+ar5k_ar5212_set_opmode(hal)
 	struct ath_hal *hal;
 {
 	u_int32_t pcu_reg, low_id, high_id;
@@ -816,7 +816,7 @@ ar5k_ar5212_setPCUConfig(hal)
 }
 
 HAL_BOOL
-ar5k_ar5212_perCalibration(hal, channel)
+ar5k_ar5212_calibrate(hal, channel)
 	struct ath_hal *hal;
 	HAL_CHANNEL *channel;
 {
@@ -869,7 +869,7 @@ ar5k_ar5212_perCalibration(hal, channel)
  */
 
 HAL_BOOL
-ar5k_ar5212_updateTxTrigLevel(hal, increase)
+ar5k_ar5212_update_tx_triglevel(hal, increase)
 	struct ath_hal *hal;
 	HAL_BOOL increase;
 {
@@ -879,7 +879,7 @@ ar5k_ar5212_updateTxTrigLevel(hal, increase)
 	/*
 	 * Disable interrupts by setting the mask
 	 */
-	imr = ar5k_ar5212_setInterrupts(hal, hal->ah_imr & ~HAL_INT_GLOBAL);
+	imr = ar5k_ar5212_set_intr(hal, hal->ah_imr & ~HAL_INT_GLOBAL);
 
 	trigger_level = AR5K_REG_MS(AR5K_REG_READ(AR5K_AR5212_TXCFG),
 	    AR5K_AR5212_TXCFG_TXFULL);
@@ -902,13 +902,13 @@ ar5k_ar5212_updateTxTrigLevel(hal, increase)
 	/*
 	 * Restore interrupt mask
 	 */
-	ar5k_ar5212_setInterrupts(hal, imr);
+	ar5k_ar5212_set_intr(hal, imr);
 
 	return (status);
 }
 
 int
-ar5k_ar5212_setupTxQueue(hal, queue_type, queue_info)
+ar5k_ar5212_setup_tx_queue(hal, queue_type, queue_info)
 	struct ath_hal *hal;
 	HAL_TX_QUEUE queue_type;
 	const HAL_TXQ_INFO *queue_info;
@@ -940,7 +940,7 @@ ar5k_ar5212_setupTxQueue(hal, queue_type, queue_info)
 	hal->ah_txq[queue].tqi_type = queue_type;
 
 	if (queue_info != NULL) {
-		if (ar5k_ar5212_setTxQueueProps(hal, queue, queue_info)
+		if (ar5k_ar5212_setup_tx_queueprops(hal, queue, queue_info)
 		    != AH_TRUE)
 			return (-1);
 	}
@@ -951,7 +951,7 @@ ar5k_ar5212_setupTxQueue(hal, queue_type, queue_info)
 }
 
 HAL_BOOL
-ar5k_ar5212_setTxQueueProps(hal, queue, queue_info)
+ar5k_ar5212_setup_tx_queueprops(hal, queue, queue_info)
 	struct ath_hal *hal;
 	int queue;
 	const HAL_TXQ_INFO *queue_info;
@@ -973,7 +973,7 @@ ar5k_ar5212_setTxQueueProps(hal, queue, queue_info)
 }
 
 HAL_BOOL
-ar5k_ar5212_releaseTxQueue(hal, queue)
+ar5k_ar5212_release_tx_queue(hal, queue)
 	struct ath_hal *hal;
 	u_int queue;
 {
@@ -987,7 +987,7 @@ ar5k_ar5212_releaseTxQueue(hal, queue)
 }
 
 HAL_BOOL
-ar5k_ar5212_resetTxQueue(hal, queue)
+ar5k_ar5212_reset_tx_queue(hal, queue)
 	struct ath_hal *hal;
 	u_int queue;
 {
@@ -1169,7 +1169,7 @@ ar5k_ar5212_resetTxQueue(hal, queue)
 }
 
 u_int32_t
-ar5k_ar5212_getTxDP(hal, queue)
+ar5k_ar5212_get_tx_buf(hal, queue)
 	struct ath_hal *hal;
 	u_int queue;
 {
@@ -1182,7 +1182,7 @@ ar5k_ar5212_getTxDP(hal, queue)
 }
 
 HAL_BOOL
-ar5k_ar5212_setTxDP(hal, queue, phys_addr)
+ar5k_ar5212_put_tx_buf(hal, queue, phys_addr)
 	struct ath_hal *hal;
 	u_int queue;
 	u_int32_t phys_addr;
@@ -1202,7 +1202,7 @@ ar5k_ar5212_setTxDP(hal, queue, phys_addr)
 }
 
 HAL_BOOL
-ar5k_ar5212_startTxDma(hal, queue)
+ar5k_ar5212_tx_start(hal, queue)
 	struct ath_hal *hal;
 	u_int queue;
 {
@@ -1219,7 +1219,7 @@ ar5k_ar5212_startTxDma(hal, queue)
 }
 
 HAL_BOOL
-ar5k_ar5212_stopTxDma(hal, queue)
+ar5k_ar5212_stop_tx_dma(hal, queue)
 	struct ath_hal *hal;
 	u_int queue;
 {
@@ -1246,8 +1246,8 @@ ar5k_ar5212_stopTxDma(hal, queue)
 }
 
 HAL_BOOL
-ar5k_ar5212_setupTxDesc(hal, desc, packet_length, header_length, type, tx_power,
-    tx_rate0, tx_tries0, key_index, antenna_mode, flags, rtscts_rate,
+ar5k_ar5212_setup_tx_desc(hal, desc, packet_length, header_length, type,
+    tx_power, tx_rate0, tx_tries0, key_index, antenna_mode, flags, rtscts_rate,
     rtscts_duration)
 	struct ath_hal *hal;
 	struct ath_desc *desc;
@@ -1287,9 +1287,9 @@ ar5k_ar5212_setupTxDesc(hal, desc, packet_length, header_length, type, tx_power,
 	tx_desc->tx_control_3 =
 	    tx_rate0 & AR5K_AR5212_DESC_TX_CTL3_XMIT_RATE0;
 
-#define _TX_FLAGS(_c, _flag)	 					\
+#define _TX_FLAGS(_c, _flag)						\
 	if (flags & HAL_TXDESC_##_flag)					\
-		tx_desc->tx_control_##_c |=    				\
+		tx_desc->tx_control_##_c |=				\
 			AR5K_AR5212_DESC_TX_CTL##_c##_##_flag
 
 	_TX_FLAGS(0, CLRDMASK);
@@ -1330,7 +1330,7 @@ ar5k_ar5212_setupTxDesc(hal, desc, packet_length, header_length, type, tx_power,
 }
 
 HAL_BOOL
-ar5k_ar5212_fillTxDesc(hal, desc, segment_length, first_segment, last_segment)
+ar5k_ar5212_fill_tx_desc(hal, desc, segment_length, first_segment, last_segment)
 	struct ath_hal *hal;
 	struct ath_desc *desc;
 	u_int segment_length;
@@ -1359,7 +1359,7 @@ ar5k_ar5212_fillTxDesc(hal, desc, segment_length, first_segment, last_segment)
 }
 
 HAL_BOOL
-ar5k_ar5212_setupXTxDesc(hal, desc, tx_rate1, tx_tries1, tx_rate2, tx_tries2,
+ar5k_ar5212_setup_xtx_desc(hal, desc, tx_rate1, tx_tries1, tx_rate2, tx_tries2,
     tx_rate3, tx_tries3)
 	struct ath_hal *hal;
 	struct ath_desc *desc;
@@ -1394,7 +1394,7 @@ ar5k_ar5212_setupXTxDesc(hal, desc, tx_rate1, tx_tries1, tx_rate2, tx_tries2,
 }
 
 HAL_STATUS
-ar5k_ar5212_procTxDesc(hal, desc)
+ar5k_ar5212_proc_tx_desc(hal, desc)
 	struct ath_hal *hal;
 	struct ath_desc *desc;
 {
@@ -1481,7 +1481,7 @@ ar5k_ar5212_procTxDesc(hal, desc)
 }
 
 HAL_BOOL
-ar5k_ar5212_hasVEOL(hal)
+ar5k_ar5212_has_veol(hal)
 	struct ath_hal *hal;
 {
 	return (AH_TRUE);
@@ -1492,14 +1492,14 @@ ar5k_ar5212_hasVEOL(hal)
  */
 
 u_int32_t
-ar5k_ar5212_getRxDP(hal)
+ar5k_ar5212_get_rx_buf(hal)
 	struct ath_hal *hal;
 {
 	return (AR5K_REG_READ(AR5K_AR5212_RXDP));
 }
 
 void
-ar5k_ar5212_setRxDP(hal, phys_addr)
+ar5k_ar5212_put_rx_buf(hal, phys_addr)
 	struct ath_hal *hal;
 	u_int32_t phys_addr;
 {
@@ -1507,14 +1507,14 @@ ar5k_ar5212_setRxDP(hal, phys_addr)
 }
 
 void
-ar5k_ar5212_enableReceive(hal)
+ar5k_ar5212_start_rx(hal)
 	struct ath_hal *hal;
 {
 	AR5K_REG_WRITE(AR5K_AR5212_CR, AR5K_AR5212_CR_RXE);
 }
 
 HAL_BOOL
-ar5k_ar5212_stopDmaReceive(hal)
+ar5k_ar5212_stop_rx_dma(hal)
 	struct ath_hal *hal;
 {
 	int i;
@@ -1533,21 +1533,21 @@ ar5k_ar5212_stopDmaReceive(hal)
 }
 
 void
-ar5k_ar5212_startPcuReceive(hal)
+ar5k_ar5212_start_rx_pcu(hal)
 	struct ath_hal *hal;
 {
 	AR5K_REG_DISABLE_BITS(AR5K_AR5212_DIAG_SW, AR5K_AR5212_DIAG_SW_DIS_RX);
 }
 
 void
-ar5k_ar5212_stopPcuReceive(hal)
+ar5k_ar5212_stop_pcu_recv(hal)
 	struct ath_hal *hal;
 {
 	AR5K_REG_ENABLE_BITS(AR5K_AR5212_DIAG_SW, AR5K_AR5212_DIAG_SW_DIS_RX);
 }
 
 void
-ar5k_ar5212_setMulticastFilter(hal, filter0, filter1)
+ar5k_ar5212_set_mcast_filter(hal, filter0, filter1)
 	struct ath_hal *hal;
 	u_int32_t filter0;
 	u_int32_t filter1;
@@ -1558,7 +1558,7 @@ ar5k_ar5212_setMulticastFilter(hal, filter0, filter1)
 }
 
 HAL_BOOL
-ar5k_ar5212_setMulticastFilterIndex(hal, index)
+ar5k_ar5212_set_mcast_filterindex(hal, index)
 	struct ath_hal *hal;
 	u_int32_t index;
 {
@@ -1576,7 +1576,7 @@ ar5k_ar5212_setMulticastFilterIndex(hal, index)
 }
 
 HAL_BOOL
-ar5k_ar5212_clrMulticastFilterIndex(hal, index)
+ar5k_ar5212_clear_mcast_filter_idx(hal, index)
 	struct ath_hal *hal;
 	u_int32_t index;
 {
@@ -1595,7 +1595,7 @@ ar5k_ar5212_clrMulticastFilterIndex(hal, index)
 }
 
 u_int32_t
-ar5k_ar5212_getRxFilter(hal)
+ar5k_ar5212_get_rx_filter(hal)
 	struct ath_hal *hal;
 {
 	u_int32_t data, filter = 0;
@@ -1613,7 +1613,7 @@ ar5k_ar5212_getRxFilter(hal)
 }
 
 void
-ar5k_ar5212_setRxFilter(hal, filter)
+ar5k_ar5212_set_rx_filter(hal, filter)
 	struct ath_hal *hal;
 	u_int32_t filter;
 {
@@ -1638,7 +1638,7 @@ ar5k_ar5212_setRxFilter(hal, filter)
 }
 
 HAL_BOOL
-ar5k_ar5212_setupRxDesc(hal, desc, size, flags)
+ar5k_ar5212_setup_rx_desc(hal, desc, size, flags)
 	struct ath_hal *hal;
 	struct ath_desc *desc;
 	u_int32_t size;
@@ -1659,7 +1659,7 @@ ar5k_ar5212_setupRxDesc(hal, desc, size, flags)
 }
 
 HAL_STATUS
-ar5k_ar5212_procRxDesc(hal, desc, phys_addr, next)
+ar5k_ar5212_proc_rx_desc(hal, desc, phys_addr, next)
 	struct ath_hal *hal;
 	struct ath_desc *desc;
 	u_int32_t phys_addr;
@@ -1739,7 +1739,7 @@ ar5k_ar5212_procRxDesc(hal, desc, phys_addr, next)
 }
 
 void
-ar5k_ar5212_rxMonitor(hal)
+ar5k_ar5212_set_rx_monitor(hal)
 	struct ath_hal *hal;
 {
 	AR5K_REG_ENABLE_BITS(AR5K_AR5212_RX_FILTER,
@@ -1751,7 +1751,7 @@ ar5k_ar5212_rxMonitor(hal)
  */
 
 void
-ar5k_ar5212_dumpState(hal)
+ar5k_ar5212_dump_state(hal)
 	struct ath_hal *hal;
 {
 #ifdef AR5K_DEBUG
@@ -1856,7 +1856,7 @@ ar5k_ar5212_dumpState(hal)
 }
 
 HAL_BOOL
-ar5k_ar5212_getDiagState(hal, id, device, size)
+ar5k_ar5212_get_diag_state(hal, id, device, size)
 	struct ath_hal *hal;
 	int id;
 	void **device;
@@ -1871,7 +1871,7 @@ ar5k_ar5212_getDiagState(hal, id, device, size)
 }
 
 void
-ar5k_ar5212_getMacAddress(hal, mac)
+ar5k_ar5212_get_lladdr(hal, mac)
 	struct ath_hal *hal;
 	u_int8_t *mac;
 {
@@ -1879,7 +1879,7 @@ ar5k_ar5212_getMacAddress(hal, mac)
 }
 
 HAL_BOOL
-ar5k_ar5212_setMacAddress(hal, mac)
+ar5k_ar5212_set_lladdr(hal, mac)
 	struct ath_hal *hal;
 	const u_int8_t *mac;
 {
@@ -1899,7 +1899,7 @@ ar5k_ar5212_setMacAddress(hal, mac)
 }
 
 HAL_BOOL
-ar5k_ar5212_setRegulatoryDomain(hal, regdomain, status)
+ar5k_ar5212_set_regdomain(hal, regdomain, status)
 	struct ath_hal *hal;
 	u_int16_t regdomain;
 	HAL_STATUS *status;
@@ -1921,7 +1921,7 @@ ar5k_ar5212_setRegulatoryDomain(hal, regdomain, status)
 }
 
 void
-ar5k_ar5212_setLedState(hal, state)
+ar5k_ar5212_set_ledstate(hal, state)
 	struct ath_hal *hal;
 	HAL_LED_STATE state;
 {
@@ -1961,7 +1961,7 @@ ar5k_ar5212_setLedState(hal, state)
 }
 
 void
-ar5k_ar5212_writeAssocid(hal, bssid, assoc_id, tim_offset)
+ar5k_ar5212_set_associd(hal, bssid, assoc_id, tim_offset)
 	struct ath_hal *hal;
 	const u_int8_t *bssid;
 	u_int16_t assoc_id;
@@ -1986,7 +1986,7 @@ ar5k_ar5212_writeAssocid(hal, bssid, assoc_id, tim_offset)
 	bcopy(bssid, &hal->ah_bssid, IEEE80211_ADDR_LEN);
 
 	if (assoc_id == 0) {
-		ar5k_ar5212_disablePSPoll(hal);
+		ar5k_ar5212_disable_pspoll(hal);
 		return;
 	}
 
@@ -1997,11 +1997,11 @@ ar5k_ar5212_writeAssocid(hal, bssid, assoc_id, tim_offset)
 	    AR5K_AR5212_BEACON_TIM_S) &
 	    AR5K_AR5212_BEACON_TIM));
 
-	ar5k_ar5212_enablePSPoll(hal, NULL, 0);
+	ar5k_ar5212_enable_pspoll(hal, NULL, 0);
 }
 
 HAL_BOOL
-ar5k_ar5212_gpioCfgOutput(hal, gpio)
+ar5k_ar5212_set_gpio_output(hal, gpio)
 	struct ath_hal *hal;
 	u_int32_t gpio;
 {
@@ -2016,7 +2016,7 @@ ar5k_ar5212_gpioCfgOutput(hal, gpio)
 }
 
 HAL_BOOL
-ar5k_ar5212_gpioCfgInput(hal, gpio)
+ar5k_ar5212_set_gpio_input(hal, gpio)
 	struct ath_hal *hal;
 	u_int32_t gpio;
 {
@@ -2031,7 +2031,7 @@ ar5k_ar5212_gpioCfgInput(hal, gpio)
 }
 
 u_int32_t
-ar5k_ar5212_gpioGet(hal, gpio)
+ar5k_ar5212_get_gpio(hal, gpio)
 	struct ath_hal *hal;
 	u_int32_t gpio;
 {
@@ -2044,7 +2044,7 @@ ar5k_ar5212_gpioGet(hal, gpio)
 }
 
 HAL_BOOL
-ar5k_ar5212_gpioSet(hal, gpio, val)
+ar5k_ar5212_set_gpio(hal, gpio, val)
 	struct ath_hal *hal;
 	u_int32_t gpio;
 	u_int32_t val;
@@ -2066,7 +2066,7 @@ ar5k_ar5212_gpioSet(hal, gpio, val)
 }
 
 void
-ar5k_ar5212_gpioSetIntr(hal, gpio, interrupt_level)
+ar5k_ar5212_set_gpio_intr(hal, gpio, interrupt_level)
 	struct ath_hal *hal;
 	u_int gpio;
 	u_int32_t interrupt_level;
@@ -2094,14 +2094,14 @@ ar5k_ar5212_gpioSetIntr(hal, gpio, interrupt_level)
 }
 
 u_int32_t
-ar5k_ar5212_getTsf32(hal)
+ar5k_ar5212_get_tsf32(hal)
 	struct ath_hal *hal;
 {
 	return (AR5K_REG_READ(AR5K_AR5212_TSF_L32));
 }
 
 u_int64_t
-ar5k_ar5212_getTsf64(hal)
+ar5k_ar5212_get_tsf64(hal)
 	struct ath_hal *hal;
 {
 	u_int64_t tsf = AR5K_REG_READ(AR5K_AR5212_TSF_U32);
@@ -2110,7 +2110,7 @@ ar5k_ar5212_getTsf64(hal)
 }
 
 void
-ar5k_ar5212_resetTsf(hal)
+ar5k_ar5212_reset_tsf(hal)
 	struct ath_hal *hal;
 {
 	AR5K_REG_ENABLE_BITS(AR5K_AR5212_BEACON,
@@ -2118,14 +2118,14 @@ ar5k_ar5212_resetTsf(hal)
 }
 
 u_int16_t
-ar5k_ar5212_getRegDomain(hal)
+ar5k_ar5212_get_regdomain(hal)
 	struct ath_hal *hal;
 {
 	return (ar5k_get_regdomain(hal));
 }
 
 HAL_BOOL
-ar5k_ar5212_detectCardPresent(hal)
+ar5k_ar5212_detect_card_present(hal)
 	struct ath_hal *hal;
 {
 	u_int16_t magic;
@@ -2142,7 +2142,7 @@ ar5k_ar5212_detectCardPresent(hal)
 }
 
 void
-ar5k_ar5212_updateMibCounters(hal, statistics)
+ar5k_ar5212_update_mib_counters(hal, statistics)
 	struct ath_hal *hal;
 	HAL_MIB_STATS *statistics;
 {
@@ -2154,7 +2154,7 @@ ar5k_ar5212_updateMibCounters(hal, statistics)
 }
 
 HAL_RFGAIN
-ar5k_ar5212_getRfGain(hal)
+ar5k_ar5212_get_rf_gain(hal)
 	struct ath_hal *hal;
 {
 	u_int32_t data, type;
@@ -2194,7 +2194,7 @@ ar5k_ar5212_getRfGain(hal)
 }
 
 HAL_BOOL
-ar5k_ar5212_setSlotTime(hal, slot_time)
+ar5k_ar5212_set_slot_time(hal, slot_time)
 	struct ath_hal *hal;
 	u_int slot_time;
 {
@@ -2208,7 +2208,7 @@ ar5k_ar5212_setSlotTime(hal, slot_time)
 }
 
 u_int
-ar5k_ar5212_getSlotTime(hal)
+ar5k_ar5212_get_slot_time(hal)
 	struct ath_hal *hal;
 {
 	return (ar5k_clocktoh(AR5K_REG_READ(AR5K_AR5212_DCU_GBL_IFS_SLOT) &
@@ -2216,7 +2216,7 @@ ar5k_ar5212_getSlotTime(hal)
 }
 
 HAL_BOOL
-ar5k_ar5212_setAckTimeout(hal, timeout)
+ar5k_ar5212_set_ack_timeout(hal, timeout)
 	struct ath_hal *hal;
 	u_int timeout;
 {
@@ -2231,7 +2231,7 @@ ar5k_ar5212_setAckTimeout(hal, timeout)
 }
 
 u_int
-ar5k_ar5212_getAckTimeout(hal)
+ar5k_ar5212_get_ack_timeout(hal)
 	struct ath_hal *hal;
 {
 	return (ar5k_clocktoh(AR5K_REG_MS(AR5K_REG_READ(AR5K_AR5212_TIME_OUT),
@@ -2239,7 +2239,7 @@ ar5k_ar5212_getAckTimeout(hal)
 }
 
 HAL_BOOL
-ar5k_ar5212_setCTSTimeout(hal, timeout)
+ar5k_ar5212_set_cts_timeout(hal, timeout)
 	struct ath_hal *hal;
 	u_int timeout;
 {
@@ -2254,7 +2254,7 @@ ar5k_ar5212_setCTSTimeout(hal, timeout)
 }
 
 u_int
-ar5k_ar5212_getCTSTimeout(hal)
+ar5k_ar5212_get_cts_timeout(hal)
 	struct ath_hal *hal;
 {
 	return (ar5k_clocktoh(AR5K_REG_MS(AR5K_REG_READ(AR5K_AR5212_TIME_OUT),
@@ -2266,7 +2266,7 @@ ar5k_ar5212_getCTSTimeout(hal)
  */
 
 HAL_BOOL
-ar5k_ar5212_isHwCipherSupported(hal, cipher)
+ar5k_ar5212_is_cipher_supported(hal, cipher)
 	struct ath_hal *hal;
 	HAL_CIPHER cipher;
 {
@@ -2280,14 +2280,14 @@ ar5k_ar5212_isHwCipherSupported(hal, cipher)
 }
 
 u_int32_t
-ar5k_ar5212_getKeyCacheSize(hal)
+ar5k_ar5212_get_keycache_size(hal)
 	struct ath_hal *hal;
 {
 	return (AR5K_AR5212_KEYCACHE_SIZE);
 }
 
 HAL_BOOL
-ar5k_ar5212_resetKeyCacheEntry(hal, entry)
+ar5k_ar5212_reset_key(hal, entry)
 	struct ath_hal *hal;
 	u_int16_t entry;
 {
@@ -2306,7 +2306,7 @@ ar5k_ar5212_resetKeyCacheEntry(hal, entry)
 }
 
 HAL_BOOL
-ar5k_ar5212_isKeyCacheEntryValid(hal, entry)
+ar5k_ar5212_is_key_valid(hal, entry)
 	struct ath_hal *hal;
 	u_int16_t entry;
 {
@@ -2323,7 +2323,7 @@ ar5k_ar5212_isKeyCacheEntryValid(hal, entry)
 }
 
 HAL_BOOL
-ar5k_ar5212_setKeyCacheEntry(hal, entry, keyval, mac, xor_notused)
+ar5k_ar5212_set_key(hal, entry, keyval, mac, xor_notused)
 	struct ath_hal *hal;
 	u_int16_t entry;
 	const HAL_KEYVAL *keyval;
@@ -2370,11 +2370,11 @@ ar5k_ar5212_setKeyCacheEntry(hal, entry, keyval, mac, xor_notused)
 	for (i = 0; i < elements; i++)
 		AR5K_REG_WRITE(AR5K_AR5212_KEYTABLE_OFF(entry, i), key_v[i]);
 
-	return (ar5k_ar5212_setKeyCacheEntryMac(hal, entry, mac));
+	return (ar5k_ar5212_set_key_lladdr(hal, entry, mac));
 }
 
 HAL_BOOL
-ar5k_ar5212_setKeyCacheEntryMac(hal, entry, mac)
+ar5k_ar5212_set_key_lladdr(hal, entry, mac)
 	struct ath_hal *hal;
 	u_int16_t entry;
 	const u_int8_t *mac;
@@ -2405,7 +2405,7 @@ ar5k_ar5212_setKeyCacheEntryMac(hal, entry, mac)
  */
 
 HAL_BOOL
-ar5k_ar5212_setPowerMode(hal, mode, set_chip, sleep_duration)
+ar5k_ar5212_set_power(hal, mode, set_chip, sleep_duration)
 	struct ath_hal *hal;
 	HAL_POWER_MODE mode;
 	HAL_BOOL set_chip;
@@ -2469,14 +2469,14 @@ ar5k_ar5212_setPowerMode(hal, mode, set_chip, sleep_duration)
 }
 
 HAL_POWER_MODE
-ar5k_ar5212_getPowerMode(hal)
+ar5k_ar5212_get_power_mode(hal)
 	struct ath_hal *hal;
 {
 	return (hal->ah_power_mode);
 }
 
 HAL_BOOL
-ar5k_ar5212_queryPSPollSupport(hal)
+ar5k_ar5212_query_pspoll_support(hal)
 	struct ath_hal *hal;
 {
 	/* nope */
@@ -2484,7 +2484,7 @@ ar5k_ar5212_queryPSPollSupport(hal)
 }
 
 HAL_BOOL
-ar5k_ar5212_initPSPoll(hal)
+ar5k_ar5212_init_pspoll(hal)
 	struct ath_hal *hal;
 {
 	/*
@@ -2494,7 +2494,7 @@ ar5k_ar5212_initPSPoll(hal)
 }
 
 HAL_BOOL
-ar5k_ar5212_enablePSPoll(hal, bssid, assoc_id)
+ar5k_ar5212_enable_pspoll(hal, bssid, assoc_id)
 	struct ath_hal *hal;
 	u_int8_t *bssid;
 	u_int16_t assoc_id;
@@ -2503,7 +2503,7 @@ ar5k_ar5212_enablePSPoll(hal, bssid, assoc_id)
 }
 
 HAL_BOOL
-ar5k_ar5212_disablePSPoll(hal)
+ar5k_ar5212_disable_pspoll(hal)
 	struct ath_hal *hal;
 {
 	return (AH_FALSE);
@@ -2514,7 +2514,7 @@ ar5k_ar5212_disablePSPoll(hal)
  */
 
 void
-ar5k_ar5212_beaconInit(hal, next_beacon, interval)
+ar5k_ar5212_init_beacon(hal, next_beacon, interval)
 	struct ath_hal *hal;
 	u_int32_t next_beacon;
 	u_int32_t interval;
@@ -2555,7 +2555,7 @@ ar5k_ar5212_beaconInit(hal, next_beacon, interval)
 }
 
 void
-ar5k_ar5212_setStationBeaconTimers(hal, state, tsf, dtim_count, cfp_count)
+ar5k_ar5212_set_beacon_timers(hal, state, tsf, dtim_count, cfp_count)
 	struct ath_hal *hal;
 	const HAL_BEACON_STATE *state;
 	u_int32_t tsf;
@@ -2654,7 +2654,7 @@ ar5k_ar5212_setStationBeaconTimers(hal, state, tsf, dtim_count, cfp_count)
 }
 
 void
-ar5k_ar5212_resetStationBeaconTimers(hal)
+ar5k_ar5212_reset_beacon(hal)
 	struct ath_hal *hal;
 {
 	/*
@@ -2671,7 +2671,7 @@ ar5k_ar5212_resetStationBeaconTimers(hal)
 }
 
 HAL_BOOL
-ar5k_ar5212_waitForBeaconDone(hal, phys_addr)
+ar5k_ar5212_wait_for_beacon(hal, phys_addr)
 	struct ath_hal *hal;
 	bus_addr_t phys_addr;
 {
@@ -2695,14 +2695,14 @@ ar5k_ar5212_waitForBeaconDone(hal, phys_addr)
  */
 
 HAL_BOOL
-ar5k_ar5212_isInterruptPending(hal)
+ar5k_ar5212_is_intr_pending(hal)
 	struct ath_hal *hal;
 {
 	return (AR5K_REG_READ(AR5K_AR5212_INTPEND) == 0 ? AH_FALSE : AH_TRUE);
 }
 
 HAL_BOOL
-ar5k_ar5212_getPendingInterrupts(hal, interrupt_mask)
+ar5k_ar5212_get_isr(hal, interrupt_mask)
 	struct ath_hal *hal;
 	u_int32_t *interrupt_mask;
 {
@@ -2741,7 +2741,7 @@ ar5k_ar5212_getPendingInterrupts(hal, interrupt_mask)
 }
 
 u_int32_t
-ar5k_ar5212_getInterrupts(hal)
+ar5k_ar5212_get_intr(hal)
 	struct ath_hal *hal;
 {
 	/* Return the interrupt mask stored previously */
@@ -2749,7 +2749,7 @@ ar5k_ar5212_getInterrupts(hal)
 }
 
 HAL_INT
-ar5k_ar5212_setInterrupts(hal, new_mask)
+ar5k_ar5212_set_intr(hal, new_mask)
 	struct ath_hal *hal;
 	HAL_INT new_mask;
 {
diff --git a/sys/dev/ic/ar5212var.h b/sys/dev/ic/ar5212var.h
index eaeaec27073..c2f0f544b30 100644
--- a/sys/dev/ic/ar5212var.h
+++ b/sys/dev/ic/ar5212var.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ar5212var.h,v 1.6 2005/04/09 00:20:42 reyk Exp $	*/
+/*	$OpenBSD: ar5212var.h,v 1.7 2005/04/18 18:42:55 reyk Exp $	*/
 
 /*
  * Copyright (c) 2004, 2005 Reyk Floeter <reyk@vantronix.net>
@@ -68,7 +68,7 @@ struct ar5k_ar5212_rx_status {
 	 * RX status word 0
 	 */
 	u_int32_t	rx_status_0;
-	
+
 #define AR5K_AR5212_DESC_RX_STATUS0_DATA_LEN		0x00000fff
 #define AR5K_AR5212_DESC_RX_STATUS0_MORE		0x00001000
 #define AR5K_AR5212_DESC_RX_STATUS0_DECOMP_CRC_ERROR	0x00002000
diff --git a/sys/dev/ic/ar5xxx.c b/sys/dev/ic/ar5xxx.c
index 654732a95b4..6f4adbb28d0 100644
--- a/sys/dev/ic/ar5xxx.c
+++ b/sys/dev/ic/ar5xxx.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ar5xxx.c,v 1.20 2005/03/20 04:21:55 reyk Exp $	*/
+/*	$OpenBSD: ar5xxx.c,v 1.21 2005/04/18 18:42:55 reyk Exp $	*/
 
 /*
  * Copyright (c) 2004, 2005 Reyk Floeter <reyk@vantronix.net>
@@ -210,7 +210,7 @@ ath_hal_attach(device, sc, st, sh, status)
 		goto failed;
 
 #ifdef AR5K_DEBUG
-	hal->ah_dumpState(hal);
+	hal->ah_dump_state(hal);
 #endif
 
 	/*
@@ -251,7 +251,7 @@ ath_hal_attach(device, sc, st, sh, status)
 		goto failed;
 	}
 
-	hal->ah_setMacAddress(hal, mac);
+	hal->ah_set_lladdr(hal, mac);
 
 	/* Get rate tables */
 	if (hal->ah_capabilities.cap_mode & HAL_MODE_11A)
@@ -411,7 +411,7 @@ ath_hal_init_channels(hal, channels, max_channels, channels_size, country, mode,
 	HAL_CHANNEL all_channels[max_channels];
 
 	i = c = 0;
-	domain_current = hal->ah_getRegDomain(hal);
+	domain_current = hal->ah_get_regdomain(hal);
 
 	/*
 	 * In debugging mode, enable all channels supported by the chipset
@@ -1495,7 +1495,7 @@ ar5k_rfregs(hal, channel, mode)
 	if (hal->ah_radio == AR5K_AR5111) {
 		hal->ah_rf_banks_size = sizeof(ar5111_rf);
 		func = ar5k_ar5111_rfregs;
-	} else if (hal->ah_radio == AR5K_AR5112) {		
+	} else if (hal->ah_radio == AR5K_AR5112) {
 		hal->ah_rf_banks_size = sizeof(ar5112_rf);
 		func = ar5k_ar5112_rfregs;
 	} else
@@ -1503,8 +1503,8 @@ ar5k_rfregs(hal, channel, mode)
 
 	if (hal->ah_rf_banks == NULL) {
 		/* XXX do extra checks? */
-		if ((hal->ah_rf_banks =
-		    malloc(hal->ah_rf_banks_size, M_DEVBUF, M_NOWAIT)) == NULL) {
+		if ((hal->ah_rf_banks = malloc(hal->ah_rf_banks_size,
+		    M_DEVBUF, M_NOWAIT)) == NULL) {
 			AR5K_PRINT("out of memory\n");
 			return (AH_FALSE);
 		}
@@ -1746,7 +1746,7 @@ ar5k_txpower_table(hal, channel, max_power)
 {
 	u_int16_t txpower, *rates;
 	int i;
-	
+
 	rates = hal->ah_txpower.txp_rates;
 
 	txpower = AR5K_TUNE_DEFAULT_TXPOWER * 2;
diff --git a/sys/dev/ic/ar5xxx.h b/sys/dev/ic/ar5xxx.h
index af08b56d732..52232c8c625 100644
--- a/sys/dev/ic/ar5xxx.h
+++ b/sys/dev/ic/ar5xxx.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ar5xxx.h,v 1.18 2005/04/09 00:20:42 reyk Exp $	*/
+/*	$OpenBSD: ar5xxx.h,v 1.19 2005/04/18 18:42:55 reyk Exp $	*/
 
 /*
  * Copyright (c) 2004, 2005 Reyk Floeter <reyk@vantronix.net>
@@ -927,141 +927,141 @@ struct ath_desc {
 
 #define AR5K_HAL_FUNCTION(_hal, _n, _f)	(_hal)->ah_##_f = ar5k_##_n##_##_f
 #define AR5K_HAL_FUNCTIONS(_t, _n, _a) \
-	_t const HAL_RATE_TABLE *(_a _n##_getRateTable)(struct ath_hal *, \
+	_t const HAL_RATE_TABLE *(_a _n##_get_rate_table)(struct ath_hal *, \
 	    u_int mode); \
 	_t void (_a _n##_detach)(struct ath_hal *); \
 	/* Reset functions */ \
 	_t HAL_BOOL (_a _n##_reset)(struct ath_hal *, HAL_OPMODE, \
 	    HAL_CHANNEL *, HAL_BOOL change_channel, HAL_STATUS *status); \
-	_t void (_a _n##_setPCUConfig)(struct ath_hal *); \
-	_t HAL_BOOL (_a _n##_perCalibration)(struct ath_hal*, \
+	_t void (_a _n##_set_opmode)(struct ath_hal *); \
+	_t HAL_BOOL (_a _n##_calibrate)(struct ath_hal*, \
 	    HAL_CHANNEL *); \
 	/* Transmit functions */ \
-	_t HAL_BOOL (_a _n##_updateTxTrigLevel)(struct ath_hal*, \
+	_t HAL_BOOL (_a _n##_update_tx_triglevel)(struct ath_hal*, \
 	    HAL_BOOL level); \
-	_t int (_a _n##_setupTxQueue)(struct ath_hal *, HAL_TX_QUEUE, \
+	_t int (_a _n##_setup_tx_queue)(struct ath_hal *, HAL_TX_QUEUE, \
 	    const HAL_TXQ_INFO *); \
-	_t HAL_BOOL (_a _n##_setTxQueueProps)(struct ath_hal *, int queue, \
+	_t HAL_BOOL (_a _n##_setup_tx_queueprops)(struct ath_hal *, int queue, \
 	    const HAL_TXQ_INFO *); \
-	_t HAL_BOOL (_a _n##_releaseTxQueue)(struct ath_hal *, u_int queue); \
-	_t HAL_BOOL (_a _n##_resetTxQueue)(struct ath_hal *, u_int queue); \
-	_t u_int32_t (_a _n##_getTxDP)(struct ath_hal *, u_int queue); \
-	_t HAL_BOOL (_a _n##_setTxDP)(struct ath_hal *, u_int, \
+	_t HAL_BOOL (_a _n##_release_tx_queue)(struct ath_hal *, u_int queue); \
+	_t HAL_BOOL (_a _n##_reset_tx_queue)(struct ath_hal *, u_int queue); \
+	_t u_int32_t (_a _n##_get_tx_buf)(struct ath_hal *, u_int queue); \
+	_t HAL_BOOL (_a _n##_put_tx_buf)(struct ath_hal *, u_int, \
 	    u_int32_t phys_addr); \
-	_t HAL_BOOL (_a _n##_startTxDma)(struct ath_hal *, u_int queue); \
-	_t HAL_BOOL (_a _n##_stopTxDma)(struct ath_hal *, u_int queue); \
-	_t HAL_BOOL (_a _n##_setupTxDesc)(struct ath_hal *, \
+	_t HAL_BOOL (_a _n##_tx_start)(struct ath_hal *, u_int queue); \
+	_t HAL_BOOL (_a _n##_stop_tx_dma)(struct ath_hal *, u_int queue); \
+	_t HAL_BOOL (_a _n##_setup_tx_desc)(struct ath_hal *, \
 	    struct ath_desc *, \
 	    u_int packet_length, u_int header_length, HAL_PKT_TYPE type, \
 	    u_int txPower, u_int tx_rate0, u_int tx_tries0, u_int key_index, \
 	    u_int antenna_mode, u_int flags, u_int rtscts_rate, \
 	    u_int rtscts_duration); \
-	_t HAL_BOOL (_a _n##_setupXTxDesc)(struct ath_hal *, \
+	_t HAL_BOOL (_a _n##_setup_xtx_desc)(struct ath_hal *, \
 	    struct ath_desc *, \
 	    u_int tx_rate1, u_int tx_tries1, u_int tx_rate2, u_int tx_tries2, \
 	    u_int tx_rate3, u_int tx_tries3); \
-	_t HAL_BOOL (_a _n##_fillTxDesc)(struct ath_hal *, \
+	_t HAL_BOOL (_a _n##_fill_tx_desc)(struct ath_hal *, \
 	    struct ath_desc *, \
 	    u_int segLen, HAL_BOOL firstSeg, HAL_BOOL lastSeg); \
-	_t HAL_STATUS (_a _n##_procTxDesc)(struct ath_hal *, \
+	_t HAL_STATUS (_a _n##_proc_tx_desc)(struct ath_hal *, \
 	    struct ath_desc *); \
-	_t HAL_BOOL (_a _n##_hasVEOL)(struct ath_hal *); \
+	_t HAL_BOOL (_a _n##_has_veol)(struct ath_hal *); \
 	/* Receive Functions */ \
-	_t u_int32_t (_a _n##_getRxDP)(struct ath_hal*); \
-	_t void (_a _n##_setRxDP)(struct ath_hal*, u_int32_t rxdp); \
-	_t void (_a _n##_enableReceive)(struct ath_hal*); \
-	_t HAL_BOOL (_a _n##_stopDmaReceive)(struct ath_hal*); \
-	_t void (_a _n##_startPcuReceive)(struct ath_hal*); \
-	_t void (_a _n##_stopPcuReceive)(struct ath_hal*); \
-	_t void (_a _n##_setMulticastFilter)(struct ath_hal*, \
+	_t u_int32_t (_a _n##_get_rx_buf)(struct ath_hal*); \
+	_t void (_a _n##_put_rx_buf)(struct ath_hal*, u_int32_t rxdp); \
+	_t void (_a _n##_start_rx)(struct ath_hal*); \
+	_t HAL_BOOL (_a _n##_stop_rx_dma)(struct ath_hal*); \
+	_t void (_a _n##_start_rx_pcu)(struct ath_hal*); \
+	_t void (_a _n##_stop_pcu_recv)(struct ath_hal*); \
+	_t void (_a _n##_set_mcast_filter)(struct ath_hal*, \
 	    u_int32_t filter0, u_int32_t filter1); \
-	_t HAL_BOOL (_a _n##_setMulticastFilterIndex)(struct ath_hal*, \
+	_t HAL_BOOL (_a _n##_set_mcast_filterindex)(struct ath_hal*, \
 	    u_int32_t index); \
-	_t HAL_BOOL (_a _n##_clrMulticastFilterIndex)(struct ath_hal*, \
+	_t HAL_BOOL (_a _n##_clear_mcast_filter_idx)(struct ath_hal*, \
 	    u_int32_t index); \
-	_t u_int32_t (_a _n##_getRxFilter)(struct ath_hal*); \
-	_t void (_a _n##_setRxFilter)(struct ath_hal*, u_int32_t); \
-	_t HAL_BOOL (_a _n##_setupRxDesc)(struct ath_hal *, \
+	_t u_int32_t (_a _n##_get_rx_filter)(struct ath_hal*); \
+	_t void (_a _n##_set_rx_filter)(struct ath_hal*, u_int32_t); \
+	_t HAL_BOOL (_a _n##_setup_rx_desc)(struct ath_hal *, \
 	    struct ath_desc *, u_int32_t size, u_int flags); \
-	_t HAL_STATUS (_a _n##_procRxDesc)(struct ath_hal *, \
+	_t HAL_STATUS (_a _n##_proc_rx_desc)(struct ath_hal *, \
 	    struct ath_desc *, u_int32_t phyAddr, struct ath_desc *next); \
-	_t void (_a _n##_rxMonitor)(struct ath_hal *); \
+	_t void (_a _n##_set_rx_monitor)(struct ath_hal *); \
 	/* Misc Functions */ \
-	_t void (_a _n##_dumpState)(struct ath_hal *); \
-	_t HAL_BOOL (_a _n##_getDiagState)(struct ath_hal *, int, void **, \
+	_t void (_a _n##_dump_state)(struct ath_hal *); \
+	_t HAL_BOOL (_a _n##_get_diag_state)(struct ath_hal *, int, void **, \
 	    u_int *); \
-	_t void (_a _n##_getMacAddress)(struct ath_hal *, u_int8_t *); \
-	_t HAL_BOOL (_a _n##_setMacAddress)(struct ath_hal *, \
+	_t void (_a _n##_get_lladdr)(struct ath_hal *, u_int8_t *); \
+	_t HAL_BOOL (_a _n##_set_lladdr)(struct ath_hal *, \
 	    const u_int8_t*); \
-	_t HAL_BOOL (_a _n##_setRegulatoryDomain)(struct ath_hal*, \
+	_t HAL_BOOL (_a _n##_set_regdomain)(struct ath_hal*, \
 	    u_int16_t, HAL_STATUS *); \
-	_t void (_a _n##_setLedState)(struct ath_hal*, HAL_LED_STATE); \
-	_t void (_a _n##_writeAssocid)(struct ath_hal*, \
+	_t void (_a _n##_set_ledstate)(struct ath_hal*, HAL_LED_STATE); \
+	_t void (_a _n##_set_associd)(struct ath_hal*, \
 	    const u_int8_t *bssid, u_int16_t assocId, u_int16_t timOffset); \
-	_t HAL_BOOL (_a _n##_gpioCfgOutput)(struct ath_hal *, \
+	_t HAL_BOOL (_a _n##_set_gpio_output)(struct ath_hal *, \
 	    u_int32_t gpio); \
-	_t HAL_BOOL (_a _n##_gpioCfgInput)(struct ath_hal *, \
+	_t HAL_BOOL (_a _n##_set_gpio_input)(struct ath_hal *, \
 	    u_int32_t gpio); \
-	_t u_int32_t (_a _n##_gpioGet)(struct ath_hal *, u_int32_t gpio); \
-	_t HAL_BOOL (_a _n##_gpioSet)(struct ath_hal *, u_int32_t gpio, \
+	_t u_int32_t (_a _n##_get_gpio)(struct ath_hal *, u_int32_t gpio); \
+	_t HAL_BOOL (_a _n##_set_gpio)(struct ath_hal *, u_int32_t gpio, \
 	    u_int32_t val); \
-	_t void (_a _n##_gpioSetIntr)(struct ath_hal*, u_int, u_int32_t); \
-	_t u_int32_t (_a _n##_getTsf32)(struct ath_hal*); \
-	_t u_int64_t (_a _n##_getTsf64)(struct ath_hal*); \
-	_t void (_a _n##_resetTsf)(struct ath_hal*); \
-	_t u_int16_t (_a _n##_getRegDomain)(struct ath_hal*); \
-	_t HAL_BOOL (_a _n##_detectCardPresent)(struct ath_hal*); \
-	_t void (_a _n##_updateMibCounters)(struct ath_hal*, \
+	_t void (_a _n##_set_gpio_intr)(struct ath_hal*, u_int, u_int32_t); \
+	_t u_int32_t (_a _n##_get_tsf32)(struct ath_hal*); \
+	_t u_int64_t (_a _n##_get_tsf64)(struct ath_hal*); \
+	_t void (_a _n##_reset_tsf)(struct ath_hal*); \
+	_t u_int16_t (_a _n##_get_regdomain)(struct ath_hal*); \
+	_t HAL_BOOL (_a _n##_detect_card_present)(struct ath_hal*); \
+	_t void (_a _n##_update_mib_counters)(struct ath_hal*, \
 	    HAL_MIB_STATS*); \
-	_t HAL_BOOL (_a _n##_isHwCipherSupported)(struct ath_hal*, \
+	_t HAL_BOOL (_a _n##_is_cipher_supported)(struct ath_hal*, \
 	    HAL_CIPHER); \
-	_t HAL_RFGAIN (_a _n##_getRfGain)(struct ath_hal*); \
+	_t HAL_RFGAIN (_a _n##_get_rf_gain)(struct ath_hal*); \
 	/*								\
 	    u_int32_t (_a _n##_getCurRssi)(struct ath_hal*);		\
 	    u_int32_t (_a _n##_getDefAntenna)(struct ath_hal*);	\
 	    void (_a _n##_setDefAntenna)(struct ath_hal*, u_int32_t ant); \
 	*/								\
-	_t HAL_BOOL (_a _n##_setSlotTime)(struct ath_hal*, u_int);	\
-	_t u_int (_a _n##_getSlotTime)(struct ath_hal*);		\
-	_t HAL_BOOL (_a _n##_setAckTimeout)(struct ath_hal *, u_int); \
-	_t u_int (_a _n##_getAckTimeout)(struct ath_hal*);		\
-	_t HAL_BOOL (_a _n##_setCTSTimeout)(struct ath_hal*, u_int);	\
-	_t u_int (_a _n##_getCTSTimeout)(struct ath_hal*);		\
+	_t HAL_BOOL (_a _n##_set_slot_time)(struct ath_hal*, u_int);	\
+	_t u_int (_a _n##_get_slot_time)(struct ath_hal*);		\
+	_t HAL_BOOL (_a _n##_set_ack_timeout)(struct ath_hal *, u_int); \
+	_t u_int (_a _n##_get_ack_timeout)(struct ath_hal*);		\
+	_t HAL_BOOL (_a _n##_set_cts_timeout)(struct ath_hal*, u_int);	\
+	_t u_int (_a _n##_get_cts_timeout)(struct ath_hal*);		\
 	/* Key Cache Functions */ \
-	_t u_int32_t (_a _n##_getKeyCacheSize)(struct ath_hal*); \
-	_t HAL_BOOL (_a _n##_resetKeyCacheEntry)(struct ath_hal*, \
+	_t u_int32_t (_a _n##_get_keycache_size)(struct ath_hal*); \
+	_t HAL_BOOL (_a _n##_reset_key)(struct ath_hal*, \
 	    u_int16_t); \
-	_t HAL_BOOL (_a _n##_isKeyCacheEntryValid)(struct ath_hal *, \
+	_t HAL_BOOL (_a _n##_is_key_valid)(struct ath_hal *, \
 	    u_int16_t); \
-	_t HAL_BOOL (_a _n##_setKeyCacheEntry)(struct ath_hal*, u_int16_t, \
+	_t HAL_BOOL (_a _n##_set_key)(struct ath_hal*, u_int16_t, \
 	    const HAL_KEYVAL *, const u_int8_t *, int);	\
-	_t HAL_BOOL (_a _n##_setKeyCacheEntryMac)(struct ath_hal*, \
+	_t HAL_BOOL (_a _n##_set_key_lladdr)(struct ath_hal*, \
 	    u_int16_t, const u_int8_t *); \
 	/* Power Management Functions */ \
-	_t HAL_BOOL (_a _n##_setPowerMode)(struct ath_hal*, \
+	_t HAL_BOOL (_a _n##_set_power)(struct ath_hal*, \
 	    HAL_POWER_MODE mode, \
 	    HAL_BOOL set_chip, u_int16_t sleep_duration); \
-	_t HAL_POWER_MODE (_a _n##_getPowerMode)(struct ath_hal*); \
-	_t HAL_BOOL (_a _n##_queryPSPollSupport)(struct ath_hal*); \
-	_t HAL_BOOL (_a _n##_initPSPoll)(struct ath_hal*); \
-	_t HAL_BOOL (_a _n##_enablePSPoll)(struct ath_hal *, u_int8_t *, \
+	_t HAL_POWER_MODE (_a _n##_get_power_mode)(struct ath_hal*); \
+	_t HAL_BOOL (_a _n##_query_pspoll_support)(struct ath_hal*); \
+	_t HAL_BOOL (_a _n##_init_pspoll)(struct ath_hal*); \
+	_t HAL_BOOL (_a _n##_enable_pspoll)(struct ath_hal *, u_int8_t *, \
 	    u_int16_t); \
-	_t HAL_BOOL (_a _n##_disablePSPoll)(struct ath_hal *); \
+	_t HAL_BOOL (_a _n##_disable_pspoll)(struct ath_hal *); \
 	/* Beacon Management Functions */ \
-	_t void (_a _n##_beaconInit)(struct ath_hal *, u_int32_t nexttbtt, \
+	_t void (_a _n##_init_beacon)(struct ath_hal *, u_int32_t nexttbtt, \
 	    u_int32_t intval); \
-	_t void (_a _n##_setStationBeaconTimers)(struct ath_hal *, \
+	_t void (_a _n##_set_beacon_timers)(struct ath_hal *, \
 	    const HAL_BEACON_STATE *, u_int32_t tsf, u_int32_t dtimCount, \
 	    u_int32_t cfpCcount); \
-	_t void (_a _n##_resetStationBeaconTimers)(struct ath_hal *); \
-	_t HAL_BOOL (_a _n##_waitForBeaconDone)(struct ath_hal *, \
+	_t void (_a _n##_reset_beacon)(struct ath_hal *); \
+	_t HAL_BOOL (_a _n##_wait_for_beacon)(struct ath_hal *, \
 	    bus_addr_t); \
 	/* Interrupt functions */ \
-	_t HAL_BOOL (_a _n##_isInterruptPending)(struct ath_hal *); \
-	_t HAL_BOOL (_a _n##_getPendingInterrupts)(struct ath_hal *, \
+	_t HAL_BOOL (_a _n##_is_intr_pending)(struct ath_hal *); \
+	_t HAL_BOOL (_a _n##_get_isr)(struct ath_hal *, \
 	    u_int32_t *); \
-	_t u_int32_t (_a _n##_getInterrupts)(struct ath_hal *); \
-	_t HAL_INT (_a _n##_setInterrupts)(struct ath_hal *, HAL_INT); \
+	_t u_int32_t (_a _n##_get_intr)(struct ath_hal *); \
+	_t HAL_INT (_a _n##_set_intr)(struct ath_hal *, HAL_INT); \
 	/* Chipset functions (ar5k-specific, non-HAL) */ \
 	_t HAL_BOOL (_a _n##_get_capabilities)(struct ath_hal *); \
 	_t void (_a _n##_radar_alert)(struct ath_hal *, HAL_BOOL enable); \
@@ -1095,7 +1095,7 @@ struct ath_hal {
 	HAL_BOOL		ah_running;
 	HAL_RFGAIN		ah_rf_gain;
 
-#define ah_countryCode		ah_country_code
+#define ah_getcountrycode		ah_country_code
 
 	HAL_RATE_TABLE		ah_rt_11a;
 	HAL_RATE_TABLE		ah_rt_11b;
diff --git a/sys/dev/ic/ath.c b/sys/dev/ic/ath.c
index f10077f072c..78ee86c1885 100644
--- a/sys/dev/ic/ath.c
+++ b/sys/dev/ic/ath.c
@@ -1,4 +1,4 @@
-/*      $OpenBSD: ath.c,v 1.22 2005/04/08 22:12:21 reyk Exp $  */
+/*      $OpenBSD: ath.c,v 1.23 2005/04/18 18:42:55 reyk Exp $  */
 /*	$NetBSD: ath.c,v 1.37 2004/08/18 21:59:39 dyoung Exp $	*/
 
 /*-
@@ -278,7 +278,7 @@ ath_attach(u_int16_t devid, struct ath_softc *sc)
 	 * Copy these back; they are set as a side effect
 	 * of constructing the channel list.
 	 */
-	ath_hal_getregdomain(ah, &ath_regdomain);
+	ath_hal_get_regdomain(ah, &ath_regdomain);
 	ath_hal_getcountrycode(ah, &ath_countrycode);
 
 	/*
@@ -316,7 +316,7 @@ ath_attach(u_int16_t devid, struct ath_softc *sc)
 	 * allocate more tx queues for splitting management
 	 * frames and for QOS support.
 	 */
-	sc->sc_bhalq = ath_hal_setuptxqueue(ah,HAL_TX_QUEUE_BEACON,NULL);
+	sc->sc_bhalq = ath_hal_setup_tx_queue(ah,HAL_TX_QUEUE_BEACON,NULL);
 	if (sc->sc_bhalq == (u_int) -1) {
 		if_printf(ifp, "unable to setup a beacon xmit queue!\n");
 		goto bad2;
@@ -324,7 +324,7 @@ ath_attach(u_int16_t devid, struct ath_softc *sc)
 
 	bzero(&qinfo, sizeof(qinfo));
 	qinfo.tqi_subtype = HAL_WME_AC_BE;
-	sc->sc_txhalq = ath_hal_setuptxqueue(ah, HAL_TX_QUEUE_DATA, &qinfo);
+	sc->sc_txhalq = ath_hal_setup_tx_queue(ah, HAL_TX_QUEUE_DATA, &qinfo);
 	if (sc->sc_txhalq == (u_int) -1) {
 		if_printf(ifp, "unable to setup a data xmit queue!\n");
 		goto bad2;
@@ -359,10 +359,10 @@ ath_attach(u_int16_t devid, struct ath_softc *sc)
 	 * Not all chips have the VEOL support we want to use with
 	 * IBSS beacon; check here for it.
 	 */
-	sc->sc_hasveol = ath_hal_hasveol(ah);
+	sc->sc_has_veol = ath_hal_has_veol(ah);
 
 	/* get mac address from hardware */
-	ath_hal_getmac(ah, ic->ic_myaddr);
+	ath_hal_get_lladdr(ah, ic->ic_myaddr);
 
 	if_attach(ifp);
 
@@ -555,25 +555,25 @@ ath_intr1(struct ath_softc *sc)
 		DPRINTF(ATH_DEBUG_ANY, ("%s: invalid; ignored\n", __func__));
 		return 0;
 	}
-	if (!ath_hal_intrpend(ah))		/* shared irq, not for us */
+	if (!ath_hal_is_intr_pending(ah))		/* shared irq, not for us */
 		return 0;
 	if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) != (IFF_RUNNING|IFF_UP)) {
 		DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags 0x%x\n",
 		    __func__, ifp->if_flags));
-		ath_hal_getisr(ah, &status);	/* clear ISR */
-		ath_hal_intrset(ah, 0);		/* disable further intr's */
+		ath_hal_get_isr(ah, &status);	/* clear ISR */
+		ath_hal_set_intr(ah, 0);		/* disable further intr's */
 		return 1; /* XXX */
 	}
-	ath_hal_getisr(ah, &status);		/* NB: clears ISR too */
+	ath_hal_get_isr(ah, &status);		/* NB: clears ISR too */
 	DPRINTF(ATH_DEBUG_INTR, ("%s: status 0x%x\n", __func__, status));
 	status &= sc->sc_imask;			/* discard unasked for bits */
 	if (status & HAL_INT_FATAL) {
 		sc->sc_stats.ast_hardware++;
-		ath_hal_intrset(ah, 0);		/* disable intr's until reset */
+		ath_hal_set_intr(ah, 0);		/* disable intr's until reset */
 		ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_fataltask);
 	} else if (status & HAL_INT_RXORN) {
 		sc->sc_stats.ast_rxorn++;
-		ath_hal_intrset(ah, 0);		/* disable intr's until reset */
+		ath_hal_set_intr(ah, 0);		/* disable intr's until reset */
 		ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxorntask);
 	} else {
 		if (status & HAL_INT_RXEOL) {
@@ -588,7 +588,7 @@ ath_intr1(struct ath_softc *sc)
 		if (status & HAL_INT_TXURN) {
 			sc->sc_stats.ast_txurn++;
 			/* bump tx trigger level */
-			ath_hal_updatetxtriglevel(ah, AH_TRUE);
+			ath_hal_update_tx_triglevel(ah, AH_TRUE);
 		}
 		if (status & HAL_INT_RX)
 			ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxtask);
@@ -739,7 +739,7 @@ ath_init1(struct ath_softc *sc)
 	sc->sc_imask = HAL_INT_RX | HAL_INT_TX
 	    | HAL_INT_RXEOL | HAL_INT_RXORN
 	    | HAL_INT_FATAL | HAL_INT_GLOBAL;
-	ath_hal_intrset(ah, sc->sc_imask);
+	ath_hal_set_intr(ah, sc->sc_imask);
 
 	ifp->if_flags |= IFF_RUNNING;
 	ic->ic_state = IEEE80211_S_INIT;
@@ -794,7 +794,7 @@ ath_stop(struct ifnet *ifp)
 		ifp->if_flags &= ~IFF_RUNNING;
 		ifp->if_timer = 0;
 		if (!sc->sc_invalid)
-			ath_hal_intrset(ah, 0);
+			ath_hal_set_intr(ah, 0);
 		ath_draintxq(sc);
 		if (!sc->sc_invalid) {
 			ath_stoprecv(sc);
@@ -805,7 +805,7 @@ ath_stop(struct ifnet *ifp)
 		ath_beacon_free(sc);
 		ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
 		if (!sc->sc_invalid) {
-			ath_hal_setpower(ah, HAL_PM_FULL_SLEEP, 0);
+			ath_hal_set_power(ah, HAL_PM_FULL_SLEEP, 0);
 		}
 		ath_disable(sc);
 	}
@@ -837,7 +837,7 @@ ath_reset(struct ath_softc *sc)
 	hchan.channel = c->ic_freq;
 	hchan.channelFlags = ath_chan2flags(ic, c);
 
-	ath_hal_intrset(ah, 0);		/* disable interrupts */
+	ath_hal_set_intr(ah, 0);		/* disable interrupts */
 	ath_draintxq(sc);		/* stop xmit side */
 	ath_stoprecv(sc);		/* stop recv side */
 	/* NB: indicate channel change so we do a full reset */
@@ -847,7 +847,7 @@ ath_reset(struct ath_softc *sc)
 	}
 	/* In case channel changed, save as a node channel */
 	ic->ic_bss->ni_chan = ic->ic_ibss_chan;
-	ath_hal_intrset(ah, sc->sc_imask);
+	ath_hal_set_intr(ah, sc->sc_imask);
 	if (ath_startrecv(sc) != 0)	/* restart recv */
 		if_printf(ifp, "%s: unable to start recv logic\n", __func__);
 	ath_start(ifp);			/* restart xmit */
@@ -951,7 +951,7 @@ ath_start(struct ifnet *ifp)
 				u_int64_t tsf;
 				u_int32_t *tstamp;
 
-				tsf = ath_hal_gettsf64(ah);
+				tsf = ath_hal_get_tsf64(ah);
 				/* XXX: adjust 100us delay to xmit */
 				tsf += 100;
 				tstamp = (u_int32_t *)&wh[1];
@@ -1127,7 +1127,7 @@ ath_initkeytable(struct ath_softc *sc)
 	for (i = 0; i < IEEE80211_WEP_NKID; i++) {
 		struct ieee80211_wepkey *k = &ic->ic_nw_keys[i];
 		if (k->wk_len == 0)
-			ath_hal_keyreset(ah, i);
+			ath_hal_reset_key(ah, i);
 		else {
 			HAL_KEYVAL hk;
 
@@ -1149,8 +1149,8 @@ ath_initkeytable(struct ath_softc *sc)
 				hk.wk_len = AR5K_KEYVAL_LENGTH_128;
 			else
 				return (EINVAL);
-			
-			if (ath_hal_keyset(ah, i, &hk) != AH_TRUE)
+
+			if (ath_hal_set_key(ah, i, &hk) != AH_TRUE)
 				return (EINVAL);
 		}
 	}
@@ -1217,7 +1217,7 @@ ath_calcrxfilter(struct ath_softc *sc)
 	struct ifnet *ifp = &ic->ic_if;
 	u_int32_t rfilt;
 
-	rfilt = (ath_hal_getrxfilter(ah) & HAL_RX_FILTER_PHYERR)
+	rfilt = (ath_hal_get_rx_filter(ah) & HAL_RX_FILTER_PHYERR)
 	    | HAL_RX_FILTER_UCAST | HAL_RX_FILTER_BCAST | HAL_RX_FILTER_MCAST;
 	if (ic->ic_opmode != IEEE80211_M_STA)
 		rfilt |= HAL_RX_FILTER_PROBEREQ;
@@ -1236,15 +1236,15 @@ ath_mode_init(struct ath_softc *sc)
 
 	/* configure rx filter */
 	rfilt = ath_calcrxfilter(sc);
-	ath_hal_setrxfilter(ah, rfilt);
+	ath_hal_set_rx_filter(ah, rfilt);
 
 	/* configure operational mode */
-	ath_hal_setopmode(ah);
+	ath_hal_set_opmode(ah);
 
 	/* calculate and install multicast filter */
 	mfilt[0] = mfilt[1] = 0;
 	ath_mcastfilter_compute(sc, &mfilt);
-	ath_hal_setmcastfilter(ah, mfilt[0], mfilt[1]);
+	ath_hal_set_mcast_filter(ah, mfilt[0], mfilt[1]);
 	DPRINTF(ATH_DEBUG_MODE, ("%s: RX filter 0x%x, MC filter %08x:%08x\n",
 	    __func__, rfilt, mfilt[0], mfilt[1]));
 }
@@ -1322,7 +1322,7 @@ ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_node *ni)
 	ds = bf->bf_desc;
 	bzero(ds, sizeof(struct ath_desc));
 
-	if (ic->ic_opmode == IEEE80211_M_IBSS && sc->sc_hasveol) {
+	if (ic->ic_opmode == IEEE80211_M_IBSS && sc->sc_has_veol) {
 		ds->ds_link = bf->bf_daddr;	/* link to self */
 		flags |= HAL_TXDESC_VEOL;
 	} else {
@@ -1349,7 +1349,7 @@ ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_node *ni)
 	if (ic->ic_opmode == IEEE80211_M_IBSS)
 		flags |= HAL_TXDESC_VEOL;
 
-	if (!ath_hal_setuptxdesc(ah, ds
+	if (!ath_hal_setup_tx_desc(ah, ds
 		, m->m_pkthdr.len + IEEE80211_CRC_LEN	/* packet length */
 		, sizeof(struct ieee80211_frame)	/* header length */
 		, HAL_PKT_TYPE_BEACON		/* Atheros packet type */
@@ -1361,17 +1361,17 @@ ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_node *ni)
 		, 0				/* rts/cts rate */
 		, 0				/* rts/cts duration */
 	)) {
-		printf("%s: ath_hal_setuptxdesc failed\n", __func__);
+		printf("%s: ath_hal_setup_tx_desc failed\n", __func__);
 		return -1;
 	}
 	/* NB: beacon's BufLen must be a multiple of 4 bytes */
 	/* XXX verify mbuf data area covers this roundup */
-	if (!ath_hal_filltxdesc(ah, ds
+	if (!ath_hal_fill_tx_desc(ah, ds
 		, roundup(bf->bf_segs[0].ds_len, 4)	/* buffer length */
 		, AH_TRUE				/* first segment */
 		, AH_TRUE				/* last segment */
 	)) {
-		printf("%s: ath_hal_filltxdesc failed\n", __func__);
+		printf("%s: ath_hal_fill_tx_desc failed\n", __func__);
 		return -1;
 	}
 
@@ -1396,15 +1396,15 @@ ath_beacon_proc(void *arg, int pending)
 		return;
 	}
 	/* TODO: update beacon to reflect PS poll state */
-	if (!ath_hal_stoptxdma(ah, sc->sc_bhalq)) {
+	if (!ath_hal_stop_tx_dma(ah, sc->sc_bhalq)) {
 		DPRINTF(ATH_DEBUG_ANY, ("%s: beacon queue %u did not stop?\n",
 		    __func__, sc->sc_bhalq));
 	}
 	bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, 0,
 	    bf->bf_dmamap->dm_mapsize, BUS_DMASYNC_PREWRITE);
 
-	ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr);
-	ath_hal_txstart(ah, sc->sc_bhalq);
+	ath_hal_put_tx_buf(ah, sc->sc_bhalq, bf->bf_daddr);
+	ath_hal_tx_start(ah, sc->sc_bhalq);
 	DPRINTF(ATH_DEBUG_BEACON_PROC,
 	    ("%s: TXDP%u = %p (%p)\n", __func__,
 	    sc->sc_bhalq, (caddr_t)bf->bf_daddr, bf->bf_desc));
@@ -1509,12 +1509,12 @@ ath_beacon_config(struct ath_softc *sc)
 		    , bs.bs_bmissthreshold
 		    , bs.bs_sleepduration
 		));
-		ath_hal_intrset(ah, 0);
-		ath_hal_beacontimers(ah, &bs, 0/*XXX*/, 0, 0);
+		ath_hal_set_intr(ah, 0);
+		ath_hal_set_beacon_timers(ah, &bs, 0/*XXX*/, 0, 0);
 		sc->sc_imask |= HAL_INT_BMISS;
-		ath_hal_intrset(ah, sc->sc_imask);
+		ath_hal_set_intr(ah, sc->sc_imask);
 	} else {
-		ath_hal_intrset(ah, 0);
+		ath_hal_set_intr(ah, 0);
 		if (nexttbtt == intval)
 			intval |= HAL_BEACON_RESET_TSF;
 		if (ic->ic_opmode == IEEE80211_M_IBSS) {
@@ -1526,7 +1526,7 @@ ath_beacon_config(struct ath_softc *sc)
 			 * deal with things.
 			 */
 			intval |= HAL_BEACON_ENA;
-			if (!sc->sc_hasveol)
+			if (!sc->sc_has_veol)
 				sc->sc_imask |= HAL_INT_SWBA;
 		} else if (ic->ic_opmode == IEEE80211_M_HOSTAP) {
 			/*
@@ -1536,13 +1536,13 @@ ath_beacon_config(struct ath_softc *sc)
 			intval |= HAL_BEACON_ENA;
 			sc->sc_imask |= HAL_INT_SWBA;	/* beacon prepare */
 		}
-		ath_hal_beaconinit(ah, nexttbtt, intval);
-		ath_hal_intrset(ah, sc->sc_imask);
+		ath_hal_init_beacon(ah, nexttbtt, intval);
+		ath_hal_set_intr(ah, sc->sc_imask);
 		/*
 		 * When using a self-linked beacon descriptor in IBBS
 		 * mode load it once here.
 		 */
-		if (ic->ic_opmode == IEEE80211_M_IBSS && sc->sc_hasveol)
+		if (ic->ic_opmode == IEEE80211_M_IBSS && sc->sc_has_veol)
 			ath_beacon_proc(sc, 0);
 	}
 }
@@ -1845,7 +1845,7 @@ ath_rxbuf_init(struct ath_softc *sc, struct ath_buf *bf)
 
 	ds->ds_link = bf->bf_daddr;	/* link to self */
 	ds->ds_data = bf->bf_segs[0].ds_addr;
-	ath_hal_setuprxdesc(ah, ds
+	ath_hal_setup_rx_desc(ah, ds
 		, m->m_len		/* buffer size */
 		, 0
 	);
@@ -1906,7 +1906,7 @@ ath_rx_proc(void *arg, int npending)
 		 * on.  All this is necessary because of our use of
 		 * a self-linked list to avoid rx overruns.
 		 */
-		status = ath_hal_rxprocdesc(ah, ds,
+		status = ath_hal_proc_rx_desc(ah, ds,
 				bf->bf_daddr, PA2DESC(sc, ds->ds_link));
 #ifdef AR_DEBUG
 		if (ath_debug & ATH_DEBUG_RECV_DESC)
@@ -2059,8 +2059,8 @@ ath_rx_proc(void *arg, int npending)
 		TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list);
 	} while (ath_rxbuf_init(sc, bf) == 0);
 
-	ath_hal_rxmonitor(ah);			/* rx signal state monitoring */
-	ath_hal_rxena(ah);			/* in case of RXEOL */
+	ath_hal_set_rx_monitor(ah);			/* rx signal state monitoring */
+	ath_hal_start_rx(ah);			/* in case of RXEOL */
 
 	if ((ifp->if_flags & IFF_OACTIVE) == 0 && !IFQ_IS_EMPTY(&ifp->if_snd))
 		ath_start(ifp);
@@ -2378,7 +2378,7 @@ ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni,
 	 * Formulate first tx descriptor with tx controls.
 	 */
 	/* XXX check return value? */
-	ath_hal_setuptxdesc(ah, ds
+	ath_hal_setup_tx_desc(ah, ds
 		, pktlen		/* packet length */
 		, hdrlen		/* header length */
 		, atype			/* Atheros packet type */
@@ -2391,7 +2391,7 @@ ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni,
 		, ctsduration		/* rts/cts duration */
 	);
 #ifdef notyet
-	ath_hal_setupxtxdesc(ah, ds
+	ath_hal_setup_xtx_desc(ah, ds
 		, AH_FALSE		/* short preamble */
 		, 0, 0			/* series 1 rate/tries */
 		, 0, 0			/* series 2 rate/tries */
@@ -2408,7 +2408,7 @@ ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni,
 		} else {
 			ds->ds_link = bf->bf_daddr + sizeof(*ds) * (i + 1);
 		}
-		ath_hal_filltxdesc(ah, ds
+		ath_hal_fill_tx_desc(ah, ds
 			, bf->bf_segs[i].ds_len	/* segment length */
 			, i == 0		/* first segment */
 			, i == bf->bf_nseg - 1	/* last segment */
@@ -2426,7 +2426,7 @@ ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni,
 	s = splnet();
 	TAILQ_INSERT_TAIL(&sc->sc_txq, bf, bf_list);
 	if (sc->sc_txlink == NULL) {
-		ath_hal_puttxbuf(ah, sc->sc_txhalq, bf->bf_daddr);
+		ath_hal_put_tx_buf(ah, sc->sc_txhalq, bf->bf_daddr);
 		DPRINTF(ATH_DEBUG_XMIT, ("%s: TXDP0 = %p (%p)\n", __func__,
 		    (caddr_t)bf->bf_daddr, bf->bf_desc));
 	} else {
@@ -2437,7 +2437,7 @@ ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni,
 	sc->sc_txlink = &bf->bf_desc[bf->bf_nseg - 1].ds_link;
 	splx(s);
 
-	ath_hal_txstart(ah, sc->sc_txhalq);
+	ath_hal_tx_start(ah, sc->sc_txhalq);
 	return 0;
 }
 
@@ -2457,7 +2457,7 @@ ath_tx_proc(void *arg, int npending)
 
 	DPRINTF(ATH_DEBUG_TX_PROC, ("%s: pending %u tx queue %p, "
 	    "link %p\n", __func__, npending,
-	    (caddr_t)(u_intptr_t) ath_hal_gettxbuf(sc->sc_ah,
+	    (caddr_t)(u_intptr_t) ath_hal_get_tx_buf(sc->sc_ah,
 	    sc->sc_txhalq), sc->sc_txlink));
 	for (;;) {
 		s = splnet();
@@ -2469,7 +2469,7 @@ ath_tx_proc(void *arg, int npending)
 		}
 		/* only the last descriptor is needed */
 		ds = &bf->bf_desc[bf->bf_nseg - 1];
-		status = ath_hal_txprocdesc(ah, ds);
+		status = ath_hal_proc_tx_desc(ah, ds);
 #ifdef AR_DEBUG
 		if (ath_debug & ATH_DEBUG_XMIT_DESC)
 			ath_printtxbuf(bf, status == HAL_OK);
@@ -2546,15 +2546,15 @@ ath_draintxq(struct ath_softc *sc)
 	/* XXX return value */
 	if (!sc->sc_invalid) {
 		/* don't touch the hardware if marked invalid */
-		(void) ath_hal_stoptxdma(ah, sc->sc_txhalq);
+		(void) ath_hal_stop_tx_dma(ah, sc->sc_txhalq);
 		DPRINTF(ATH_DEBUG_RESET,
 		    ("%s: tx queue %p, link %p\n", __func__,
-		    (caddr_t)(u_intptr_t) ath_hal_gettxbuf(ah, sc->sc_txhalq),
+		    (caddr_t)(u_intptr_t) ath_hal_get_tx_buf(ah, sc->sc_txhalq),
 		    sc->sc_txlink));
-		(void) ath_hal_stoptxdma(ah, sc->sc_bhalq);
+		(void) ath_hal_stop_tx_dma(ah, sc->sc_bhalq);
 		DPRINTF(ATH_DEBUG_RESET,
 		    ("%s: beacon queue %p\n", __func__,
-		    (caddr_t)(u_intptr_t) ath_hal_gettxbuf(ah, sc->sc_bhalq)));
+		    (caddr_t)(u_intptr_t)ath_hal_get_tx_buf(ah, sc->sc_bhalq)));
 	}
 	for (;;) {
 		s = splnet();
@@ -2569,7 +2569,7 @@ ath_draintxq(struct ath_softc *sc)
 #ifdef AR_DEBUG
 		if (ath_debug & ATH_DEBUG_RESET) {
 			ath_printtxbuf(bf,
-				ath_hal_txprocdesc(ah, bf->bf_desc) == HAL_OK);
+			    ath_hal_proc_tx_desc(ah, bf->bf_desc) == HAL_OK);
 		}
 #endif /* AR_DEBUG */
 		bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
@@ -2602,19 +2602,19 @@ ath_stoprecv(struct ath_softc *sc)
 		((_pa) - (_sc)->sc_desc_paddr)))
 	struct ath_hal *ah = sc->sc_ah;
 
-	ath_hal_stoppcurecv(ah);	/* disable PCU */
-	ath_hal_setrxfilter(ah, 0);	/* clear recv filter */
-	ath_hal_stopdmarecv(ah);	/* disable DMA engine */
+	ath_hal_stop_pcu_recv(ah);	/* disable PCU */
+	ath_hal_set_rx_filter(ah, 0);	/* clear recv filter */
+	ath_hal_stop_rx_dma(ah);	/* disable DMA engine */
 	DELAY(3000);			/* long enough for 1 frame */
 #ifdef AR_DEBUG
 	if (ath_debug & ATH_DEBUG_RESET) {
 		struct ath_buf *bf;
 
 		printf("%s: rx queue %p, link %p\n", __func__,
-		    (caddr_t)(u_intptr_t) ath_hal_getrxbuf(ah), sc->sc_rxlink);
+		    (caddr_t)(u_intptr_t)ath_hal_get_rx_buf(ah), sc->sc_rxlink);
 		TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
 			struct ath_desc *ds = bf->bf_desc;
-			if (ath_hal_rxprocdesc(ah, ds, bf->bf_daddr,
+			if (ath_hal_proc_rx_desc(ah, ds, bf->bf_daddr,
 			    PA2DESC(sc, ds->ds_link)) == HAL_OK)
 				ath_printrxbuf(bf, 1);
 		}
@@ -2645,10 +2645,10 @@ ath_startrecv(struct ath_softc *sc)
 	}
 
 	bf = TAILQ_FIRST(&sc->sc_rxbuf);
-	ath_hal_putrxbuf(ah, bf->bf_daddr);
-	ath_hal_rxena(ah);		/* enable recv descriptors */
+	ath_hal_put_rx_buf(ah, bf->bf_daddr);
+	ath_hal_start_rx(ah);		/* enable recv descriptors */
 	ath_mode_init(sc);		/* set filters, etc. */
-	ath_hal_startpcurecv(ah);	/* re-enable PCU/DMA engine */
+	ath_hal_start_rx_pcu(ah);	/* re-enable PCU/DMA engine */
 	return 0;
 }
 
@@ -2679,7 +2679,7 @@ ath_chan_set(struct ath_softc *sc, struct ieee80211_channel *chan)
 		 * hardware at the new frequency, and then re-enable
 		 * the relevant bits of the h/w.
 		 */
-		ath_hal_intrset(ah, 0);		/* disable interrupts */
+		ath_hal_set_intr(ah, 0);		/* disable interrupts */
 		ath_draintxq(sc);		/* clear pending tx frames */
 		ath_stoprecv(sc);		/* turn off frame recv */
 		/*
@@ -2725,7 +2725,7 @@ ath_chan_set(struct ath_softc *sc, struct ieee80211_channel *chan)
 		/*
 		 * Re-enable interrupts.
 		 */
-		ath_hal_intrset(ah, sc->sc_imask);
+		ath_hal_set_intr(ah, sc->sc_imask);
 	}
 	return 0;
 }
@@ -2772,7 +2772,7 @@ ath_calibrate(void *arg)
 	DPRINTF(ATH_DEBUG_CALIBRATE,
 	    ("%s: channel %u/%x\n", __func__, c->ic_freq, c->ic_flags));
 
-	if (ath_hal_getrfgain(ah) == HAL_RFGAIN_NEED_CHANGE) {
+	if (ath_hal_get_rf_gain(ah) == HAL_RFGAIN_NEED_CHANGE) {
 		/*
 		 * Rfgain is out of bounds, reset the chip
 		 * to load new gain values.
@@ -2826,11 +2826,11 @@ ath_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
 
 	timeout_del(&sc->sc_scan_to);
 	timeout_del(&sc->sc_cal_to);
-	ath_hal_setledstate(ah, ath_state_to_led(nstate));	/* set LED */
+	ath_hal_set_ledstate(ah, ath_state_to_led(nstate));	/* set LED */
 
 	if (nstate == IEEE80211_S_INIT) {
 		sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS);
-		ath_hal_intrset(ah, sc->sc_imask);
+		ath_hal_set_intr(ah, sc->sc_imask);
 		return (*sc->sc_newstate)(ic, nstate, arg);
 	}
 	ni = ic->ic_bss;
@@ -2843,20 +2843,20 @@ ath_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
 	} else {
 		bssid = ni->ni_bssid;
 	}
-	ath_hal_setrxfilter(ah, rfilt);
+	ath_hal_set_rx_filter(ah, rfilt);
 	DPRINTF(ATH_DEBUG_ANY, ("%s: RX filter 0x%x bssid %s\n",
 	    __func__, rfilt, ether_sprintf((u_char*)bssid)));
 
 	if (nstate == IEEE80211_S_RUN && ic->ic_opmode == IEEE80211_M_STA) {
-		ath_hal_setassocid(ah, bssid, ni->ni_associd);
+		ath_hal_set_associd(ah, bssid, ni->ni_associd);
 	} else {
-		ath_hal_setassocid(ah, bssid, 0);
+		ath_hal_set_associd(ah, bssid, 0);
 	}
 
 	if (ic->ic_flags & IEEE80211_F_WEPON) {
 		for (i = 0; i < IEEE80211_WEP_NKID; i++) {
-			if (ath_hal_keyisvalid(ah, i))
-				ath_hal_keysetmac(ah, i, bssid);
+			if (ath_hal_is_key_valid(ah, i))
+				ath_hal_set_key_lladdr(ah, i, bssid);
 		}
 	}
 
@@ -2889,7 +2889,7 @@ ath_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
 		ath_beacon_config(sc);
 	} else {
 		sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS);
-		ath_hal_intrset(ah, sc->sc_imask);
+		ath_hal_set_intr(ah, sc->sc_imask);
 	}
 
 	/*
@@ -2927,9 +2927,9 @@ ath_recv_mgmt(struct ieee80211com *ic, struct mbuf *m,
 		if (ic->ic_opmode != IEEE80211_M_IBSS ||
 		    ic->ic_state != IEEE80211_S_RUN)
 			break;
-		if (ieee80211_ibss_merge(ic, ni, ath_hal_gettsf64(ah)) ==
+		if (ieee80211_ibss_merge(ic, ni, ath_hal_get_tsf64(ah)) ==
 		    ENETRESET)
-			ath_hal_setassocid(ah, ic->ic_bss->ni_bssid, 0);
+			ath_hal_set_associd(ah, ic->ic_bss->ni_bssid, 0);
 		break;
 	default:
 		break;
@@ -2970,7 +2970,7 @@ ath_getchannels(struct ath_softc *sc, u_int cc, HAL_BOOL outdoor,
 	struct ath_hal *ah = sc->sc_ah;
 	HAL_CHANNEL *chans;
 	int i, ix, nchan;
-	
+
 	sc->sc_nchan = 0;
 	chans = malloc(IEEE80211_CHAN_MAX * sizeof(HAL_CHANNEL),
 			M_TEMP, M_NOWAIT);
@@ -3013,7 +3013,7 @@ ath_getchannels(struct ath_softc *sc, u_int cc, HAL_BOOL outdoor,
 		sc->sc_nchan++;
 	}
 	free(chans, M_TEMP);
-	
+
 	if (sc->sc_nchan < 1) {
 		if_printf(ifp, "no valid channels for regdomain %s(%u)\n",
 		    ieee80211_regdomain2name(ath_regdomain),
@@ -3038,16 +3038,16 @@ ath_rate_setup(struct ath_softc *sc, u_int mode)
 
 	switch (mode) {
 	case IEEE80211_MODE_11A:
-		sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11A);
+		sc->sc_rates[mode] = ath_hal_get_rate_table(ah, HAL_MODE_11A);
 		break;
 	case IEEE80211_MODE_11B:
-		sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11B);
+		sc->sc_rates[mode] = ath_hal_get_rate_table(ah, HAL_MODE_11B);
 		break;
 	case IEEE80211_MODE_11G:
-		sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11G);
+		sc->sc_rates[mode] = ath_hal_get_rate_table(ah, HAL_MODE_11G);
 		break;
 	case IEEE80211_MODE_TURBO:
-		sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_TURBO);
+		sc->sc_rates[mode] = ath_hal_get_rate_table(ah, HAL_MODE_TURBO);
 		break;
 	default:
 		DPRINTF(ATH_DEBUG_ANY,
@@ -3252,11 +3252,11 @@ ath_gpio_attach(struct ath_softc *sc)
 		    GPIO_PIN_OUTPUT;
 
 		/* Set pin mode to input */
-		ath_hal_gpiocfginput(ah, i);
+		ath_hal_set_gpio_input(ah, i);
 		sc->sc_gpio_pins[i].pin_flags = GPIO_PIN_INPUT;
 
 		/* Get pin input */
-		sc->sc_gpio_pins[i].pin_state = ath_hal_gpioget(ah, i) ?
+		sc->sc_gpio_pins[i].pin_state = ath_hal_get_gpio(ah, i) ?
 		    GPIO_PIN_HIGH : GPIO_PIN_LOW;
 	}
 
@@ -3282,7 +3282,7 @@ ath_gpio_pin_read(void *arg, int pin)
 {
 	struct ath_softc *sc = arg;
 	struct ath_hal *ah = sc->sc_ah;
-	return (ath_hal_gpioget(ah, pin) ? GPIO_PIN_HIGH : GPIO_PIN_LOW);
+	return (ath_hal_get_gpio(ah, pin) ? GPIO_PIN_HIGH : GPIO_PIN_LOW);
 }
 
 void
@@ -3290,7 +3290,7 @@ ath_gpio_pin_write(void *arg, int pin, int value)
 {
 	struct ath_softc *sc = arg;
 	struct ath_hal *ah = sc->sc_ah;
-	ath_hal_gpioset(ah, pin, value ? GPIO_PIN_HIGH : GPIO_PIN_LOW);
+	ath_hal_set_gpio(ah, pin, value ? GPIO_PIN_HIGH : GPIO_PIN_LOW);
 }
 
 void
@@ -3300,9 +3300,9 @@ ath_gpio_pin_ctl(void *arg, int pin, int flags)
 	struct ath_hal *ah = sc->sc_ah;
 
 	if (flags & GPIO_PIN_INPUT) {
-		ath_hal_gpiocfginput(ah, pin);
+		ath_hal_set_gpio_input(ah, pin);
 	} else if (flags & GPIO_PIN_OUTPUT) {
-		ath_hal_gpiocfgoutput(ah, pin);
+		ath_hal_set_gpio_output(ah, pin);
 	}
 }
 #endif /* NGPIO */
diff --git a/sys/dev/ic/athvar.h b/sys/dev/ic/athvar.h
index 514ad9f5dc9..cce12f00f40 100644
--- a/sys/dev/ic/athvar.h
+++ b/sys/dev/ic/athvar.h
@@ -1,4 +1,4 @@
-/*      $OpenBSD: athvar.h,v 1.6 2005/03/11 17:45:28 reyk Exp $  */
+/*      $OpenBSD: athvar.h,v 1.7 2005/04/18 18:42:56 reyk Exp $  */
 /*	$NetBSD: athvar.h,v 1.10 2004/08/10 01:03:53 dyoung Exp $	*/
 
 /*-
@@ -225,7 +225,7 @@ struct ath_softc {
 	struct ath_hal		*sc_ah;		/* Atheros HAL */
 	unsigned int		sc_invalid  : 1,/* disable hardware accesses */
 				sc_doani    : 1,/* dynamic noise immunity */
-				sc_hasveol  : 1,/* tx VEOL support */
+				sc_has_veol  : 1,/* tx VEOL support */
 				sc_probing  : 1;/* probing AP on beacon miss */
 						/* rate tables */
 	u_int			sc_nchan;	/* number of valid channels */
@@ -417,135 +417,135 @@ int	ath_intr(void *);
  */
 #define	ath_hal_reset(_ah, _opmode, _chan, _outdoor, _pstatus) \
 	((*(_ah)->ah_reset)((_ah), (_opmode), (_chan), (_outdoor), (_pstatus)))
-#define	ath_hal_getratetable(_ah, _mode) \
-	((*(_ah)->ah_getRateTable)((_ah), (_mode)))
-#define	ath_hal_getmac(_ah, _mac) \
-	((*(_ah)->ah_getMacAddress)((_ah), (_mac)))
-#define	ath_hal_setmac(_ah, _mac) \
-	((*(_ah)->ah_setMacAddress)((_ah), (_mac)))
-#define	ath_hal_intrset(_ah, _mask) \
-	((*(_ah)->ah_setInterrupts)((_ah), (_mask)))
-#define	ath_hal_intrget(_ah) \
-	((*(_ah)->ah_getInterrupts)((_ah)))
-#define	ath_hal_intrpend(_ah) \
-	((*(_ah)->ah_isInterruptPending)((_ah)))
-#define	ath_hal_getisr(_ah, _pmask) \
-	((*(_ah)->ah_getPendingInterrupts)((_ah), (_pmask)))
-#define	ath_hal_updatetxtriglevel(_ah, _inc) \
-	((*(_ah)->ah_updateTxTrigLevel)((_ah), (_inc)))
-#define	ath_hal_setpower(_ah, _mode, _sleepduration) \
-	((*(_ah)->ah_setPowerMode)((_ah), (_mode), AH_TRUE, (_sleepduration)))
-#define	ath_hal_keyreset(_ah, _ix) \
-	((*(_ah)->ah_resetKeyCacheEntry)((_ah), (_ix)))
-#define	ath_hal_keyset(_ah, _ix, _pk) \
-	((*(_ah)->ah_setKeyCacheEntry)((_ah), (_ix), (_pk), NULL, AH_FALSE))
-#define	ath_hal_keyisvalid(_ah, _ix) \
-	(((*(_ah)->ah_isKeyCacheEntryValid)((_ah), (_ix))))
-#define	ath_hal_keysetmac(_ah, _ix, _mac) \
-	((*(_ah)->ah_setKeyCacheEntryMac)((_ah), (_ix), (_mac)))
-#define	ath_hal_getrxfilter(_ah) \
-	((*(_ah)->ah_getRxFilter)((_ah)))
-#define	ath_hal_setrxfilter(_ah, _filter) \
-	((*(_ah)->ah_setRxFilter)((_ah), (_filter)))
-#define	ath_hal_setmcastfilter(_ah, _mfilt0, _mfilt1) \
-	((*(_ah)->ah_setMulticastFilter)((_ah), (_mfilt0), (_mfilt1)))
-#define	ath_hal_waitforbeacon(_ah, _bf) \
-	((*(_ah)->ah_waitForBeaconDone)((_ah), (_bf)->bf_daddr))
-#define	ath_hal_putrxbuf(_ah, _bufaddr) \
-	((*(_ah)->ah_setRxDP)((_ah), (_bufaddr)))
-#define	ath_hal_gettsf32(_ah) \
-	((*(_ah)->ah_getTsf32)((_ah)))
-#define	ath_hal_gettsf64(_ah) \
-	((*(_ah)->ah_getTsf64)((_ah)))
-#define	ath_hal_resettsf(_ah) \
-	((*(_ah)->ah_resetTsf)((_ah)))
-#define	ath_hal_rxena(_ah) \
-	((*(_ah)->ah_enableReceive)((_ah)))
-#define	ath_hal_puttxbuf(_ah, _q, _bufaddr) \
-	((*(_ah)->ah_setTxDP)((_ah), (_q), (_bufaddr)))
-#define	ath_hal_gettxbuf(_ah, _q) \
-	((*(_ah)->ah_getTxDP)((_ah), (_q)))
-#define	ath_hal_getrxbuf(_ah) \
-	((*(_ah)->ah_getRxDP)((_ah)))
-#define	ath_hal_txstart(_ah, _q) \
-	((*(_ah)->ah_startTxDma)((_ah), (_q)))
+#define	ath_hal_get_rate_table(_ah, _mode) \
+	((*(_ah)->ah_get_rate_table)((_ah), (_mode)))
+#define	ath_hal_get_lladdr(_ah, _mac) \
+	((*(_ah)->ah_get_lladdr)((_ah), (_mac)))
+#define	ath_hal_set_lladdr(_ah, _mac) \
+	((*(_ah)->ah_set_lladdr)((_ah), (_mac)))
+#define	ath_hal_set_intr(_ah, _mask) \
+	((*(_ah)->ah_set_intr)((_ah), (_mask)))
+#define	ath_hal_get_intr(_ah) \
+	((*(_ah)->ah_get_intr)((_ah)))
+#define	ath_hal_is_intr_pending(_ah) \
+	((*(_ah)->ah_is_intr_pending)((_ah)))
+#define	ath_hal_get_isr(_ah, _pmask) \
+	((*(_ah)->ah_get_isr)((_ah), (_pmask)))
+#define	ath_hal_update_tx_triglevel(_ah, _inc) \
+	((*(_ah)->ah_update_tx_triglevel)((_ah), (_inc)))
+#define	ath_hal_set_power(_ah, _mode, _sleepduration) \
+	((*(_ah)->ah_set_power)((_ah), (_mode), AH_TRUE, (_sleepduration)))
+#define	ath_hal_reset_key(_ah, _ix) \
+	((*(_ah)->ah_reset_key)((_ah), (_ix)))
+#define	ath_hal_set_key(_ah, _ix, _pk) \
+	((*(_ah)->ah_set_key)((_ah), (_ix), (_pk), NULL, AH_FALSE))
+#define	ath_hal_is_key_valid(_ah, _ix) \
+	(((*(_ah)->ah_is_key_valid)((_ah), (_ix))))
+#define	ath_hal_set_key_lladdr(_ah, _ix, _mac) \
+	((*(_ah)->ah_set_key_lladdr)((_ah), (_ix), (_mac)))
+#define	ath_hal_get_rx_filter(_ah) \
+	((*(_ah)->ah_get_rx_filter)((_ah)))
+#define	ath_hal_set_rx_filter(_ah, _filter) \
+	((*(_ah)->ah_set_rx_filter)((_ah), (_filter)))
+#define	ath_hal_set_mcast_filter(_ah, _mfilt0, _mfilt1) \
+	((*(_ah)->ah_set_mcast_filter)((_ah), (_mfilt0), (_mfilt1)))
+#define	ath_hal_wait_for_beacon(_ah, _bf) \
+	((*(_ah)->ah_wait_for_beacon)((_ah), (_bf)->bf_daddr))
+#define	ath_hal_put_rx_buf(_ah, _bufaddr) \
+	((*(_ah)->ah_put_rx_buf)((_ah), (_bufaddr)))
+#define	ath_hal_get_tsf32(_ah) \
+	((*(_ah)->ah_get_tsf32)((_ah)))
+#define	ath_hal_get_tsf64(_ah) \
+	((*(_ah)->ah_get_tsf64)((_ah)))
+#define	ath_hal_reset_tsf(_ah) \
+	((*(_ah)->ah_reset_tsf)((_ah)))
+#define	ath_hal_start_rx(_ah) \
+	((*(_ah)->ah_start_rx)((_ah)))
+#define	ath_hal_put_tx_buf(_ah, _q, _bufaddr) \
+	((*(_ah)->ah_put_tx_buf)((_ah), (_q), (_bufaddr)))
+#define	ath_hal_get_tx_buf(_ah, _q) \
+	((*(_ah)->ah_get_tx_buf)((_ah), (_q)))
+#define	ath_hal_get_rx_buf(_ah) \
+	((*(_ah)->ah_get_rx_buf)((_ah)))
+#define	ath_hal_tx_start(_ah, _q) \
+	((*(_ah)->ah_tx_start)((_ah), (_q)))
 #define	ath_hal_setchannel(_ah, _chan) \
-	((*(_ah)->ah_setChannel)((_ah), (_chan)))
+	((*(_ah)->ah_setchannel)((_ah), (_chan)))
 #define	ath_hal_calibrate(_ah, _chan) \
-	((*(_ah)->ah_perCalibration)((_ah), (_chan)))
-#define	ath_hal_setledstate(_ah, _state) \
-	((*(_ah)->ah_setLedState)((_ah), (_state)))
-#define	ath_hal_beaconinit(_ah, _nextb, _bperiod) \
-	((*(_ah)->ah_beaconInit)((_ah), (_nextb), (_bperiod)))
-#define	ath_hal_beaconreset(_ah) \
-	((*(_ah)->ah_resetStationBeaconTimers)((_ah)))
-#define	ath_hal_beacontimers(_ah, _bs, _tsf, _dc, _cc) \
-	((*(_ah)->ah_setStationBeaconTimers)((_ah), (_bs), (_tsf), \
+	((*(_ah)->ah_calibrate)((_ah), (_chan)))
+#define	ath_hal_set_ledstate(_ah, _state) \
+	((*(_ah)->ah_set_ledstate)((_ah), (_state)))
+#define	ath_hal_init_beacon(_ah, _nextb, _bperiod) \
+	((*(_ah)->ah_init_beacon)((_ah), (_nextb), (_bperiod)))
+#define	ath_hal_reset_beacon(_ah) \
+	((*(_ah)->ah_reset_beacon)((_ah)))
+#define	ath_hal_set_beacon_timers(_ah, _bs, _tsf, _dc, _cc) \
+	((*(_ah)->ah_set_beacon_timers)((_ah), (_bs), (_tsf), \
 	 (_dc), (_cc)))
-#define	ath_hal_setassocid(_ah, _bss, _associd) \
-	((*(_ah)->ah_writeAssocid)((_ah), (_bss), (_associd), 0))
-#define	ath_hal_getregdomain(_ah, _prd) \
-	(*(_prd) = (_ah)->ah_getRegDomain(_ah))
+#define	ath_hal_set_associd(_ah, _bss, _associd) \
+	((*(_ah)->ah_set_associd)((_ah), (_bss), (_associd), 0))
+#define	ath_hal_get_regdomain(_ah, _prd) \
+	(*(_prd) = (_ah)->ah_get_regdomain(_ah))
 #define	ath_hal_getcountrycode(_ah, _pcc) \
-	(*(_pcc) = (_ah)->ah_countryCode)
+	(*(_pcc) = (_ah)->ah_getcountrycode)
 #define	ath_hal_detach(_ah) \
 	((*(_ah)->ah_detach)(_ah))
 
-#define ath_hal_gpiocfgoutput(_ah, _gpio) \
-	((*(_ah)->ah_gpioCfgOutput)((_ah), (_gpio)))
-#define ath_hal_gpiocfginput(_ah, _gpio) \
-	((*(_ah)->ah_gpioCfgInput)((_ah), (_gpio)))
-#define ath_hal_gpioget(_ah, _gpio) \
-	((*(_ah)->ah_gpioGet)((_ah), (_gpio)))
-#define ath_hal_gpioset(_ah, _gpio, _b) \
-	((*(_ah)->ah_gpioSet)((_ah), (_gpio), (_b)))
-#define ath_hal_gpiosetintr(_ah, _gpio, _b) \
-	((*(_ah)->ah_gpioSetIntr)((_ah), (_gpio), (_b)))
-
-#define	ath_hal_setopmode(_ah) \
-	((*(_ah)->ah_setPCUConfig)((_ah)))
-#define	ath_hal_stoptxdma(_ah, _qnum) \
-	((*(_ah)->ah_stopTxDma)((_ah), (_qnum)))
-#define	ath_hal_stoppcurecv(_ah) \
-	((*(_ah)->ah_stopPcuReceive)((_ah)))
-#define	ath_hal_startpcurecv(_ah) \
-	((*(_ah)->ah_startPcuReceive)((_ah)))
-#define	ath_hal_stopdmarecv(_ah) \
-	((*(_ah)->ah_stopDmaReceive)((_ah)))
-#define	ath_hal_getdiagstate(_ah, _id, _indata, _insize, _outdata, _outsize) \
-	((*(_ah)->ah_getDiagState)((_ah), (_id), \
+#define ath_hal_set_gpio_output(_ah, _gpio) \
+	((*(_ah)->ah_set_gpio_output)((_ah), (_gpio)))
+#define ath_hal_set_gpio_input(_ah, _gpio) \
+	((*(_ah)->ah_set_gpio_input)((_ah), (_gpio)))
+#define ath_hal_get_gpio(_ah, _gpio) \
+	((*(_ah)->ah_get_gpio)((_ah), (_gpio)))
+#define ath_hal_set_gpio(_ah, _gpio, _b) \
+	((*(_ah)->ah_set_gpio)((_ah), (_gpio), (_b)))
+#define ath_hal_set_gpio_intr(_ah, _gpio, _b) \
+	((*(_ah)->ah_set_gpio_intr)((_ah), (_gpio), (_b)))
+
+#define	ath_hal_set_opmode(_ah) \
+	((*(_ah)->ah_set_opmode)((_ah)))
+#define	ath_hal_stop_tx_dma(_ah, _qnum) \
+	((*(_ah)->ah_stop_tx_dma)((_ah), (_qnum)))
+#define	ath_hal_stop_pcu_recv(_ah) \
+	((*(_ah)->ah_stop_pcu_recv)((_ah)))
+#define	ath_hal_start_rx_pcu(_ah) \
+	((*(_ah)->ah_start_rx_pcu)((_ah)))
+#define	ath_hal_stop_rx_dma(_ah) \
+	((*(_ah)->ah_stop_rx_dma)((_ah)))
+#define	ath_hal_get_diag_state(_ah, _id, _indata, _insize, _outdata, _outsize) \
+	((*(_ah)->ah_get_diag_state)((_ah), (_id), \
 	 (_indata), (_insize), (_outdata), (_outsize)))
 
-#define	ath_hal_setuptxqueue(_ah, _type, _qinfo) \
-	((*(_ah)->ah_setupTxQueue)((_ah), (_type), (_qinfo)))
-#define	ath_hal_resettxqueue(_ah, _q) \
-	((*(_ah)->ah_resetTxQueue)((_ah), (_q)))
-#define	ath_hal_releasetxqueue(_ah, _q) \
-	((*(_ah)->ah_releaseTxQueue)((_ah), (_q)))
-#define	ath_hal_hasveol(_ah) \
-	((*(_ah)->ah_hasVEOL)((_ah)))
-#define	ath_hal_getrfgain(_ah) \
-	((*(_ah)->ah_getRfGain)((_ah)))
-#define	ath_hal_rxmonitor(_ah) \
-	((*(_ah)->ah_rxMonitor)((_ah)))
-
-#define	ath_hal_setuprxdesc(_ah, _ds, _size, _intreq) \
-	((*(_ah)->ah_setupRxDesc)((_ah), (_ds), (_size), (_intreq)))
-#define	ath_hal_rxprocdesc(_ah, _ds, _dspa, _dsnext) \
-	((*(_ah)->ah_procRxDesc)((_ah), (_ds), (_dspa), (_dsnext)))
-#define	ath_hal_setuptxdesc(_ah, _ds, _plen, _hlen, _atype, _txpow, \
+#define	ath_hal_setup_tx_queue(_ah, _type, _qinfo) \
+	((*(_ah)->ah_setup_tx_queue)((_ah), (_type), (_qinfo)))
+#define	ath_hal_reset_tx_queue(_ah, _q) \
+	((*(_ah)->ah_reset_tx_queue)((_ah), (_q)))
+#define	ath_hal_release_tx_queue(_ah, _q) \
+	((*(_ah)->ah_release_tx_queue)((_ah), (_q)))
+#define	ath_hal_has_veol(_ah) \
+	((*(_ah)->ah_has_veol)((_ah)))
+#define	ath_hal_get_rf_gain(_ah) \
+	((*(_ah)->ah_get_rf_gain)((_ah)))
+#define	ath_hal_set_rx_monitor(_ah) \
+	((*(_ah)->ah_set_rx_monitor)((_ah)))
+
+#define	ath_hal_setup_rx_desc(_ah, _ds, _size, _intreq) \
+	((*(_ah)->ah_setup_rx_desc)((_ah), (_ds), (_size), (_intreq)))
+#define	ath_hal_proc_rx_desc(_ah, _ds, _dspa, _dsnext) \
+	((*(_ah)->ah_proc_rx_desc)((_ah), (_ds), (_dspa), (_dsnext)))
+#define	ath_hal_setup_tx_desc(_ah, _ds, _plen, _hlen, _atype, _txpow, \
 	    _txr0, _txtr0, _keyix, _ant, _flags, \
 	    _rtsrate, _rtsdura) \
-	((*(_ah)->ah_setupTxDesc)((_ah), (_ds), (_plen), (_hlen), (_atype), \
+	((*(_ah)->ah_setup_tx_desc)((_ah), (_ds), (_plen), (_hlen), (_atype), \
 	    (_txpow), (_txr0), (_txtr0), (_keyix), (_ant), \
 	    (_flags), (_rtsrate), (_rtsdura)))
-#define	ath_hal_setupxtxdesc(_ah, _ds, \
+#define	ath_hal_setup_xtx_desc(_ah, _ds, \
 	    _txr1, _txtr1, _txr2, _txtr2, _txr3, _txtr3) \
-	((*(_ah)->ah_setupXTxDesc)((_ah), (_ds), \
+	((*(_ah)->ah_setup_xtx_desc)((_ah), (_ds), \
 	    (_txr1), (_txtr1), (_txr2), (_txtr2), (_txr3), (_txtr3)))
-#define	ath_hal_filltxdesc(_ah, _ds, _l, _first, _last) \
-	((*(_ah)->ah_fillTxDesc)((_ah), (_ds), (_l), (_first), (_last)))
-#define	ath_hal_txprocdesc(_ah, _ds) \
-	((*(_ah)->ah_procTxDesc)((_ah), (_ds)))
+#define	ath_hal_fill_tx_desc(_ah, _ds, _l, _first, _last) \
+	((*(_ah)->ah_fill_tx_desc)((_ah), (_ds), (_l), (_first), (_last)))
+#define	ath_hal_proc_tx_desc(_ah, _ds) \
+	((*(_ah)->ah_proc_tx_desc)((_ah), (_ds)))
 
 #endif /* _DEV_ATH_ATHVAR_H */