ehci support; hacked into working shape by jonathon@gateway.zenbu.net

9 files changed, 3618 insertions, 3 deletions

diff --git a/sys/dev/pci/ehci_pci.c b/sys/dev/pci/ehci_pci.c
new file mode 100644
index 00000000000..560e91bb960
--- /dev/null
+++ b/sys/dev/pci/ehci_pci.c
@@ -0,0 +1,230 @@
+/*	$NetBSD: ehci_pci.c,v 1.15 2004/04/23 21:13:06 itojun Exp $	*/
+
+/*
+ * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Lennart Augustsson (lennart@augustsson.net).
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *        This product includes software developed by the NetBSD
+ *        Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+#if defined(__NetBSD__)
+__KERNEL_RCSID(0, "$NetBSD: ehci_pci.c,v 1.15 2004/04/23 21:13:06 itojun Exp $");
+#endif
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/device.h>
+#include <sys/proc.h>
+#include <sys/queue.h>
+
+#include <machine/bus.h>
+
+#include <dev/pci/pcivar.h>
+#include <dev/pci/usb_pci.h>
+
+#include <dev/usb/usb.h>
+#include <dev/usb/usbdi.h>
+#include <dev/usb/usbdivar.h>
+#include <dev/usb/usb_mem.h>
+
+#include <dev/usb/ehcireg.h>
+#include <dev/usb/ehcivar.h>
+
+#ifdef EHCI_DEBUG
+#define DPRINTF(x)	if (ehcidebug) printf x
+extern int ehcidebug;
+#else
+#define DPRINTF(x)
+#endif
+
+int	ehci_pci_match(struct device *, void *, void *);
+void	ehci_pci_attach(struct device *, struct device *, void *);
+int	ehci_pci_detach(device_ptr_t, int);
+
+struct ehci_pci_softc {
+	ehci_softc_t		sc;
+	pci_chipset_tag_t	sc_pc;
+	pcitag_t		sc_tag;
+	void 			*sc_ih;		/* interrupt vectoring */
+};
+
+struct cfattach ehci_pci_ca = {
+	sizeof(struct ehci_pci_softc), ehci_pci_match, ehci_pci_attach,
+	ehci_pci_detach, ehci_activate
+};
+
+
+int
+ehci_pci_match(struct device *parent, void *match, void *aux)
+{
+	struct pci_attach_args *pa = (struct pci_attach_args *) aux;
+
+	if (PCI_CLASS(pa->pa_class) == PCI_CLASS_SERIALBUS &&
+	    PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_SERIALBUS_USB &&
+	    PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_EHCI)
+		return (1);
+ 
+	return (0);
+}
+
+void
+ehci_pci_attach(struct device *parent, struct device *self, void *aux)
+{
+	struct ehci_pci_softc *sc = (struct ehci_pci_softc *)self;
+	struct pci_attach_args *pa = (struct pci_attach_args *)aux;
+	pci_chipset_tag_t pc = pa->pa_pc;
+	pcitag_t tag = pa->pa_tag;
+	char const *intrstr;
+	pci_intr_handle_t ih;
+	pcireg_t csr;
+	const char *vendor;
+	char *devname = sc->sc.sc_bus.bdev.dv_xname;
+	char devinfo[256];
+	usbd_status r;
+	int ncomp;
+	struct usb_pci *up;
+
+	pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
+#if defined(__NetBSD__)
+	printf(": %s (rev. 0x%02x)\n", devinfo,
+	    PCI_REVISION(pa->pa_class));
+#endif
+
+	/* Map I/O registers */
+	if (pci_mapreg_map(pa, PCI_CBMEM, PCI_MAPREG_TYPE_MEM, 0,
+			   &sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size, 0)) {
+		printf(": can't map memory space\n");
+		return;
+	}
+
+	sc->sc_pc = pc;
+	sc->sc_tag = tag;
+	sc->sc.sc_bus.dmatag = pa->pa_dmat;
+
+	/* Enable the device. */
+	csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
+	pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG,
+		       csr | PCI_COMMAND_MASTER_ENABLE);
+
+	/* Disable interrupts, so we don't get any spurious ones. */
+	sc->sc.sc_offs = EREAD1(&sc->sc, EHCI_CAPLENGTH);
+	DPRINTF(("%s: offs=%d\n", devname, sc->sc.sc_offs));
+	EOWRITE2(&sc->sc, EHCI_USBINTR, 0);
+
+	/* Map and establish the interrupt. */
+	if (pci_intr_map(pa, &ih)) {
+		printf(": couldn't map interrupt\n");
+		return;
+	}
+	intrstr = pci_intr_string(pc, ih);
+	sc->sc_ih = pci_intr_establish(pc, ih, IPL_USB, ehci_intr, sc, devname);
+	if (sc->sc_ih == NULL) {
+		printf(": couldn't establish interrupt");
+		if (intrstr != NULL)
+			printf(" at %s", intrstr);
+		printf("\n");
+		return;
+	}
+	printf(": %s\n", intrstr);
+
+	switch(pci_conf_read(pc, tag, PCI_USBREV) & PCI_USBREV_MASK) {
+	case PCI_USBREV_PRE_1_0:
+	case PCI_USBREV_1_0:
+	case PCI_USBREV_1_1:
+		sc->sc.sc_bus.usbrev = USBREV_UNKNOWN;
+		printf("%s: pre-2.0 USB rev\n", devname);
+		return;
+	case PCI_USBREV_2_0:
+		sc->sc.sc_bus.usbrev = USBREV_2_0;
+		break;
+	default:
+		sc->sc.sc_bus.usbrev = USBREV_UNKNOWN;
+		break;
+	}
+
+	/* Figure out vendor for root hub descriptor. */
+	vendor = pci_findvendor(pa->pa_id);
+	sc->sc.sc_id_vendor = PCI_VENDOR(pa->pa_id);
+	if (vendor)
+		strlcpy(sc->sc.sc_vendor, vendor, sizeof(sc->sc.sc_vendor));
+	else
+		snprintf(sc->sc.sc_vendor, sizeof(sc->sc.sc_vendor),
+		    "vendor 0x%04x", PCI_VENDOR(pa->pa_id));
+	
+	/*
+	 * Find companion controllers.  According to the spec they always
+	 * have lower function numbers so they should be enumerated already.
+	 */
+	ncomp = 0;
+	TAILQ_FOREACH(up, &ehci_pci_alldevs, next) {
+		if (up->bus == pa->pa_bus && up->device == pa->pa_device) {
+			DPRINTF(("ehci_pci_attach: companion %s\n",
+				 USBDEVNAME(up->usb->bdev)));
+			sc->sc.sc_comps[ncomp++] = up->usb;
+			if (ncomp >= EHCI_COMPANION_MAX)
+				break;
+		}
+	}
+	sc->sc.sc_ncomp = ncomp;
+
+	r = ehci_init(&sc->sc);
+	if (r != USBD_NORMAL_COMPLETION) {
+		printf("%s: init failed, error=%d\n", devname, r);
+		return;
+	}
+
+	/* Attach usb device. */
+	sc->sc.sc_child = config_found((void *)sc, &sc->sc.sc_bus,
+				       usbctlprint);
+}
+
+int
+ehci_pci_detach(device_ptr_t self, int flags)
+{
+	struct ehci_pci_softc *sc = (struct ehci_pci_softc *)self;
+	int rv;
+
+	rv = ehci_detach(&sc->sc, flags);
+	if (rv)
+		return (rv);
+	if (sc->sc_ih != NULL) {
+		pci_intr_disestablish(sc->sc_pc, sc->sc_ih);
+		sc->sc_ih = NULL;
+	}
+	if (sc->sc.sc_size) {
+		bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
+		sc->sc.sc_size = 0;
+	}
+	return (0);
+}
diff --git a/sys/dev/pci/files.pci b/sys/dev/pci/files.pci
index 5692046ba5a..0cf269ee639 100644
--- a/sys/dev/pci/files.pci
+++ b/sys/dev/pci/files.pci
@@ -1,4 +1,4 @@
-#	$OpenBSD: files.pci,v 1.152 2004/05/20 03:05:29 marco Exp $
+#	$OpenBSD: files.pci,v 1.153 2004/05/23 03:23:00 deraadt Exp $
 #	$NetBSD: files.pci,v 1.20 1996/09/24 17:47:15 christos Exp $
 #
 # Config file and device description for machine-independent PCI code.
@@ -382,6 +382,11 @@ file	dev/pci/uhci_pci.c		uhci
 attach	ohci at pci with ohci_pci
 file	dev/pci/ohci_pci.c		ohci
 
+# EHCI USB controller
+attach	ehci at pci with ehci_pci
+file	dev/pci/ehci_pci.c		ehci
+file	dev/pci/usb_pci.c		ehci | uhci | ohci
+
 # YENTA PCI-CardBus bridge
 #device	cbb: cbbus, pcmciabus
 device	cbb: pcmciaslot
diff --git a/sys/dev/pci/ohci_pci.c b/sys/dev/pci/ohci_pci.c
index adc8183295f..13a48f002c9 100644
--- a/sys/dev/pci/ohci_pci.c
+++ b/sys/dev/pci/ohci_pci.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ohci_pci.c,v 1.19 2003/08/11 02:21:28 mickey Exp $	*/
+/*	$OpenBSD: ohci_pci.c,v 1.20 2004/05/23 03:23:00 deraadt Exp $	*/
 /*	$NetBSD: ohci_pci.c,v 1.23 2002/10/02 16:51:47 thorpej Exp $	*/
 
 /*
@@ -55,6 +55,7 @@
 #include <machine/bus.h>
 
 #include <dev/pci/pcivar.h>
+#include <dev/pci/usb_pci.h>
 
 #include <dev/usb/usb.h>
 #include <dev/usb/usbdi.h>
@@ -70,6 +71,7 @@ int	ohci_pci_detach(device_ptr_t, int);
 
 struct ohci_pci_softc {
 	ohci_softc_t		sc;
+	struct usb_pci		sc_pci;
 	pci_chipset_tag_t	sc_pc;
 	void 			*sc_ih;		/* interrupt vectoring */
 };
@@ -176,6 +178,8 @@ ohci_pci_attach(struct device *parent, struct device *self, void *aux)
 	}
 	splx(s);
 
+	usb_pci_add(&sc->sc_pci, pa, &sc->sc.sc_bus);
+
 	/* Attach usb device. */
 	sc->sc.sc_child = config_found((void *)sc, &sc->sc.sc_bus,
 				       usbctlprint);
@@ -198,5 +202,6 @@ ohci_pci_detach(device_ptr_t self, int flags)
 		bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
 		sc->sc.sc_size = 0;
 	}
+	usb_pci_rem(&sc->sc_pci);
 	return (0);
 }
diff --git a/sys/dev/pci/uhci_pci.c b/sys/dev/pci/uhci_pci.c
index 6b1a6f070ad..fe7b9ee38d4 100644
--- a/sys/dev/pci/uhci_pci.c
+++ b/sys/dev/pci/uhci_pci.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: uhci_pci.c,v 1.15 2003/08/11 02:21:28 mickey Exp $	*/
+/*	$OpenBSD: uhci_pci.c,v 1.16 2004/05/23 03:23:00 deraadt Exp $	*/
 /*	$NetBSD: uhci_pci.c,v 1.24 2002/10/02 16:51:58 thorpej Exp $	*/
 
 /*
@@ -48,6 +48,7 @@
 #include <machine/bus.h>
 
 #include <dev/pci/pcivar.h>
+#include <dev/pci/usb_pci.h>
 
 #include <dev/usb/usb.h>
 #include <dev/usb/usbdi.h>
@@ -63,6 +64,7 @@ int	uhci_pci_detach(device_ptr_t, int);
 
 struct uhci_pci_softc {
 	uhci_softc_t		sc;
+	struct usb_pci		sc_pci;
 	pci_chipset_tag_t	sc_pc;
 	pcitag_t		sc_tag;
 	void 			*sc_ih;		/* interrupt vectoring */
@@ -183,6 +185,7 @@ uhci_pci_attach(struct device *parent, struct device *self, void *aux)
 		return;
 	}
 
+	usb_pci_add(&sc->sc_pci, pa, &sc->sc.sc_bus);
 	/* Attach usb device. */
 	sc->sc.sc_child = config_found((void *)sc, &sc->sc.sc_bus,
 				       usbctlprint);
@@ -205,6 +208,7 @@ uhci_pci_detach(device_ptr_t self, int flags)
 		bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
 		sc->sc.sc_size = 0;
 	}
+	usb_pci_rem(&sc->sc_pci);
 
 	return (0);
 }
diff --git a/sys/dev/pci/usb_pci.c b/sys/dev/pci/usb_pci.c
new file mode 100644
index 00000000000..c8fc9cdd638
--- /dev/null
+++ b/sys/dev/pci/usb_pci.c
@@ -0,0 +1,80 @@
+/*	$NetBSD: usb_pci.c,v 1.3 2002/02/14 21:58:30 augustss Exp $	*/
+
+/*
+ * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Lennart Augustsson (lennart@augustsson.net).
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *        This product includes software developed by the NetBSD
+ *        Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+#if defined(__NetBSD__)
+__KERNEL_RCSID(0, "$NetBSD: usb_pci.c,v 1.3 2002/02/14 21:58:30 augustss Exp $");
+#endif
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/device.h>
+#include <sys/proc.h>
+#include <sys/queue.h>
+
+#include <machine/bus.h>
+
+#include <dev/pci/pcivar.h>
+#include <dev/pci/usb_pci.h>
+
+#include <dev/usb/usb.h>
+#include <dev/usb/usbdi.h>
+#include <dev/usb/usbdivar.h>
+
+#include <dev/usb/ehcireg.h>
+#include <dev/usb/ehcivar.h>
+
+struct usb_pci_alldevs ehci_pci_alldevs =
+	TAILQ_HEAD_INITIALIZER(ehci_pci_alldevs);
+
+void
+usb_pci_add(struct usb_pci *up, struct pci_attach_args *pa, struct usbd_bus *bu)
+{
+	TAILQ_INSERT_TAIL(&ehci_pci_alldevs, up, next);
+	up->bus = pa->pa_bus;
+	up->device = pa->pa_device;
+	up->function = pa->pa_function;
+	up->usb = bu;
+}
+
+void
+usb_pci_rem(struct usb_pci *up)
+{
+	TAILQ_REMOVE(&ehci_pci_alldevs, up, next);
+}
diff --git a/sys/dev/pci/usb_pci.h b/sys/dev/pci/usb_pci.h
new file mode 100644
index 00000000000..99a5fd91dff
--- /dev/null
+++ b/sys/dev/pci/usb_pci.h
@@ -0,0 +1,57 @@
+/*	$NetBSD: usb_pci.h,v 1.3 2002/02/14 21:58:30 augustss Exp $	*/
+
+/*
+ * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Lennart Augustsson (lennart@augustsson.net) at
+ * Carlstedt Research & Technology.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *        This product includes software developed by the NetBSD
+ *        Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * EHCI controllers need a way to find their compainion controllers
+ * so we keep track of them as we attach.
+ */
+
+struct usb_pci {
+	TAILQ_ENTRY(usb_pci) next;
+	u_int		bus;
+	u_int		device;
+	u_int		function;
+	struct usbd_bus *usb;
+};
+
+TAILQ_HEAD(usb_pci_alldevs, usb_pci);
+extern struct usb_pci_alldevs ehci_pci_alldevs;
+
+void usb_pci_add(struct usb_pci *, struct pci_attach_args *, struct usbd_bus *);
+void usb_pci_rem(struct usb_pci *);
diff --git a/sys/dev/usb/ehci.c b/sys/dev/usb/ehci.c
new file mode 100644
index 00000000000..15c6da5a6cd
--- /dev/null
+++ b/sys/dev/usb/ehci.c
@@ -0,0 +1,2809 @@
+/*	$NetBSD: ehci.c,v 1.54 2004/01/17 13:15:05 jdolecek Exp $	*/
+
+/*
+ * Copyright (c) 2001 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Lennart Augustsson (lennart@augustsson.net).
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *        This product includes software developed by the NetBSD
+ *        Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
+ *
+ * The EHCI 1.0 spec can be found at
+ * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
+ * and the USB 2.0 spec at
+ * http://www.usb.org/developers/docs/usb_20.zip
+ *
+ */
+
+/*
+ * TODO:
+ * 1) hold off explorations by companion controllers until ehci has started.
+ *
+ * 2) The EHCI driver lacks support for interrupt isochronous transfers, so
+ *    devices using them don't work.
+ *    Interrupt transfers are not difficult, it's just not done. 
+ *
+ * 3) There might also be some issues with the data toggle, it was not
+ *    completely tested to work properly under all condistions. If wrong
+ *    toggle would be sent/recvd, bulk data transfers would stop working.
+ *
+ * 4) The meaty part to implement is the support for USB 2.0 hubs.
+ *    They are quite compolicated since the need to be able to do
+ *    "transaction translation", i.e., converting to/from USB 2 and USB 1.
+ *    So the hub driver needs to handle and schedule these things, to
+ *    assign place in frame where different devices get to go. See chapter
+ *    on hubs in USB 2.0 for details. 
+ *
+ * 5) command failures are not recovered correctly
+*/
+
+#include <sys/cdefs.h>
+#if defined(__NetBSD__)
+__KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.54 2004/01/17 13:15:05 jdolecek Exp $");
+#endif
+
+#include "ohci.h"
+#include "uhci.h"
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/malloc.h>
+#include <sys/device.h>
+#include <sys/select.h>
+#include <sys/proc.h>
+#include <sys/queue.h>
+
+#include <machine/bus.h>
+#include <machine/endian.h>
+
+#include <dev/usb/usb.h>
+#include <dev/usb/usbdi.h>
+#include <dev/usb/usbdivar.h>
+#include <dev/usb/usb_mem.h>
+#include <dev/usb/usb_quirks.h>
+
+#include <dev/usb/ehcireg.h>
+#include <dev/usb/ehcivar.h>
+
+#if defined(__OpenBSD__)
+struct cfdriver ehci_cd = {
+        NULL, "ehci", DV_DULL
+};
+#endif
+
+#ifdef EHCI_DEBUG
+#define DPRINTF(x)	if (ehcidebug) printf x
+#define DPRINTFN(n,x)	if (ehcidebug>(n)) printf x
+int ehcidebug = 0;
+#ifndef __NetBSD__
+#define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
+#endif
+#else
+#define DPRINTF(x)
+#define DPRINTFN(n,x)
+#endif
+
+struct ehci_pipe {
+	struct usbd_pipe pipe;
+	ehci_soft_qh_t *sqh;
+	union {
+		ehci_soft_qtd_t *qtd;
+		/* ehci_soft_itd_t *itd; */
+	} tail;
+	union {
+		/* Control pipe */
+		struct {
+			usb_dma_t reqdma;
+			u_int length;
+			/*ehci_soft_qtd_t *setup, *data, *stat;*/
+		} ctl;
+		/* Interrupt pipe */
+		/* XXX */
+		/* Bulk pipe */
+		struct {
+			u_int length;
+		} bulk;
+		/* Iso pipe */
+		/* XXX */
+	} u;
+};
+
+Static void		ehci_shutdown(void *);
+Static void		ehci_power(int, void *);
+
+Static usbd_status	ehci_open(usbd_pipe_handle);
+Static void		ehci_poll(struct usbd_bus *);
+Static void		ehci_softintr(void *);
+Static int		ehci_intr1(ehci_softc_t *);
+Static void		ehci_waitintr(ehci_softc_t *, usbd_xfer_handle);
+Static void		ehci_check_intr(ehci_softc_t *, struct ehci_xfer *);
+Static void		ehci_idone(struct ehci_xfer *);
+Static void		ehci_timeout(void *);
+Static void		ehci_timeout_task(void *);
+
+Static usbd_status	ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
+Static void		ehci_freem(struct usbd_bus *, usb_dma_t *);
+
+Static usbd_xfer_handle	ehci_allocx(struct usbd_bus *);
+Static void		ehci_freex(struct usbd_bus *, usbd_xfer_handle);
+
+Static usbd_status	ehci_root_ctrl_transfer(usbd_xfer_handle);
+Static usbd_status	ehci_root_ctrl_start(usbd_xfer_handle);
+Static void		ehci_root_ctrl_abort(usbd_xfer_handle);
+Static void		ehci_root_ctrl_close(usbd_pipe_handle);
+Static void		ehci_root_ctrl_done(usbd_xfer_handle);
+
+Static usbd_status	ehci_root_intr_transfer(usbd_xfer_handle);
+Static usbd_status	ehci_root_intr_start(usbd_xfer_handle);
+Static void		ehci_root_intr_abort(usbd_xfer_handle);
+Static void		ehci_root_intr_close(usbd_pipe_handle);
+Static void		ehci_root_intr_done(usbd_xfer_handle);
+
+Static usbd_status	ehci_device_ctrl_transfer(usbd_xfer_handle);
+Static usbd_status	ehci_device_ctrl_start(usbd_xfer_handle);
+Static void		ehci_device_ctrl_abort(usbd_xfer_handle);
+Static void		ehci_device_ctrl_close(usbd_pipe_handle);
+Static void		ehci_device_ctrl_done(usbd_xfer_handle);
+
+Static usbd_status	ehci_device_bulk_transfer(usbd_xfer_handle);
+Static usbd_status	ehci_device_bulk_start(usbd_xfer_handle);
+Static void		ehci_device_bulk_abort(usbd_xfer_handle);
+Static void		ehci_device_bulk_close(usbd_pipe_handle);
+Static void		ehci_device_bulk_done(usbd_xfer_handle);
+
+Static usbd_status	ehci_device_intr_transfer(usbd_xfer_handle);
+Static usbd_status	ehci_device_intr_start(usbd_xfer_handle);
+Static void		ehci_device_intr_abort(usbd_xfer_handle);
+Static void		ehci_device_intr_close(usbd_pipe_handle);
+Static void		ehci_device_intr_done(usbd_xfer_handle);
+
+Static usbd_status	ehci_device_isoc_transfer(usbd_xfer_handle);
+Static usbd_status	ehci_device_isoc_start(usbd_xfer_handle);
+Static void		ehci_device_isoc_abort(usbd_xfer_handle);
+Static void		ehci_device_isoc_close(usbd_pipe_handle);
+Static void		ehci_device_isoc_done(usbd_xfer_handle);
+
+Static void		ehci_device_clear_toggle(usbd_pipe_handle pipe);
+Static void		ehci_noop(usbd_pipe_handle pipe);
+
+Static int		ehci_str(usb_string_descriptor_t *, int, char *);
+Static void		ehci_pcd(ehci_softc_t *, usbd_xfer_handle);
+Static void		ehci_pcd_able(ehci_softc_t *, int);
+Static void		ehci_pcd_enable(void *);
+Static void		ehci_disown(ehci_softc_t *, int, int);
+
+Static ehci_soft_qh_t  *ehci_alloc_sqh(ehci_softc_t *);
+Static void		ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *);
+
+Static ehci_soft_qtd_t  *ehci_alloc_sqtd(ehci_softc_t *);
+Static void		ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *);
+Static usbd_status	ehci_alloc_sqtd_chain(struct ehci_pipe *,
+			    ehci_softc_t *, int, int, usbd_xfer_handle,
+			    ehci_soft_qtd_t **, ehci_soft_qtd_t **);
+Static void		ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *,
+					    ehci_soft_qtd_t *);
+
+Static usbd_status	ehci_device_request(usbd_xfer_handle xfer);
+
+Static void		ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *);
+Static void		ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *,
+				    ehci_soft_qh_t *);
+Static void		ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *);
+Static void		ehci_sync_hc(ehci_softc_t *);
+
+Static void		ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *);
+Static void		ehci_abort_xfer(usbd_xfer_handle, usbd_status);
+
+#ifdef EHCI_DEBUG
+Static void		ehci_dump_regs(ehci_softc_t *);
+Static void		ehci_dump(void);
+Static ehci_softc_t 	*theehci;
+Static void		ehci_dump_link(ehci_link_t, int);
+Static void		ehci_dump_sqtds(ehci_soft_qtd_t *);
+Static void		ehci_dump_sqtd(ehci_soft_qtd_t *);
+Static void		ehci_dump_qtd(ehci_qtd_t *);
+Static void		ehci_dump_sqh(ehci_soft_qh_t *);
+#ifdef DIAGNOSTIC
+Static void		ehci_dump_exfer(struct ehci_xfer *);
+#endif
+#endif
+
+#define EHCI_NULL htole32(EHCI_LINK_TERMINATE)
+
+#define EHCI_INTR_ENDPT 1
+
+#define ehci_add_intr_list(sc, ex) \
+	LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext);
+#define ehci_del_intr_list(ex) \
+	do { \
+		LIST_REMOVE((ex), inext); \
+		(ex)->inext.le_prev = NULL; \
+	} while (0)
+#define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL)
+
+Static struct usbd_bus_methods ehci_bus_methods = {
+	ehci_open,
+	ehci_softintr,
+	ehci_poll,
+	ehci_allocm,
+	ehci_freem,
+	ehci_allocx,
+	ehci_freex,
+};
+
+Static struct usbd_pipe_methods ehci_root_ctrl_methods = {
+	ehci_root_ctrl_transfer,
+	ehci_root_ctrl_start,
+	ehci_root_ctrl_abort,
+	ehci_root_ctrl_close,
+	ehci_noop,
+	ehci_root_ctrl_done,
+};
+
+Static struct usbd_pipe_methods ehci_root_intr_methods = {
+	ehci_root_intr_transfer,
+	ehci_root_intr_start,
+	ehci_root_intr_abort,
+	ehci_root_intr_close,
+	ehci_noop,
+	ehci_root_intr_done,
+};
+
+Static struct usbd_pipe_methods ehci_device_ctrl_methods = {
+	ehci_device_ctrl_transfer,
+	ehci_device_ctrl_start,
+	ehci_device_ctrl_abort,
+	ehci_device_ctrl_close,
+	ehci_noop,
+	ehci_device_ctrl_done,
+};
+
+Static struct usbd_pipe_methods ehci_device_intr_methods = {
+	ehci_device_intr_transfer,
+	ehci_device_intr_start,
+	ehci_device_intr_abort,
+	ehci_device_intr_close,
+	ehci_device_clear_toggle,
+	ehci_device_intr_done,
+};
+
+Static struct usbd_pipe_methods ehci_device_bulk_methods = {
+	ehci_device_bulk_transfer,
+	ehci_device_bulk_start,
+	ehci_device_bulk_abort,
+	ehci_device_bulk_close,
+	ehci_device_clear_toggle,
+	ehci_device_bulk_done,
+};
+
+Static struct usbd_pipe_methods ehci_device_isoc_methods = {
+	ehci_device_isoc_transfer,
+	ehci_device_isoc_start,
+	ehci_device_isoc_abort,
+	ehci_device_isoc_close,
+	ehci_noop,
+	ehci_device_isoc_done,
+};
+
+usbd_status
+ehci_init(ehci_softc_t *sc)
+{
+	u_int32_t version, sparams, cparams, hcr;
+	u_int i;
+	usbd_status err;
+	ehci_soft_qh_t *sqh;
+
+	DPRINTF(("ehci_init: start\n"));
+#ifdef EHCI_DEBUG
+	theehci = sc;
+#endif
+
+	sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
+
+	version = EREAD2(sc, EHCI_HCIVERSION);
+	printf("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev),
+	       version >> 8, version & 0xff);
+
+	sparams = EREAD4(sc, EHCI_HCSPARAMS);
+	DPRINTF(("ehci_init: sparams=0x%x\n", sparams));
+	sc->sc_npcomp = EHCI_HCS_N_PCC(sparams);
+	if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) {
+		printf("%s: wrong number of companions (%d != %d)\n",
+		       USBDEVNAME(sc->sc_bus.bdev),
+		       EHCI_HCS_N_CC(sparams), sc->sc_ncomp);
+#if NOHCI == 0 || NUHCI == 0
+		printf("%s: ohci or uhci probably not configured\n",
+			     USBDEVNAME(sc->sc_bus.bdev));
+#endif
+		return (USBD_IOERROR);
+	}
+	if (sc->sc_ncomp > 0) {
+		printf("%s: companion controller%s, %d port%s each:",
+		    USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "",
+		    EHCI_HCS_N_PCC(sparams),
+		    EHCI_HCS_N_PCC(sparams)!=1 ? "s" : "");
+		for (i = 0; i < sc->sc_ncomp; i++)
+			printf(" %s", USBDEVNAME(sc->sc_comps[i]->bdev));
+		printf("\n");
+	}
+	sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
+	cparams = EREAD4(sc, EHCI_HCCPARAMS);
+	DPRINTF(("ehci_init: cparams=0x%x\n", cparams));
+
+	if (EHCI_HCC_64BIT(cparams)) {
+		/* MUST clear segment register if 64 bit capable. */
+		EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
+	}
+
+	sc->sc_bus.usbrev = USBREV_2_0;
+
+	/* Reset the controller */
+	DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
+	EOWRITE4(sc, EHCI_USBCMD, 0);	/* Halt controller */
+	usb_delay_ms(&sc->sc_bus, 1);
+	EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
+	for (i = 0; i < 100; i++) {
+		usb_delay_ms(&sc->sc_bus, 1);
+		hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
+		if (!hcr)
+			break;
+	}
+	if (hcr) {
+		printf("%s: reset timeout\n",
+		    USBDEVNAME(sc->sc_bus.bdev));
+		return (USBD_IOERROR);
+	}
+
+	/* frame list size at default, read back what we got and use that */
+	switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) {
+	case 0: sc->sc_flsize = 1024*4; break;
+	case 1: sc->sc_flsize = 512*4; break;
+	case 2: sc->sc_flsize = 256*4; break;
+	case 3: return (USBD_IOERROR);
+	}
+	err = usb_allocmem(&sc->sc_bus, sc->sc_flsize,
+			   EHCI_FLALIGN_ALIGN, &sc->sc_fldma);
+	if (err)
+		return (err);
+	DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize));
+
+	/* Set up the bus struct. */
+	sc->sc_bus.methods = &ehci_bus_methods;
+	sc->sc_bus.pipe_size = sizeof(struct ehci_pipe);
+
+	sc->sc_powerhook = powerhook_establish(ehci_power, sc);
+	sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc);
+
+	sc->sc_eintrs = EHCI_NORMAL_INTRS;
+
+	/* Allocate dummy QH that starts the async list. */
+	sqh = ehci_alloc_sqh(sc);
+	if (sqh == NULL) {
+		err = USBD_NOMEM;
+		goto bad1;
+	}
+	/* Fill the QH */
+	sqh->qh.qh_endp =
+	    htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
+	sqh->qh.qh_link =
+	    htole32(sqh->physaddr | EHCI_LINK_QH);
+	sqh->qh.qh_curqtd = EHCI_NULL;
+	sqh->next = NULL;
+	/* Fill the overlay qTD */
+	sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
+	sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
+	sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
+	sqh->sqtd = NULL;
+#ifdef EHCI_DEBUG
+	if (ehcidebug) {
+		ehci_dump_sqh(sqh);
+	}
+#endif
+
+	/* Point to async list */
+	sc->sc_async_head = sqh;
+	EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH);
+
+	usb_callout_init(sc->sc_tmo_pcd);
+
+	lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0);
+
+	/* Enable interrupts */
+	EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
+
+	/* Turn on controller */
+	EOWRITE4(sc, EHCI_USBCMD,
+		 EHCI_CMD_ITC_8 | /* 8 microframes */
+		 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
+		 EHCI_CMD_ASE |
+		 /* EHCI_CMD_PSE | */
+		 EHCI_CMD_RS);
+
+	/* Take over port ownership */
+	EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
+
+	for (i = 0; i < 100; i++) {
+		usb_delay_ms(&sc->sc_bus, 1);
+		hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
+		if (!hcr)
+			break;
+	}
+	if (hcr) {
+		printf("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev));
+		return (USBD_IOERROR);
+	}
+
+	return (USBD_NORMAL_COMPLETION);
+
+#if 0
+ bad2:
+	ehci_free_sqh(sc, sc->sc_async_head);
+#endif
+ bad1:
+	usb_freemem(&sc->sc_bus, &sc->sc_fldma);
+	return (err);
+}
+
+int
+ehci_intr(void *v)
+{
+	ehci_softc_t *sc = v;
+
+	if (sc == NULL || sc->sc_dying)
+		return (0);
+
+	/* If we get an interrupt while polling, then just ignore it. */
+	if (sc->sc_bus.use_polling) {
+#ifdef DIAGNOSTIC
+		printf("ehci_intr: ignored interrupt while polling\n");
+#endif
+		return (0);
+	}
+
+	return (ehci_intr1(sc));
+}
+
+Static int
+ehci_intr1(ehci_softc_t *sc)
+{
+	u_int32_t intrs, eintrs;
+
+	DPRINTFN(20,("ehci_intr1: enter\n"));
+
+	/* In case the interrupt occurs before initialization has completed. */
+	if (sc == NULL) {
+#ifdef DIAGNOSTIC
+		printf("ehci_intr: sc == NULL\n");
+#endif
+		return (0);
+	}
+
+	intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
+
+	if (!intrs)
+		return (0);
+
+	EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
+	eintrs = intrs & sc->sc_eintrs;
+	DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
+		     sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS),
+		     (u_int)eintrs));
+	if (!eintrs)
+		return (0);
+
+	sc->sc_bus.intr_context++;
+	sc->sc_bus.no_intrs++;
+	if (eintrs & EHCI_STS_IAA) {
+		DPRINTF(("ehci_intr1: door bell\n"));
+		wakeup(&sc->sc_async_head);
+		eintrs &= ~EHCI_STS_IAA;
+	}
+	if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) {
+		DPRINTFN(5,("ehci_intr1: %s %s\n",
+			    eintrs & EHCI_STS_INT ? "INT" : "",
+			    eintrs & EHCI_STS_ERRINT ? "ERRINT" : ""));
+		usb_schedsoftintr(&sc->sc_bus);
+		eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT);
+	}
+	if (eintrs & EHCI_STS_HSE) {
+		printf("%s: unrecoverable error, controller halted\n",
+		       USBDEVNAME(sc->sc_bus.bdev));
+		/* XXX what else */
+	}
+	if (eintrs & EHCI_STS_PCD) {
+		ehci_pcd(sc, sc->sc_intrxfer);
+		/*
+		 * Disable PCD interrupt for now, because it will be
+		 * on until the port has been reset.
+		 */
+		ehci_pcd_able(sc, 0);
+		/* Do not allow RHSC interrupts > 1 per second */
+                usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc);
+		eintrs &= ~EHCI_STS_PCD;
+	}
+
+	sc->sc_bus.intr_context--;
+
+	if (eintrs != 0) {
+		/* Block unprocessed interrupts. */
+		sc->sc_eintrs &= ~eintrs;
+		EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
+		printf("%s: blocking intrs 0x%x\n",
+		       USBDEVNAME(sc->sc_bus.bdev), eintrs);
+	}
+
+	return (1);
+}
+
+void
+ehci_pcd_able(ehci_softc_t *sc, int on)
+{
+	DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on));
+	if (on)
+		sc->sc_eintrs |= EHCI_STS_PCD;
+	else
+		sc->sc_eintrs &= ~EHCI_STS_PCD;
+	EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
+}
+
+void
+ehci_pcd_enable(void *v_sc)
+{
+	ehci_softc_t *sc = v_sc;
+
+	ehci_pcd_able(sc, 1);
+}
+
+void
+ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer)
+{
+	usbd_pipe_handle pipe;
+	u_char *p;
+	int i, m;
+
+	if (xfer == NULL) {
+		/* Just ignore the change. */
+		return;
+	}
+
+	pipe = xfer->pipe;
+
+	p = KERNADDR(&xfer->dmabuf, 0);
+	m = min(sc->sc_noport, xfer->length * 8 - 1);
+	memset(p, 0, xfer->length);
+	for (i = 1; i <= m; i++) {
+		/* Pick out CHANGE bits from the status reg. */
+		if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR)
+			p[i/8] |= 1 << (i%8);
+	}
+	DPRINTF(("ehci_pcd: change=0x%02x\n", *p));
+	xfer->actlen = xfer->length;
+	xfer->status = USBD_NORMAL_COMPLETION;
+
+	usb_transfer_complete(xfer);
+}
+
+void
+ehci_softintr(void *v)
+{
+	ehci_softc_t *sc = v;
+	struct ehci_xfer *ex, *nextex;
+
+	DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev),
+		     sc->sc_bus.intr_context));
+
+	sc->sc_bus.intr_context++;
+
+	/*
+	 * The only explanation I can think of for why EHCI is as brain dead
+	 * as UHCI interrupt-wise is that Intel was involved in both.
+	 * An interrupt just tells us that something is done, we have no
+	 * clue what, so we need to scan through all active transfers. :-(
+	 */
+	for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) {
+		nextex = LIST_NEXT(ex, inext);
+		ehci_check_intr(sc, ex);
+	}
+
+	if (sc->sc_softwake) {
+		sc->sc_softwake = 0;
+		wakeup(&sc->sc_softwake);
+	}
+
+	sc->sc_bus.intr_context--;
+}
+
+/* Check for an interrupt. */
+void
+ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex)
+{
+	ehci_soft_qtd_t *sqtd, *lsqtd;
+	u_int32_t status;
+
+	DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex));
+
+	if (ex->sqtdstart == NULL) {
+		printf("ehci_check_intr: sqtdstart=NULL\n");
+		return;
+	}
+	lsqtd = ex->sqtdend;
+#ifdef DIAGNOSTIC
+	if (lsqtd == NULL) {
+		printf("ehci_check_intr: sqtd==0\n");
+		return;
+	}
+#endif
+	/*
+	 * If the last TD is still active we need to check whether there
+	 * is a an error somewhere in the middle, or whether there was a
+	 * short packet (SPD and not ACTIVE).
+	 */
+	if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) {
+		DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex));
+		for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) {
+			status = le32toh(sqtd->qtd.qtd_status);
+			/* If there's an active QTD the xfer isn't done. */
+			if (status & EHCI_QTD_ACTIVE)
+				break;
+			/* Any kind of error makes the xfer done. */
+			if (status & EHCI_QTD_HALTED)
+				goto done;
+			/* We want short packets, and it is short: it's done */
+			if (EHCI_QTD_SET_BYTES(status) != 0)
+				goto done;
+		}
+		DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n",
+			      ex, ex->sqtdstart));
+		return;
+	}
+ done:
+	DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex));
+	usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex);
+	ehci_idone(ex);
+}
+
+void
+ehci_idone(struct ehci_xfer *ex)
+{
+	usbd_xfer_handle xfer = &ex->xfer;
+#ifdef EHCI_DEBUG
+	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
+#endif
+	ehci_soft_qtd_t *sqtd;
+	u_int32_t status = 0, nstatus;
+	int actlen;
+
+	DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex));
+#ifdef DIAGNOSTIC
+	{
+		int s = splhigh();
+		if (ex->isdone) {
+			splx(s);
+#ifdef EHCI_DEBUG
+			printf("ehci_idone: ex is done!\n   ");
+			ehci_dump_exfer(ex);
+#else
+			printf("ehci_idone: ex=%p is done!\n", ex);
+#endif
+			return;
+		}
+		ex->isdone = 1;
+		splx(s);
+	}
+#endif
+
+	if (xfer->status == USBD_CANCELLED ||
+	    xfer->status == USBD_TIMEOUT) {
+		DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer));
+		return;
+	}
+
+#ifdef EHCI_DEBUG
+	DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe));
+	if (ehcidebug > 10)
+		ehci_dump_sqtds(ex->sqtdstart);
+#endif
+
+	/* The transfer is done, compute actual length and status. */
+	actlen = 0;
+	for (sqtd = ex->sqtdstart; sqtd != NULL; sqtd = sqtd->nextqtd) {
+		nstatus = le32toh(sqtd->qtd.qtd_status);
+		if (nstatus & EHCI_QTD_ACTIVE)
+			break;
+
+		status = nstatus;
+		/* halt is ok if descriptor is last, and complete */
+		if (sqtd->qtd.qtd_next == EHCI_NULL &&
+		    EHCI_QTD_GET_BYTES(status) == 0)
+			status &= ~EHCI_QTD_HALTED;
+		if (EHCI_QTD_GET_PID(status) !=	EHCI_QTD_PID_SETUP)
+			actlen += sqtd->len - EHCI_QTD_GET_BYTES(status);
+	}
+
+	/* If there are left over TDs we need to update the toggle. */
+	if (sqtd != NULL) {
+		if (!(xfer->rqflags & URQ_REQUEST))
+			printf("ehci_idone: need toggle update\n");
+#if 0
+		epipe->nexttoggle = EHCI_TD_GET_DT(le32toh(std->td.td_token));
+#endif
+	}
+
+	status &= EHCI_QTD_STATERRS;
+	DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n",
+			   xfer->length, actlen, status));
+	xfer->actlen = actlen;
+	if (status != 0) {
+#ifdef EHCI_DEBUG
+		char sbuf[128];
+
+		bitmask_snprintf((u_int32_t)status,
+				 "\20\3MISSEDMICRO\4XACT\5BABBLE\6BABBLE"
+				 "\7HALTED",
+				 sbuf, sizeof(sbuf));
+
+		DPRINTFN((status == EHCI_QTD_HALTED)*/*10*/2,
+			 ("ehci_idone: error, addr=%d, endpt=0x%02x, "
+			  "status 0x%s\n",
+			  xfer->pipe->device->address,
+			  xfer->pipe->endpoint->edesc->bEndpointAddress,
+			  sbuf));
+		if (ehcidebug > 2) {
+			ehci_dump_sqh(epipe->sqh);
+			ehci_dump_sqtds(ex->sqtdstart);
+		}
+#endif
+		if (status == EHCI_QTD_HALTED)
+			xfer->status = USBD_STALLED;
+		else
+			xfer->status = USBD_IOERROR; /* more info XXX */
+	} else {
+		xfer->status = USBD_NORMAL_COMPLETION;
+	}
+
+	usb_transfer_complete(xfer);
+	DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex));
+}
+
+/*
+ * Wait here until controller claims to have an interrupt.
+ * Then call ehci_intr and return.  Use timeout to avoid waiting
+ * too long.
+ */
+void
+ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer)
+{
+	int timo = xfer->timeout;
+	int usecs;
+	u_int32_t intrs;
+
+	xfer->status = USBD_IN_PROGRESS;
+	for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
+		usb_delay_ms(&sc->sc_bus, 1);
+		if (sc->sc_dying)
+			break;
+		intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) &
+			sc->sc_eintrs;
+		DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs));
+#ifdef OHCI_DEBUG
+		if (ehcidebug > 15)
+			ehci_dump_regs(sc);
+#endif
+		if (intrs) {
+			ehci_intr1(sc);
+			if (xfer->status != USBD_IN_PROGRESS)
+				return;
+		}
+	}
+
+	/* Timeout */
+	DPRINTF(("ehci_waitintr: timeout\n"));
+	xfer->status = USBD_TIMEOUT;
+	usb_transfer_complete(xfer);
+	/* XXX should free TD */
+}
+
+void
+ehci_poll(struct usbd_bus *bus)
+{
+	ehci_softc_t *sc = (ehci_softc_t *)bus;
+#ifdef EHCI_DEBUG
+	static int last;
+	int new;
+	new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
+	if (new != last) {
+		DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new));
+		last = new;
+	}
+#endif
+
+	if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs)
+		ehci_intr1(sc);
+}
+
+int
+ehci_detach(struct ehci_softc *sc, int flags)
+{
+	int rv = 0;
+
+	if (sc->sc_child != NULL)
+		rv = config_detach(sc->sc_child, flags);
+
+	if (rv != 0)
+		return (rv);
+
+	usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc);
+
+	if (sc->sc_powerhook != NULL)
+		powerhook_disestablish(sc->sc_powerhook);
+	if (sc->sc_shutdownhook != NULL)
+		shutdownhook_disestablish(sc->sc_shutdownhook);
+
+	usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
+
+	/* XXX free other data structures XXX */
+
+	return (rv);
+}
+
+
+int
+ehci_activate(device_ptr_t self, enum devact act)
+{
+	struct ehci_softc *sc = (struct ehci_softc *)self;
+	int rv = 0;
+
+	switch (act) {
+	case DVACT_ACTIVATE:
+		return (EOPNOTSUPP);
+
+	case DVACT_DEACTIVATE:
+		if (sc->sc_child != NULL)
+			rv = config_deactivate(sc->sc_child);
+		sc->sc_dying = 1;
+		break;
+	}
+	return (rv);
+}
+
+/*
+ * Handle suspend/resume.
+ *
+ * We need to switch to polling mode here, because this routine is
+ * called from an intterupt context.  This is all right since we
+ * are almost suspended anyway.
+ */
+void
+ehci_power(int why, void *v)
+{
+	ehci_softc_t *sc = v;
+	//u_int32_t ctl;
+	int s;
+
+#ifdef EHCI_DEBUG
+	DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why));
+	ehci_dump_regs(sc);
+#endif
+
+	s = splhardusb();
+	switch (why) {
+	case PWR_SUSPEND:
+	case PWR_STANDBY:
+		sc->sc_bus.use_polling++;
+#if 0
+OOO
+		ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK;
+		if (sc->sc_control == 0) {
+			/*
+			 * Preserve register values, in case that APM BIOS
+			 * does not recover them.
+			 */
+			sc->sc_control = ctl;
+			sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE);
+		}
+		ctl |= EHCI_HCFS_SUSPEND;
+		OWRITE4(sc, EHCI_CONTROL, ctl);
+#endif
+		usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
+		sc->sc_bus.use_polling--;
+		break;
+	case PWR_RESUME:
+		sc->sc_bus.use_polling++;
+#if 0
+OOO
+		/* Some broken BIOSes do not recover these values */
+		OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
+		OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
+		OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
+		if (sc->sc_intre)
+			OWRITE4(sc, EHCI_INTERRUPT_ENABLE,
+				sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE));
+		if (sc->sc_control)
+			ctl = sc->sc_control;
+		else
+			ctl = OREAD4(sc, EHCI_CONTROL);
+		ctl |= EHCI_HCFS_RESUME;
+		OWRITE4(sc, EHCI_CONTROL, ctl);
+		usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
+		ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL;
+		OWRITE4(sc, EHCI_CONTROL, ctl);
+		usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
+		sc->sc_control = sc->sc_intre = 0;
+#endif
+		sc->sc_bus.use_polling--;
+		break;
+#if defined(__NetBSD__)
+	case PWR_SOFTSUSPEND:
+	case PWR_SOFTSTANDBY:
+	case PWR_SOFTRESUME:
+		break;
+#endif
+	}
+	splx(s);
+}
+
+/*
+ * Shut down the controller when the system is going down.
+ */
+void
+ehci_shutdown(void *v)
+{
+	ehci_softc_t *sc = v;
+
+	DPRINTF(("ehci_shutdown: stopping the HC\n"));
+	EOWRITE4(sc, EHCI_USBCMD, 0);	/* Halt controller */
+	EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
+}
+
+usbd_status
+ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
+{
+	struct ehci_softc *sc = (struct ehci_softc *)bus;
+	usbd_status err;
+
+	err = usb_allocmem(&sc->sc_bus, size, 0, dma);
+#ifdef EHCI_DEBUG
+	if (err)
+		printf("ehci_allocm: usb_allocmem()=%d\n", err);
+#endif
+	return (err);
+}
+
+void
+ehci_freem(struct usbd_bus *bus, usb_dma_t *dma)
+{
+	struct ehci_softc *sc = (struct ehci_softc *)bus;
+
+	usb_freemem(&sc->sc_bus, dma);
+}
+
+usbd_xfer_handle
+ehci_allocx(struct usbd_bus *bus)
+{
+	struct ehci_softc *sc = (struct ehci_softc *)bus;
+	usbd_xfer_handle xfer;
+
+	xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
+	if (xfer != NULL) {
+		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
+#ifdef DIAGNOSTIC
+		if (xfer->busy_free != XFER_FREE) {
+			printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer,
+			       xfer->busy_free);
+		}
+#endif
+	} else {
+		xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT);
+	}
+	if (xfer != NULL) {
+		memset(xfer, 0, sizeof (struct ehci_xfer));
+#ifdef DIAGNOSTIC
+		EXFER(xfer)->isdone = 1;
+		xfer->busy_free = XFER_BUSY;
+#endif
+	}
+	return (xfer);
+}
+
+void
+ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
+{
+	struct ehci_softc *sc = (struct ehci_softc *)bus;
+
+#ifdef DIAGNOSTIC
+	if (xfer->busy_free != XFER_BUSY) {
+		printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer,
+		       xfer->busy_free);
+		return;
+	}
+	xfer->busy_free = XFER_FREE;
+	if (!EXFER(xfer)->isdone) {
+		printf("ehci_freex: !isdone\n");
+		return;
+	}
+#endif
+	SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
+}
+
+Static void
+ehci_device_clear_toggle(usbd_pipe_handle pipe)
+{
+	struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
+
+	DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n",
+		 epipe, epipe->sqh->qh.qh_qtd.qtd_status));
+#ifdef USB_DEBUG
+	if (ehcidebug)
+		usbd_dump_pipe(pipe);
+#endif
+	epipe->sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE);
+}
+
+Static void
+ehci_noop(usbd_pipe_handle pipe)
+{
+}
+
+#ifdef EHCI_DEBUG
+void
+ehci_dump_regs(ehci_softc_t *sc)
+{
+	int i;
+	printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n",
+	       EOREAD4(sc, EHCI_USBCMD),
+	       EOREAD4(sc, EHCI_USBSTS),
+	       EOREAD4(sc, EHCI_USBINTR));
+	printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n",
+	       EOREAD4(sc, EHCI_FRINDEX),
+	       EOREAD4(sc, EHCI_CTRLDSSEGMENT),
+	       EOREAD4(sc, EHCI_PERIODICLISTBASE),
+	       EOREAD4(sc, EHCI_ASYNCLISTADDR));
+	for (i = 1; i <= sc->sc_noport; i++)
+		printf("port %d status=0x%08x\n", i,
+		       EOREAD4(sc, EHCI_PORTSC(i)));
+}
+
+/*
+ * Unused function - this is meant to be called from a kernel
+ * debugger.
+ */
+void
+ehci_dump()
+{
+	ehci_dump_regs(theehci);
+}
+
+void
+ehci_dump_link(ehci_link_t link, int type)
+{
+	link = le32toh(link);
+	printf("0x%08x", link);
+	if (link & EHCI_LINK_TERMINATE)
+		printf("<T>");
+	else {
+		printf("<");
+		if (type) {
+			switch (EHCI_LINK_TYPE(link)) {
+			case EHCI_LINK_ITD: printf("ITD"); break;
+			case EHCI_LINK_QH: printf("QH"); break;
+			case EHCI_LINK_SITD: printf("SITD"); break;
+			case EHCI_LINK_FSTN: printf("FSTN"); break;
+			}
+		}
+		printf(">");
+	}
+}
+
+void
+ehci_dump_sqtds(ehci_soft_qtd_t *sqtd)
+{
+	int i;
+	u_int32_t stop;
+
+	stop = 0;
+	for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) {
+		ehci_dump_sqtd(sqtd);
+		stop = sqtd->qtd.qtd_next & EHCI_LINK_TERMINATE;
+	}
+	if (sqtd)
+		printf("dump aborted, too many TDs\n");
+}
+
+void
+ehci_dump_sqtd(ehci_soft_qtd_t *sqtd)
+{
+	printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr);
+	ehci_dump_qtd(&sqtd->qtd);
+}
+
+void
+ehci_dump_qtd(ehci_qtd_t *qtd)
+{
+	u_int32_t s;
+	char sbuf[128];
+
+	printf("  next="); ehci_dump_link(qtd->qtd_next, 0);
+	printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0);
+	printf("\n");
+	s = le32toh(qtd->qtd_status);
+	bitmask_snprintf(EHCI_QTD_GET_STATUS(s),
+			 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR"
+			 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf));
+	printf("  status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
+	       s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
+	       EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
+	printf("    cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s),
+	       EHCI_QTD_GET_PID(s), sbuf);
+	for (s = 0; s < 5; s++)
+		printf("  buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s]));
+}
+
+void
+ehci_dump_sqh(ehci_soft_qh_t *sqh)
+{
+	ehci_qh_t *qh = &sqh->qh;
+	u_int32_t endp, endphub;
+
+	printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr);
+	printf("  link="); ehci_dump_link(qh->qh_link, 1); printf("\n");
+	endp = le32toh(qh->qh_endp);
+	printf("  endp=0x%08x\n", endp);
+	printf("    addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n",
+	       EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp),
+	       EHCI_QH_GET_ENDPT(endp),  EHCI_QH_GET_EPS(endp),
+	       EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp));
+	printf("    mpl=0x%x ctl=%d nrl=%d\n",
+	       EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp),
+	       EHCI_QH_GET_NRL(endp));
+	endphub = le32toh(qh->qh_endphub);
+	printf("  endphub=0x%08x\n", endphub);
+	printf("    smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n",
+	       EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub),
+	       EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub),
+	       EHCI_QH_GET_MULT(endphub));
+	printf("  curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n");
+	printf("Overlay qTD:\n");
+	ehci_dump_qtd(&qh->qh_qtd);
+}
+
+#ifdef DIAGNOSTIC
+Static void
+ehci_dump_exfer(struct ehci_xfer *ex)
+{
+	printf("ehci_dump_exfer: ex=%p\n", ex);
+}
+#endif
+#endif
+
+usbd_status
+ehci_open(usbd_pipe_handle pipe)
+{
+	usbd_device_handle dev = pipe->device;
+	ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
+	usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
+	u_int8_t addr = dev->address;
+	u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
+	struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
+	ehci_soft_qh_t *sqh;
+	usbd_status err;
+	int s;
+	int speed, naks;
+
+	DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
+		     pipe, addr, ed->bEndpointAddress, sc->sc_addr));
+
+	if (sc->sc_dying)
+		return (USBD_IOERROR);
+
+	if (addr == sc->sc_addr) {
+		switch (ed->bEndpointAddress) {
+		case USB_CONTROL_ENDPOINT:
+			pipe->methods = &ehci_root_ctrl_methods;
+			break;
+		case UE_DIR_IN | EHCI_INTR_ENDPT:
+			pipe->methods = &ehci_root_intr_methods;
+			break;
+		default:
+			return (USBD_INVAL);
+		}
+		return (USBD_NORMAL_COMPLETION);
+	}
+
+	/* XXX All this stuff is only valid for async. */
+	switch (dev->speed) {
+	case USB_SPEED_LOW:  speed = EHCI_QH_SPEED_LOW;  break;
+	case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break;
+	case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break;
+	default: panic("ehci_open: bad device speed %d", dev->speed);
+	}
+	naks = 8;		/* XXX */
+	sqh = ehci_alloc_sqh(sc);
+	if (sqh == NULL)
+		goto bad0;
+	/* qh_link filled when the QH is added */
+	sqh->qh.qh_endp = htole32(
+		EHCI_QH_SET_ADDR(addr) |
+		EHCI_QH_SET_ENDPT(ed->bEndpointAddress) |
+		EHCI_QH_SET_EPS(speed) | /* XXX */
+		/* XXX EHCI_QH_DTC ? */
+		EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) |
+		(speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ?
+		 EHCI_QH_CTL : 0) |
+		EHCI_QH_SET_NRL(naks)
+		);
+	sqh->qh.qh_endphub = htole32(
+		EHCI_QH_SET_MULT(1)
+		/* XXX TT stuff */
+		/* XXX interrupt mask */
+		);
+	sqh->qh.qh_curqtd = EHCI_NULL;
+	/* Fill the overlay qTD */
+	sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
+	sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
+	sqh->qh.qh_qtd.qtd_status = htole32(0);
+
+	epipe->sqh = sqh;
+
+	switch (xfertype) {
+	case UE_CONTROL:
+		err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t),
+				   0, &epipe->u.ctl.reqdma);
+#ifdef EHCI_DEBUG
+		if (err)
+			printf("ehci_open: usb_allocmem()=%d\n", err);
+#endif
+		if (err)
+			goto bad1;
+		pipe->methods = &ehci_device_ctrl_methods;
+		s = splusb();
+		ehci_add_qh(sqh, sc->sc_async_head);
+		splx(s);
+		break;
+	case UE_BULK:
+		pipe->methods = &ehci_device_bulk_methods;
+		s = splusb();
+		ehci_add_qh(sqh, sc->sc_async_head);
+		splx(s);
+		break;
+	case UE_INTERRUPT:
+		pipe->methods = &ehci_device_intr_methods;
+		return (USBD_INVAL);
+	case UE_ISOCHRONOUS:
+		pipe->methods = &ehci_device_isoc_methods;
+		return (USBD_INVAL);
+	default:
+		return (USBD_INVAL);
+	}
+	return (USBD_NORMAL_COMPLETION);
+
+ bad1:
+	ehci_free_sqh(sc, sqh);
+ bad0:
+	return (USBD_NOMEM);
+}
+
+/*
+ * Add an ED to the schedule.  Called at splusb().
+ */
+void
+ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
+{
+	SPLUSBCHECK;
+
+	sqh->next = head->next;
+	sqh->qh.qh_link = head->qh.qh_link;
+	head->next = sqh;
+	head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH);
+
+#ifdef EHCI_DEBUG
+	if (ehcidebug > 5) {
+		printf("ehci_add_qh:\n");
+		ehci_dump_sqh(sqh);
+	}
+#endif
+}
+
+/*
+ * Remove an ED from the schedule.  Called at splusb().
+ */
+void
+ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
+{
+	ehci_soft_qh_t *p;
+
+	SPLUSBCHECK;
+	/* XXX */
+	for (p = head; p != NULL && p->next != sqh; p = p->next)
+		;
+	if (p == NULL)
+		panic("ehci_rem_qh: ED not found");
+	p->next = sqh->next;
+	p->qh.qh_link = sqh->qh.qh_link;
+
+	ehci_sync_hc(sc);
+}
+
+void
+ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd)
+{
+	/* Halt while we are messing. */
+	sqh->qh.qh_qtd.qtd_status |= htole32(EHCI_QTD_HALTED);
+	sqh->qh.qh_curqtd = 0;
+	sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr);
+	sqh->sqtd = sqtd;
+	/* Keep toggle, clear the rest, including length. */
+	sqh->qh.qh_qtd.qtd_status &= htole32(EHCI_QTD_TOGGLE);
+}
+
+/*
+ * Ensure that the HC has released all references to the QH.  We do this
+ * by asking for a Async Advance Doorbell interrupt and then we wait for
+ * the interrupt.
+ * To make this easier we first obtain exclusive use of the doorbell.
+ */
+void
+ehci_sync_hc(ehci_softc_t *sc)
+{
+	int s, error;
+
+	if (sc->sc_dying) {
+		DPRINTFN(2,("ehci_sync_hc: dying\n"));
+		return;
+	}
+	DPRINTFN(2,("ehci_sync_hc: enter\n"));
+#if defined(__OpenBSD__) 
+	usb_lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL, curproc); /* get doorbell */
+#else
+	lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */
+#endif
+	s = splhardusb();
+	/* ask for doorbell */
+	EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD);
+	DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
+		    EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
+	error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */
+	DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
+		    EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
+	splx(s);
+#if defined(__OpenBSD__) 
+	usb_lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL, curproc); /* release doorbell */
+#else
+	lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */
+#endif
+#ifdef DIAGNOSTIC
+	if (error)
+		printf("ehci_sync_hc: tsleep() = %d\n", error);
+#endif
+	DPRINTFN(2,("ehci_sync_hc: exit\n"));
+}
+
+/***********/
+
+/*
+ * Data structures and routines to emulate the root hub.
+ */
+Static usb_device_descriptor_t ehci_devd = {
+	USB_DEVICE_DESCRIPTOR_SIZE,
+	UDESC_DEVICE,		/* type */
+	{0x00, 0x02},		/* USB version */
+	UDCLASS_HUB,		/* class */
+	UDSUBCLASS_HUB,		/* subclass */
+	UDPROTO_HSHUBSTT,	/* protocol */
+	64,			/* max packet */
+	{0},{0},{0x00,0x01},	/* device id */
+	1,2,0,			/* string indicies */
+	1			/* # of configurations */
+};
+
+Static usb_device_qualifier_t ehci_odevd = {
+	USB_DEVICE_DESCRIPTOR_SIZE,
+	UDESC_DEVICE_QUALIFIER,	/* type */
+	{0x00, 0x02},		/* USB version */
+	UDCLASS_HUB,		/* class */
+	UDSUBCLASS_HUB,		/* subclass */
+	UDPROTO_FSHUB,		/* protocol */
+	64,			/* max packet */
+	1,			/* # of configurations */
+	0
+};
+
+Static usb_config_descriptor_t ehci_confd = {
+	USB_CONFIG_DESCRIPTOR_SIZE,
+	UDESC_CONFIG,
+	{USB_CONFIG_DESCRIPTOR_SIZE +
+	 USB_INTERFACE_DESCRIPTOR_SIZE +
+	 USB_ENDPOINT_DESCRIPTOR_SIZE},
+	1,
+	1,
+	0,
+	UC_SELF_POWERED,
+	0			/* max power */
+};
+
+Static usb_interface_descriptor_t ehci_ifcd = {
+	USB_INTERFACE_DESCRIPTOR_SIZE,
+	UDESC_INTERFACE,
+	0,
+	0,
+	1,
+	UICLASS_HUB,
+	UISUBCLASS_HUB,
+	UIPROTO_HSHUBSTT,
+	0
+};
+
+Static usb_endpoint_descriptor_t ehci_endpd = {
+	USB_ENDPOINT_DESCRIPTOR_SIZE,
+	UDESC_ENDPOINT,
+	UE_DIR_IN | EHCI_INTR_ENDPT,
+	UE_INTERRUPT,
+	{8, 0},			/* max packet */
+	255
+};
+
+Static usb_hub_descriptor_t ehci_hubd = {
+	USB_HUB_DESCRIPTOR_SIZE,
+	UDESC_HUB,
+	0,
+	{0,0},
+	0,
+	0,
+	{0},
+};
+
+Static int
+ehci_str(p, l, s)
+	usb_string_descriptor_t *p;
+	int l;
+	char *s;
+{
+	int i;
+
+	if (l == 0)
+		return (0);
+	p->bLength = 2 * strlen(s) + 2;
+	if (l == 1)
+		return (1);
+	p->bDescriptorType = UDESC_STRING;
+	l -= 2;
+	for (i = 0; s[i] && l > 1; i++, l -= 2)
+		USETW2(p->bString[i], 0, s[i]);
+	return (2*i+2);
+}
+
+/*
+ * Simulate a hardware hub by handling all the necessary requests.
+ */
+Static usbd_status
+ehci_root_ctrl_transfer(usbd_xfer_handle xfer)
+{
+	usbd_status err;
+
+	/* Insert last in queue. */
+	err = usb_insert_transfer(xfer);
+	if (err)
+		return (err);
+
+	/* Pipe isn't running, start first */
+	return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
+}
+
+Static usbd_status
+ehci_root_ctrl_start(usbd_xfer_handle xfer)
+{
+	ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
+	usb_device_request_t *req;
+	void *buf = NULL;
+	int port, i;
+	int s, len, value, index, l, totlen = 0;
+	usb_port_status_t ps;
+	usb_hub_descriptor_t hubd;
+	usbd_status err;
+	u_int32_t v;
+
+	if (sc->sc_dying)
+		return (USBD_IOERROR);
+
+#ifdef DIAGNOSTIC
+	if (!(xfer->rqflags & URQ_REQUEST))
+		/* XXX panic */
+		return (USBD_INVAL);
+#endif
+	req = &xfer->request;
+
+	DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n",
+		    req->bmRequestType, req->bRequest));
+
+	len = UGETW(req->wLength);
+	value = UGETW(req->wValue);
+	index = UGETW(req->wIndex);
+
+	if (len != 0)
+		buf = KERNADDR(&xfer->dmabuf, 0);
+
+#define C(x,y) ((x) | ((y) << 8))
+	switch(C(req->bRequest, req->bmRequestType)) {
+	case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
+	case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
+	case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
+		/*
+		 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
+		 * for the integrated root hub.
+		 */
+		break;
+	case C(UR_GET_CONFIG, UT_READ_DEVICE):
+		if (len > 0) {
+			*(u_int8_t *)buf = sc->sc_conf;
+			totlen = 1;
+		}
+		break;
+	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
+		DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value));
+		switch(value >> 8) {
+		case UDESC_DEVICE:
+			if ((value & 0xff) != 0) {
+				err = USBD_IOERROR;
+				goto ret;
+			}
+			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
+			USETW(ehci_devd.idVendor, sc->sc_id_vendor);
+			memcpy(buf, &ehci_devd, l);
+			break;
+		/*
+		 * We can't really operate at another speed, but the spec says
+		 * we need this descriptor.
+		 */
+		case UDESC_DEVICE_QUALIFIER:
+			if ((value & 0xff) != 0) {
+				err = USBD_IOERROR;
+				goto ret;
+			}
+			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
+			memcpy(buf, &ehci_odevd, l);
+			break;
+		/*
+		 * We can't really operate at another speed, but the spec says
+		 * we need this descriptor.
+		 */
+		case UDESC_OTHER_SPEED_CONFIGURATION:
+		case UDESC_CONFIG:
+			if ((value & 0xff) != 0) {
+				err = USBD_IOERROR;
+				goto ret;
+			}
+			totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
+			memcpy(buf, &ehci_confd, l);
+			((usb_config_descriptor_t *)buf)->bDescriptorType =
+				value >> 8;
+			buf = (char *)buf + l;
+			len -= l;
+			l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
+			totlen += l;
+			memcpy(buf, &ehci_ifcd, l);
+			buf = (char *)buf + l;
+			len -= l;
+			l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
+			totlen += l;
+			memcpy(buf, &ehci_endpd, l);
+			break;
+		case UDESC_STRING:
+			if (len == 0)
+				break;
+			*(u_int8_t *)buf = 0;
+			totlen = 1;
+			switch (value & 0xff) {
+			case 1: /* Vendor */
+				totlen = ehci_str(buf, len, sc->sc_vendor);
+				break;
+			case 2: /* Product */
+				totlen = ehci_str(buf, len, "EHCI root hub");
+				break;
+			}
+			break;
+		default:
+			err = USBD_IOERROR;
+			goto ret;
+		}
+		break;
+	case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
+		if (len > 0) {
+			*(u_int8_t *)buf = 0;
+			totlen = 1;
+		}
+		break;
+	case C(UR_GET_STATUS, UT_READ_DEVICE):
+		if (len > 1) {
+			USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
+			totlen = 2;
+		}
+		break;
+	case C(UR_GET_STATUS, UT_READ_INTERFACE):
+	case C(UR_GET_STATUS, UT_READ_ENDPOINT):
+		if (len > 1) {
+			USETW(((usb_status_t *)buf)->wStatus, 0);
+			totlen = 2;
+		}
+		break;
+	case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
+		if (value >= USB_MAX_DEVICES) {
+			err = USBD_IOERROR;
+			goto ret;
+		}
+		sc->sc_addr = value;
+		break;
+	case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
+		if (value != 0 && value != 1) {
+			err = USBD_IOERROR;
+			goto ret;
+		}
+		sc->sc_conf = value;
+		break;
+	case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
+		break;
+	case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
+	case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
+	case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
+		err = USBD_IOERROR;
+		goto ret;
+	case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
+		break;
+	case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
+		break;
+	/* Hub requests */
+	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
+		break;
+	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
+		DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
+			     "port=%d feature=%d\n",
+			     index, value));
+		if (index < 1 || index > sc->sc_noport) {
+			err = USBD_IOERROR;
+			goto ret;
+		}
+		port = EHCI_PORTSC(index);
+		v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
+		switch(value) {
+		case UHF_PORT_ENABLE:
+			EOWRITE4(sc, port, v &~ EHCI_PS_PE);
+			break;
+		case UHF_PORT_SUSPEND:
+			EOWRITE4(sc, port, v &~ EHCI_PS_SUSP);
+			break;
+		case UHF_PORT_POWER:
+			EOWRITE4(sc, port, v &~ EHCI_PS_PP);
+			break;
+		case UHF_PORT_TEST:
+			DPRINTFN(2,("ehci_root_ctrl_transfer: clear port test "
+				    "%d\n", index));
+			break;
+		case UHF_PORT_INDICATOR:
+			DPRINTFN(2,("ehci_root_ctrl_transfer: clear port ind "
+				    "%d\n", index));
+			EOWRITE4(sc, port, v &~ EHCI_PS_PIC);
+			break;
+		case UHF_C_PORT_CONNECTION:
+			EOWRITE4(sc, port, v | EHCI_PS_CSC);
+			break;
+		case UHF_C_PORT_ENABLE:
+			EOWRITE4(sc, port, v | EHCI_PS_PEC);
+			break;
+		case UHF_C_PORT_SUSPEND:
+			/* how? */
+			break;
+		case UHF_C_PORT_OVER_CURRENT:
+			EOWRITE4(sc, port, v | EHCI_PS_OCC);
+			break;
+		case UHF_C_PORT_RESET:
+			sc->sc_isreset = 0;
+			break;
+		default:
+			err = USBD_IOERROR;
+			goto ret;
+		}
+#if 0
+		switch(value) {
+		case UHF_C_PORT_CONNECTION:
+		case UHF_C_PORT_ENABLE:
+		case UHF_C_PORT_SUSPEND:
+		case UHF_C_PORT_OVER_CURRENT:
+		case UHF_C_PORT_RESET:
+			/* Enable RHSC interrupt if condition is cleared. */
+			if ((OREAD4(sc, port) >> 16) == 0)
+				ehci_pcd_able(sc, 1);
+			break;
+		default:
+			break;
+		}
+#endif
+		break;
+	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
+		if ((value & 0xff) != 0) {
+			err = USBD_IOERROR;
+			goto ret;
+		}
+		hubd = ehci_hubd;
+		hubd.bNbrPorts = sc->sc_noport;
+		v = EOREAD4(sc, EHCI_HCSPARAMS);
+		USETW(hubd.wHubCharacteristics,
+		    EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH |
+		    EHCI_HCS_P_INCICATOR(EREAD4(sc, EHCI_HCSPARAMS))
+		        ? UHD_PORT_IND : 0);
+		hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */
+		for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
+			hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */
+		hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
+		l = min(len, hubd.bDescLength);
+		totlen = l;
+		memcpy(buf, &hubd, l);
+		break;
+	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
+		if (len != 4) {
+			err = USBD_IOERROR;
+			goto ret;
+		}
+		memset(buf, 0, len); /* ? XXX */
+		totlen = len;
+		break;
+	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
+		DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n",
+			    index));
+		if (index < 1 || index > sc->sc_noport) {
+			err = USBD_IOERROR;
+			goto ret;
+		}
+		if (len != 4) {
+			err = USBD_IOERROR;
+			goto ret;
+		}
+		v = EOREAD4(sc, EHCI_PORTSC(index));
+		DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n",
+			    v));
+		i = UPS_HIGH_SPEED;
+		if (v & EHCI_PS_CS)	i |= UPS_CURRENT_CONNECT_STATUS;
+		if (v & EHCI_PS_PE)	i |= UPS_PORT_ENABLED;
+		if (v & EHCI_PS_SUSP)	i |= UPS_SUSPEND;
+		if (v & EHCI_PS_OCA)	i |= UPS_OVERCURRENT_INDICATOR;
+		if (v & EHCI_PS_PR)	i |= UPS_RESET;
+		if (v & EHCI_PS_PP)	i |= UPS_PORT_POWER;
+		USETW(ps.wPortStatus, i);
+		i = 0;
+		if (v & EHCI_PS_CSC)	i |= UPS_C_CONNECT_STATUS;
+		if (v & EHCI_PS_PEC)	i |= UPS_C_PORT_ENABLED;
+		if (v & EHCI_PS_OCC)	i |= UPS_C_OVERCURRENT_INDICATOR;
+		if (sc->sc_isreset)	i |= UPS_C_PORT_RESET;
+		USETW(ps.wPortChange, i);
+		l = min(len, sizeof ps);
+		memcpy(buf, &ps, l);
+		totlen = l;
+		break;
+	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
+		err = USBD_IOERROR;
+		goto ret;
+	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
+		break;
+	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
+		if (index < 1 || index > sc->sc_noport) {
+			err = USBD_IOERROR;
+			goto ret;
+		}
+		port = EHCI_PORTSC(index);
+		v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
+		switch(value) {
+		case UHF_PORT_ENABLE:
+			EOWRITE4(sc, port, v | EHCI_PS_PE);
+			break;
+		case UHF_PORT_SUSPEND:
+			EOWRITE4(sc, port, v | EHCI_PS_SUSP);
+			break;
+		case UHF_PORT_RESET:
+			DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n",
+				    index));
+			if (EHCI_PS_IS_LOWSPEED(v)) {
+				/* Low speed device, give up ownership. */
+				ehci_disown(sc, index, 1);
+				break;
+			}
+			/* Start reset sequence. */
+			v &= ~ (EHCI_PS_PE | EHCI_PS_PR);
+			EOWRITE4(sc, port, v | EHCI_PS_PR);
+			/* Wait for reset to complete. */
+			usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
+			if (sc->sc_dying) {
+				err = USBD_IOERROR;
+				goto ret;
+			}
+			/* Terminate reset sequence. */
+			EOWRITE4(sc, port, v);
+			/* Wait for HC to complete reset. */
+			usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE);
+			if (sc->sc_dying) {
+				err = USBD_IOERROR;
+				goto ret;
+			}
+			v = EOREAD4(sc, port);
+			DPRINTF(("ehci after reset, status=0x%08x\n", v));
+			if (v & EHCI_PS_PR) {
+				printf("%s: port reset timeout\n",
+				       USBDEVNAME(sc->sc_bus.bdev));
+				return (USBD_TIMEOUT);
+			}
+			if (!(v & EHCI_PS_PE)) {
+				/* Not a high speed device, give up ownership.*/
+				ehci_disown(sc, index, 0);
+				break;
+			}
+			sc->sc_isreset = 1;
+			DPRINTF(("ehci port %d reset, status = 0x%08x\n",
+				 index, v));
+			break;
+		case UHF_PORT_POWER:
+			DPRINTFN(2,("ehci_root_ctrl_transfer: set port power "
+				    "%d\n", index));
+			EOWRITE4(sc, port, v | EHCI_PS_PP);
+			break;
+		case UHF_PORT_TEST:
+			DPRINTFN(2,("ehci_root_ctrl_transfer: set port test "
+				    "%d\n", index));
+			break;
+		case UHF_PORT_INDICATOR:
+			DPRINTFN(2,("ehci_root_ctrl_transfer: set port ind "
+				    "%d\n", index));
+			EOWRITE4(sc, port, v | EHCI_PS_PIC);
+			break;
+		default:
+			err = USBD_IOERROR;
+			goto ret;
+		}
+		break;
+	case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
+	case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
+	case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
+	case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
+		break;
+	default:
+		err = USBD_IOERROR;
+		goto ret;
+	}
+	xfer->actlen = totlen;
+	err = USBD_NORMAL_COMPLETION;
+ ret:
+	xfer->status = err;
+	s = splusb();
+	usb_transfer_complete(xfer);
+	splx(s);
+	return (USBD_IN_PROGRESS);
+}
+
+void
+ehci_disown(ehci_softc_t *sc, int index, int lowspeed)
+{
+	int port;
+	u_int32_t v;
+
+	DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed));
+#ifdef DIAGNOSTIC
+	if (sc->sc_npcomp != 0) {
+		int i = (index-1) / sc->sc_npcomp;
+		if (i >= sc->sc_ncomp)
+			printf("%s: strange port\n",
+			       USBDEVNAME(sc->sc_bus.bdev));
+		else
+			printf("%s: handing over %s speed device on "
+			       "port %d to %s\n",
+			       USBDEVNAME(sc->sc_bus.bdev),
+			       lowspeed ? "low" : "full",
+			       index, USBDEVNAME(sc->sc_comps[i]->bdev));
+	} else {
+		printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev));
+	}
+#endif
+	port = EHCI_PORTSC(index);
+	v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
+	EOWRITE4(sc, port, v | EHCI_PS_PO);
+}
+
+/* Abort a root control request. */
+Static void
+ehci_root_ctrl_abort(usbd_xfer_handle xfer)
+{
+	/* Nothing to do, all transfers are synchronous. */
+}
+
+/* Close the root pipe. */
+Static void
+ehci_root_ctrl_close(usbd_pipe_handle pipe)
+{
+	DPRINTF(("ehci_root_ctrl_close\n"));
+	/* Nothing to do. */
+}
+
+void
+ehci_root_intr_done(usbd_xfer_handle xfer)
+{
+	xfer->hcpriv = NULL;
+}
+
+Static usbd_status
+ehci_root_intr_transfer(usbd_xfer_handle xfer)
+{
+	usbd_status err;
+
+	/* Insert last in queue. */
+	err = usb_insert_transfer(xfer);
+	if (err)
+		return (err);
+
+	/* Pipe isn't running, start first */
+	return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
+}
+
+Static usbd_status
+ehci_root_intr_start(usbd_xfer_handle xfer)
+{
+	usbd_pipe_handle pipe = xfer->pipe;
+	ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
+
+	if (sc->sc_dying)
+		return (USBD_IOERROR);
+
+	sc->sc_intrxfer = xfer;
+
+	return (USBD_IN_PROGRESS);
+}
+
+/* Abort a root interrupt request. */
+Static void
+ehci_root_intr_abort(usbd_xfer_handle xfer)
+{
+	int s;
+
+	if (xfer->pipe->intrxfer == xfer) {
+		DPRINTF(("ehci_root_intr_abort: remove\n"));
+		xfer->pipe->intrxfer = NULL;
+	}
+	xfer->status = USBD_CANCELLED;
+	s = splusb();
+	usb_transfer_complete(xfer);
+	splx(s);
+}
+
+/* Close the root pipe. */
+Static void
+ehci_root_intr_close(usbd_pipe_handle pipe)
+{
+	ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
+
+	DPRINTF(("ehci_root_intr_close\n"));
+
+	sc->sc_intrxfer = NULL;
+}
+
+void
+ehci_root_ctrl_done(usbd_xfer_handle xfer)
+{
+	xfer->hcpriv = NULL;
+}
+
+/************************/
+
+ehci_soft_qh_t *
+ehci_alloc_sqh(ehci_softc_t *sc)
+{
+	ehci_soft_qh_t *sqh;
+	usbd_status err;
+	int i, offs;
+	usb_dma_t dma;
+
+	if (sc->sc_freeqhs == NULL) {
+		DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n"));
+		err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK,
+			  EHCI_PAGE_SIZE, &dma);
+#ifdef EHCI_DEBUG
+		if (err)
+			printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err);
+#endif
+		if (err)
+			return (NULL);
+		for(i = 0; i < EHCI_SQH_CHUNK; i++) {
+			offs = i * EHCI_SQH_SIZE;
+			sqh = KERNADDR(&dma, offs);
+			sqh->physaddr = DMAADDR(&dma, offs);
+			sqh->next = sc->sc_freeqhs;
+			sc->sc_freeqhs = sqh;
+		}
+	}
+	sqh = sc->sc_freeqhs;
+	sc->sc_freeqhs = sqh->next;
+	memset(&sqh->qh, 0, sizeof(ehci_qh_t));
+	sqh->next = NULL;
+	return (sqh);
+}
+
+void
+ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh)
+{
+	sqh->next = sc->sc_freeqhs;
+	sc->sc_freeqhs = sqh;
+}
+
+ehci_soft_qtd_t *
+ehci_alloc_sqtd(ehci_softc_t *sc)
+{
+	ehci_soft_qtd_t *sqtd;
+	usbd_status err;
+	int i, offs;
+	usb_dma_t dma;
+	int s;
+
+	if (sc->sc_freeqtds == NULL) {
+		DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n"));
+		err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK,
+			  EHCI_PAGE_SIZE, &dma);
+#ifdef EHCI_DEBUG
+		if (err)
+			printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err);
+#endif
+		if (err)
+			return (NULL);
+		s = splusb();
+		for(i = 0; i < EHCI_SQTD_CHUNK; i++) {
+			offs = i * EHCI_SQTD_SIZE;
+			sqtd = KERNADDR(&dma, offs);
+			sqtd->physaddr = DMAADDR(&dma, offs);
+			sqtd->nextqtd = sc->sc_freeqtds;
+			sc->sc_freeqtds = sqtd;
+		}
+		splx(s);
+	}
+
+	s = splusb();
+	sqtd = sc->sc_freeqtds;
+	sc->sc_freeqtds = sqtd->nextqtd;
+	memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t));
+	sqtd->nextqtd = NULL;
+	sqtd->xfer = NULL;
+	splx(s);
+
+	return (sqtd);
+}
+
+void
+ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
+{
+	int s;
+
+	s = splusb();
+	sqtd->nextqtd = sc->sc_freeqtds;
+	sc->sc_freeqtds = sqtd;
+	splx(s);
+}
+
+usbd_status
+ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc,
+		     int alen, int rd, usbd_xfer_handle xfer,
+		     ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep)
+{
+	ehci_soft_qtd_t *next, *cur;
+	ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys;
+	u_int32_t qtdstatus;
+	int len, curlen;
+	int i;
+	usb_dma_t *dma = &xfer->dmabuf;
+
+	DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen));
+
+	len = alen;
+	dataphys = DMAADDR(dma, 0);
+	dataphyslastpage = EHCI_PAGE(dataphys + len - 1);
+	qtdstatus = htole32(
+	    EHCI_QTD_ACTIVE |
+	    EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) |
+	    EHCI_QTD_SET_CERR(3)
+	    /* IOC set below */
+	    /* BYTES set below */
+	    /* XXX Data toggle */
+	    );
+
+	cur = ehci_alloc_sqtd(sc);
+	*sp = cur;
+	if (cur == NULL)
+		goto nomem;
+	for (;;) {
+		dataphyspage = EHCI_PAGE(dataphys);
+		/* The EHCI hardware can handle at most 5 pages. */
+		if (dataphyslastpage - dataphyspage <
+		    EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) {
+			/* we can handle it in this QTD */
+			curlen = len;
+		} else {
+			/* must use multiple TDs, fill as much as possible. */
+			curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE -
+				 EHCI_PAGE_OFFSET(dataphys);
+#ifdef DIAGNOSTIC
+			if (curlen > len) {
+				printf("ehci_alloc_sqtd_chain: curlen=0x%x "
+				       "len=0x%x offs=0x%x\n", curlen, len,
+				       EHCI_PAGE_OFFSET(dataphys));
+				printf("lastpage=0x%x page=0x%x phys=0x%x\n",
+				       dataphyslastpage, dataphyspage,
+				       dataphys);
+				curlen = len;
+			}
+#endif
+
+			/* XXX true for EHCI? */
+			/* the length must be a multiple of the max size */
+			curlen -= curlen % UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize);
+			DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, "
+				    "curlen=%d\n", curlen));
+#ifdef DIAGNOSTIC
+			if (curlen == 0)
+				panic("ehci_alloc_std: curlen == 0");
+#endif
+		}
+		DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x "
+			    "dataphyslastpage=0x%08x len=%d curlen=%d\n",
+			    dataphys, dataphyslastpage,
+			    len, curlen));
+		len -= curlen;
+
+		if (len != 0) {
+			next = ehci_alloc_sqtd(sc);
+			if (next == NULL)
+				goto nomem;
+			nextphys = next->physaddr;
+		} else {
+			next = NULL;
+			nextphys = EHCI_NULL;
+		}
+
+		for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) {
+			ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE;
+			if (i != 0) /* use offset only in first buffer */
+				a = EHCI_PAGE(a);
+			cur->qtd.qtd_buffer[i] = htole32(a);
+			cur->qtd.qtd_buffer_hi[i] = 0;
+#ifdef DIAGNOSTIC
+			if (i >= EHCI_QTD_NBUFFERS) {
+				printf("ehci_alloc_sqtd_chain: i=%d\n", i);
+				goto nomem;
+			}
+#endif
+		}
+		cur->nextqtd = next;
+		cur->qtd.qtd_next = cur->qtd.qtd_altnext = htole32(nextphys);
+		cur->qtd.qtd_status =
+		    qtdstatus | htole32(EHCI_QTD_SET_BYTES(curlen));
+		cur->xfer = xfer;
+		cur->len = curlen;
+		DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n",
+			    dataphys, dataphys + curlen));
+		if (len == 0)
+			break;
+		DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n"));
+		dataphys += curlen;
+		cur = next;
+	}
+	cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC);
+	*ep = cur;
+
+	DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n",
+		     *sp, *ep));
+
+	return (USBD_NORMAL_COMPLETION);
+
+ nomem:
+	/* XXX free chain */
+	DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n"));
+	return (USBD_NOMEM);
+}
+
+Static void
+ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd,
+		    ehci_soft_qtd_t *sqtdend)
+{
+	ehci_soft_qtd_t *p;
+	int i;
+
+	DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n",
+		     sqtd, sqtdend));
+
+	for (i = 0; sqtd != sqtdend; sqtd = p, i++) {
+		p = sqtd->nextqtd;
+		ehci_free_sqtd(sc, sqtd);
+	}
+}
+
+/****************/
+
+/*
+ * Close a reqular pipe.
+ * Assumes that there are no pending transactions.
+ */
+void
+ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head)
+{
+	struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
+	ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
+	ehci_soft_qh_t *sqh = epipe->sqh;
+	int s;
+
+	s = splusb();
+	ehci_rem_qh(sc, sqh, head);
+	splx(s);
+	ehci_free_sqh(sc, epipe->sqh);
+}
+
+/*
+ * Abort a device request.
+ * If this routine is called at splusb() it guarantees that the request
+ * will be removed from the hardware scheduling and that the callback
+ * for it will be called with USBD_CANCELLED status.
+ * It's impossible to guarantee that the requested transfer will not
+ * have happened since the hardware runs concurrently.
+ * If the transaction has already happened we rely on the ordinary
+ * interrupt processing to process it.
+ * XXX This is most probably wrong.
+ */
+void
+ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
+{
+#define exfer EXFER(xfer)
+	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
+	ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
+	ehci_soft_qh_t *sqh = epipe->sqh;
+	ehci_soft_qtd_t *sqtd;
+	ehci_physaddr_t cur;
+	u_int32_t qhstatus;
+	int s;
+	int hit;
+
+	DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe));
+
+	if (sc->sc_dying) {
+		/* If we're dying, just do the software part. */
+		s = splusb();
+		xfer->status = status;	/* make software ignore it */
+		usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer);
+		usb_transfer_complete(xfer);
+		splx(s);
+		return;
+	}
+
+	if (xfer->device->bus->intr_context || !curproc)
+		panic("ehci_abort_xfer: not in process context");
+
+	/*
+	 * Step 1: Make interrupt routine and hardware ignore xfer.
+	 */
+	s = splusb();
+	xfer->status = status;	/* make software ignore it */
+	usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer);
+	qhstatus = sqh->qh.qh_qtd.qtd_status;
+	sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED);
+	for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) {
+		sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED);
+		if (sqtd == exfer->sqtdend)
+			break;
+	}
+	splx(s);
+
+	/*
+	 * Step 2: Wait until we know hardware has finished any possible
+	 * use of the xfer.  Also make sure the soft interrupt routine
+	 * has run.
+	 */
+	ehci_sync_hc(sc);
+	s = splusb();
+	sc->sc_softwake = 1;
+	usb_schedsoftintr(&sc->sc_bus);
+	tsleep(&sc->sc_softwake, PZERO, "ehciab", 0);
+	splx(s);
+
+	/*
+	 * Step 3: Remove any vestiges of the xfer from the hardware.
+	 * The complication here is that the hardware may have executed
+	 * beyond the xfer we're trying to abort.  So as we're scanning
+	 * the TDs of this xfer we check if the hardware points to
+	 * any of them.
+	 */
+	s = splusb();		/* XXX why? */
+	cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd));
+	hit = 0;
+	for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) {
+		hit |= cur == sqtd->physaddr;
+		if (sqtd == exfer->sqtdend)
+			break;
+	}
+	sqtd = sqtd->nextqtd;
+	/* Zap curqtd register if hardware pointed inside the xfer. */
+	if (hit && sqtd != NULL) {
+		DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr));
+		sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */
+		sqh->qh.qh_qtd.qtd_status = qhstatus;
+	} else {
+		DPRINTFN(1,("ehci_abort_xfer: no hit\n"));
+	}
+
+	/*
+	 * Step 4: Execute callback.
+	 */
+#ifdef DIAGNOSTIC
+	exfer->isdone = 1;
+#endif
+	usb_transfer_complete(xfer);
+
+	splx(s);
+#undef exfer
+}
+
+void
+ehci_timeout(void *addr)
+{
+	struct ehci_xfer *exfer = addr;
+	struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe;
+	ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
+
+	DPRINTF(("ehci_timeout: exfer=%p\n", exfer));
+#ifdef USB_DEBUG
+	if (ehcidebug > 1)
+		usbd_dump_pipe(exfer->xfer.pipe);
+#endif
+
+	if (sc->sc_dying) {
+		ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT);
+		return;
+	}
+
+	/* Execute the abort in a process context. */
+	usb_init_task(&exfer->abort_task, ehci_timeout_task, addr);
+	usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task);
+}
+
+void
+ehci_timeout_task(void *addr)
+{
+	usbd_xfer_handle xfer = addr;
+	int s;
+
+	DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer));
+
+	s = splusb();
+	ehci_abort_xfer(xfer, USBD_TIMEOUT);
+	splx(s);
+}
+
+/************************/
+
+Static usbd_status
+ehci_device_ctrl_transfer(usbd_xfer_handle xfer)
+{
+	usbd_status err;
+
+	/* Insert last in queue. */
+	err = usb_insert_transfer(xfer);
+	if (err)
+		return (err);
+
+	/* Pipe isn't running, start first */
+	return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
+}
+
+Static usbd_status
+ehci_device_ctrl_start(usbd_xfer_handle xfer)
+{
+	ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
+	usbd_status err;
+
+	if (sc->sc_dying)
+		return (USBD_IOERROR);
+
+#ifdef DIAGNOSTIC
+	if (!(xfer->rqflags & URQ_REQUEST)) {
+		/* XXX panic */
+		printf("ehci_device_ctrl_transfer: not a request\n");
+		return (USBD_INVAL);
+	}
+#endif
+
+	err = ehci_device_request(xfer);
+	if (err)
+		return (err);
+
+	if (sc->sc_bus.use_polling)
+		ehci_waitintr(sc, xfer);
+	return (USBD_IN_PROGRESS);
+}
+
+void
+ehci_device_ctrl_done(usbd_xfer_handle xfer)
+{
+	struct ehci_xfer *ex = EXFER(xfer);
+	ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
+	/*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
+
+	DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer));
+
+#ifdef DIAGNOSTIC
+	if (!(xfer->rqflags & URQ_REQUEST)) {
+		panic("ehci_ctrl_done: not a request");
+	}
+#endif
+
+	if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
+		ehci_del_intr_list(ex);	/* remove from active list */
+		ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
+	}
+
+	DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen));
+}
+
+/* Abort a device control request. */
+Static void
+ehci_device_ctrl_abort(usbd_xfer_handle xfer)
+{
+	DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer));
+	ehci_abort_xfer(xfer, USBD_CANCELLED);
+}
+
+/* Close a device control pipe. */
+Static void
+ehci_device_ctrl_close(usbd_pipe_handle pipe)
+{
+	ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
+	/*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/
+
+	DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe));
+	ehci_close_pipe(pipe, sc->sc_async_head);
+}
+
+usbd_status
+ehci_device_request(usbd_xfer_handle xfer)
+{
+#define exfer EXFER(xfer)
+	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
+	usb_device_request_t *req = &xfer->request;
+	usbd_device_handle dev = epipe->pipe.device;
+	ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
+	int addr = dev->address;
+	ehci_soft_qtd_t *setup, *stat, *next;
+	ehci_soft_qh_t *sqh;
+	int isread;
+	int len;
+	usbd_status err;
+	int s;
+
+	isread = req->bmRequestType & UT_READ;
+	len = UGETW(req->wLength);
+
+	DPRINTFN(3,("ehci_device_control type=0x%02x, request=0x%02x, "
+		    "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
+		    req->bmRequestType, req->bRequest, UGETW(req->wValue),
+		    UGETW(req->wIndex), len, addr,
+		    epipe->pipe.endpoint->edesc->bEndpointAddress));
+
+	setup = ehci_alloc_sqtd(sc);
+	if (setup == NULL) {
+		err = USBD_NOMEM;
+		goto bad1;
+	}
+	stat = ehci_alloc_sqtd(sc);
+	if (stat == NULL) {
+		err = USBD_NOMEM;
+		goto bad2;
+	}
+
+	sqh = epipe->sqh;
+	epipe->u.ctl.length = len;
+
+	/* XXX
+	 * Since we're messing with the QH we must know the HC is in sync.
+	 * This needs to go away since it slows down control transfers.
+	 * Removing it entails:
+	 *  - fill the QH only once with addr & wMaxPacketSize
+	 *  - put the correct data toggles in the qtds and set DTC
+	 */
+	/* ehci_sync_hc(sc); */
+	/* Update device address and length since they may have changed. */
+	/* XXX This only needs to be done once, but it's too early in open. */
+	/* XXXX Should not touch ED here! */
+	sqh->qh.qh_endp =
+	    (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QG_MPLMASK))) |
+	    htole32(
+	     EHCI_QH_SET_ADDR(addr) |
+	     /* EHCI_QH_DTC | */
+	     EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize))
+	    );
+	/* Clear toggle */
+	sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE);
+
+	/* Set up data transaction */
+	if (len != 0) {
+		ehci_soft_qtd_t *end;
+
+		err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
+			  &next, &end);
+		if (err)
+			goto bad3;
+		end->nextqtd = stat;
+		end->qtd.qtd_next =
+		end->qtd.qtd_altnext = htole32(stat->physaddr);
+		/* Start toggle at 1. */
+		/*next->qtd.td_flags |= htole32(EHCI_QTD_TOGGLE);*/
+	} else {
+		next = stat;
+	}
+
+	memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req);
+
+	setup->qtd.qtd_status = htole32(
+	    EHCI_QTD_ACTIVE |
+	    EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) |
+	    EHCI_QTD_SET_CERR(3) |
+	    EHCI_QTD_SET_BYTES(sizeof *req)
+	    );
+	setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0));
+	setup->qtd.qtd_buffer_hi[0] = 0;
+	setup->nextqtd = next;
+	setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr);
+	setup->xfer = xfer;
+	setup->len = sizeof *req;
+
+	stat->qtd.qtd_status = htole32(
+	    EHCI_QTD_ACTIVE |
+	    EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) |
+	    EHCI_QTD_SET_CERR(3) |
+	    EHCI_QTD_IOC
+	    );
+	stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */
+	stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */
+	stat->nextqtd = NULL;
+	stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL;
+	stat->xfer = xfer;
+	stat->len = 0;
+
+#ifdef EHCI_DEBUG
+	if (ehcidebug > 5) {
+		DPRINTF(("ehci_device_request:\n"));
+		ehci_dump_sqh(sqh);
+		ehci_dump_sqtds(setup);
+	}
+#endif
+
+	exfer->sqtdstart = setup;
+	exfer->sqtdend = stat;
+#ifdef DIAGNOSTIC
+	if (!exfer->isdone) {
+		printf("ehci_device_request: not done, exfer=%p\n", exfer);
+	}
+	exfer->isdone = 0;
+#endif
+
+	/* Insert qTD in QH list. */
+	s = splusb();
+	ehci_set_qh_qtd(sqh, setup);
+	if (xfer->timeout && !sc->sc_bus.use_polling) {
+                usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
+			    ehci_timeout, xfer);
+	}
+	ehci_add_intr_list(sc, exfer);
+	xfer->status = USBD_IN_PROGRESS;
+	splx(s);
+
+#ifdef EHCI_DEBUG
+	if (ehcidebug > 10) {
+		DPRINTF(("ehci_device_request: status=%x\n",
+			 EOREAD4(sc, EHCI_USBSTS)));
+		delay(10000);
+		ehci_dump_regs(sc);
+		ehci_dump_sqh(sc->sc_async_head);
+		ehci_dump_sqh(sqh);
+		ehci_dump_sqtds(setup);
+	}
+#endif
+
+	return (USBD_NORMAL_COMPLETION);
+
+ bad3:
+	ehci_free_sqtd(sc, stat);
+ bad2:
+	ehci_free_sqtd(sc, setup);
+ bad1:
+	DPRINTFN(-1,("ehci_device_request: no memory\n"));
+	xfer->status = err;
+	usb_transfer_complete(xfer);
+	return (err);
+#undef exfer
+}
+
+/************************/
+
+Static usbd_status
+ehci_device_bulk_transfer(usbd_xfer_handle xfer)
+{
+	usbd_status err;
+
+	/* Insert last in queue. */
+	err = usb_insert_transfer(xfer);
+	if (err)
+		return (err);
+
+	/* Pipe isn't running, start first */
+	return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
+}
+
+usbd_status
+ehci_device_bulk_start(usbd_xfer_handle xfer)
+{
+#define exfer EXFER(xfer)
+	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
+	usbd_device_handle dev = epipe->pipe.device;
+	ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
+	ehci_soft_qtd_t *data, *dataend;
+	ehci_soft_qh_t *sqh;
+	usbd_status err;
+	int len, isread, endpt;
+	int s;
+
+	DPRINTFN(2, ("ehci_device_bulk_transfer: xfer=%p len=%d flags=%d\n",
+		     xfer, xfer->length, xfer->flags));
+
+	if (sc->sc_dying)
+		return (USBD_IOERROR);
+
+#ifdef DIAGNOSTIC
+	if (xfer->rqflags & URQ_REQUEST)
+		panic("ehci_device_bulk_transfer: a request");
+#endif
+
+	len = xfer->length;
+	endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
+	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
+	sqh = epipe->sqh;
+
+	epipe->u.bulk.length = len;
+
+	err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
+				   &dataend);
+	if (err) {
+		DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n"));
+		xfer->status = err;
+		usb_transfer_complete(xfer);
+		return (err);
+	}
+
+#ifdef EHCI_DEBUG
+	if (ehcidebug > 5) {
+		DPRINTF(("ehci_device_bulk_transfer: data(1)\n"));
+		ehci_dump_sqh(sqh);
+		ehci_dump_sqtds(data);
+	}
+#endif
+
+	/* Set up interrupt info. */
+	exfer->sqtdstart = data;
+	exfer->sqtdend = dataend;
+#ifdef DIAGNOSTIC
+	if (!exfer->isdone) {
+		printf("ehci_device_bulk_transfer: not done, ex=%p\n", exfer);
+	}
+	exfer->isdone = 0;
+#endif
+
+	s = splusb();
+	ehci_set_qh_qtd(sqh, data);
+	if (xfer->timeout && !sc->sc_bus.use_polling) {
+		usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
+			    ehci_timeout, xfer);
+	}
+	ehci_add_intr_list(sc, exfer);
+	xfer->status = USBD_IN_PROGRESS;
+	splx(s);
+
+#ifdef EHCI_DEBUG
+	if (ehcidebug > 10) {
+		DPRINTF(("ehci_device_bulk_transfer: data(2)\n"));
+		delay(10000);
+		DPRINTF(("ehci_device_bulk_transfer: data(3)\n"));
+		ehci_dump_regs(sc);
+#if 0
+		printf("async_head:\n");
+		ehci_dump_sqh(sc->sc_async_head);
+#endif
+		printf("sqh:\n");
+		ehci_dump_sqh(sqh);
+		ehci_dump_sqtds(data);
+	}
+#endif
+
+	if (sc->sc_bus.use_polling)
+		ehci_waitintr(sc, xfer);
+
+	return (USBD_IN_PROGRESS);
+#undef exfer
+}
+
+Static void
+ehci_device_bulk_abort(usbd_xfer_handle xfer)
+{
+	DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer));
+	ehci_abort_xfer(xfer, USBD_CANCELLED);
+}
+
+/*
+ * Close a device bulk pipe.
+ */
+Static void
+ehci_device_bulk_close(usbd_pipe_handle pipe)
+{
+	ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
+
+	DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe));
+	ehci_close_pipe(pipe, sc->sc_async_head);
+}
+
+void
+ehci_device_bulk_done(usbd_xfer_handle xfer)
+{
+	struct ehci_xfer *ex = EXFER(xfer);
+	ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
+	/*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
+
+	DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n",
+		     xfer, xfer->actlen));
+
+	if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
+		ehci_del_intr_list(ex);	/* remove from active list */
+		ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
+	}
+
+	DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen));
+}
+
+/************************/
+
+Static usbd_status	ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
+Static usbd_status	ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
+Static void		ehci_device_intr_abort(usbd_xfer_handle xfer) { }
+Static void		ehci_device_intr_close(usbd_pipe_handle pipe) { }
+Static void		ehci_device_intr_done(usbd_xfer_handle xfer) { }
+
+/************************/
+
+Static usbd_status	ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
+Static usbd_status	ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
+Static void		ehci_device_isoc_abort(usbd_xfer_handle xfer) { }
+Static void		ehci_device_isoc_close(usbd_pipe_handle pipe) { }
+Static void		ehci_device_isoc_done(usbd_xfer_handle xfer) { }
diff --git a/sys/dev/usb/ehcireg.h b/sys/dev/usb/ehcireg.h
new file mode 100644
index 00000000000..e06b3b07294
--- /dev/null
+++ b/sys/dev/usb/ehcireg.h
@@ -0,0 +1,288 @@
+/*	$NetBSD: ehcireg.h,v 1.14 2003/10/13 00:05:10 enami Exp $	*/
+
+/*
+ * Copyright (c) 2001 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Lennart Augustsson (lennart@augustsson.net).
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *        This product includes software developed by the NetBSD
+ *        Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * The EHCI 0.96 spec can be found at
+ * http://developer.intel.com/technology/usb/download/ehci-r096.pdf
+ * and the USB 2.0 spec at
+ * http://www.usb.org/developers/data/usb_20.zip
+ */
+
+#ifndef _DEV_PCI_EHCIREG_H_
+#define _DEV_PCI_EHCIREG_H_
+
+/*** PCI config registers ***/
+
+#define PCI_CBMEM		0x10	/* configuration base MEM */
+
+#define PCI_INTERFACE_EHCI	0x20
+
+#define PCI_USBREV		0x60	/* RO USB protocol revision */
+#define  PCI_USBREV_MASK	0xff
+#define  PCI_USBREV_PRE_1_0	0x00
+#define  PCI_USBREV_1_0		0x10
+#define  PCI_USBREV_1_1		0x11
+#define  PCI_USBREV_2_0		0x20
+
+#define PCI_EHCI_FLADJ		0x61	/*RW Frame len adj, SOF=59488+6*fladj */
+
+#define PCI_EHCI_PORTWAKECAP	0x62	/* RW Port wake caps (opt)  */
+
+/* Regs ar EECP + offset */
+#define PCI_EHCI_USBLEGSUP	0x00
+#define PCI_EHCI_USBLEGCTLSTS	0x04
+
+/*** EHCI capability registers ***/
+
+#define EHCI_CAPLENGTH		0x00	/*RO Capability register length field */
+/* reserved			0x01 */
+#define EHCI_HCIVERSION		0x02	/* RO Interface version number */
+
+#define EHCI_HCSPARAMS		0x04	/* RO Structural parameters */
+#define  EHCI_HCS_DEBUGPORT(x)	(((x) >> 20) & 0xf)
+#define  EHCI_HCS_P_INCICATOR(x) ((x) & 0x10000)
+#define  EHCI_HCS_N_CC(x)	(((x) >> 12) & 0xf) /* # of companion ctlrs */
+#define  EHCI_HCS_N_PCC(x)	(((x) >> 8) & 0xf) /* # of ports per comp. */
+#define  EHCI_HCS_PPC(x)	((x) & 0x10) /* port power control */
+#define  EHCI_HCS_N_PORTS(x)	((x) & 0xf) /* # of ports */
+
+#define EHCI_HCCPARAMS		0x08	/* RO Capability parameters */
+#define  EHCI_HCC_EECP(x)	(((x) >> 8) & 0xff) /* extended ports caps */
+#define  EHCI_HCC_IST(x)	(((x) >> 4) & 0xf) /* isoc sched threshold */
+#define  EHCI_HCC_ASPC(x)	((x) & 0x4) /* async sched park cap */
+#define  EHCI_HCC_PFLF(x)	((x) & 0x2) /* prog frame list flag */
+#define  EHCI_HCC_64BIT(x)	((x) & 0x1) /* 64 bit address cap */
+
+#define EHCI_HCSP_PORTROUTE	0x0c	/*RO Companion port route description */
+
+/* EHCI operational registers.  Offset given by EHCI_CAPLENGTH register */
+#define EHCI_USBCMD		0x00	/* RO, RW, WO Command register */
+#define  EHCI_CMD_ITC_M		0x00ff0000 /* RW interrupt threshold ctrl */
+#define   EHCI_CMD_ITC_1	0x00010000
+#define   EHCI_CMD_ITC_2	0x00020000
+#define   EHCI_CMD_ITC_4	0x00040000
+#define   EHCI_CMD_ITC_8	0x00080000
+#define   EHCI_CMD_ITC_16	0x00100000
+#define   EHCI_CMD_ITC_32	0x00200000
+#define   EHCI_CMD_ITC_64	0x00400000
+#define  EHCI_CMD_ASPME		0x00000800 /* RW/RO async park enable */
+#define  EHCI_CMD_ASPMC		0x00000300 /* RW/RO async park count */
+#define  EHCI_CMD_LHCR		0x00000080 /* RW light host ctrl reset */
+#define  EHCI_CMD_IAAD		0x00000040 /* RW intr on async adv door bell */
+#define  EHCI_CMD_ASE		0x00000020 /* RW async sched enable */
+#define  EHCI_CMD_PSE		0x00000010 /* RW periodic sched enable */
+#define  EHCI_CMD_FLS_M		0x0000000c /* RW/RO frame list size */
+#define  EHCI_CMD_FLS(x)	(((x) >> 2) & 3) /* RW/RO frame list size */
+#define  EHCI_CMD_HCRESET	0x00000002 /* RW reset */
+#define  EHCI_CMD_RS		0x00000001 /* RW run/stop */
+
+#define EHCI_USBSTS		0x04	/* RO, RW, RWC Status register */
+#define  EHCI_STS_ASS		0x00008000 /* RO async sched status */
+#define  EHCI_STS_PSS		0x00004000 /* RO periodic sched status */
+#define  EHCI_STS_REC		0x00002000 /* RO reclamation */
+#define  EHCI_STS_HCH		0x00001000 /* RO host controller halted */
+#define  EHCI_STS_IAA		0x00000020 /* RWC interrupt on async adv */
+#define  EHCI_STS_HSE		0x00000010 /* RWC host system error */
+#define  EHCI_STS_FLR		0x00000008 /* RWC frame list rollover */
+#define  EHCI_STS_PCD		0x00000004 /* RWC port change detect */
+#define  EHCI_STS_ERRINT	0x00000002 /* RWC error interrupt */
+#define  EHCI_STS_INT		0x00000001 /* RWC interrupt */
+#define  EHCI_STS_INTRS(x)	((x) & 0x3f)
+
+#define EHCI_NORMAL_INTRS (EHCI_STS_IAA | EHCI_STS_HSE | EHCI_STS_PCD | EHCI_STS_ERRINT | EHCI_STS_INT)
+
+#define EHCI_USBINTR		0x08	/* RW Interrupt register */
+#define EHCI_INTR_IAAE		0x00000020 /* interrupt on async advance ena */
+#define EHCI_INTR_HSEE		0x00000010 /* host system error ena */
+#define EHCI_INTR_FLRE		0x00000008 /* frame list rollover ena */
+#define EHCI_INTR_PCIE		0x00000004 /* port change ena */
+#define EHCI_INTR_UEIE		0x00000002 /* USB error intr ena */
+#define EHCI_INTR_UIE		0x00000001 /* USB intr ena */
+
+#define EHCI_FRINDEX		0x0c	/* RW Frame Index register */
+
+#define EHCI_CTRLDSSEGMENT	0x10	/* RW Control Data Structure Segment */
+
+#define EHCI_PERIODICLISTBASE	0x14	/* RW Periodic List Base */
+#define EHCI_ASYNCLISTADDR	0x18	/* RW Async List Base */
+
+#define EHCI_CONFIGFLAG		0x40	/* RW Configure Flag register */
+#define  EHCI_CONF_CF		0x00000001 /* RW configure flag */
+
+#define EHCI_PORTSC(n)		(0x40+4*(n)) /* RO, RW, RWC Port Status reg */
+#define  EHCI_PS_WKOC_E		0x00400000 /* RW wake on over current ena */
+#define  EHCI_PS_WKDSCNNT_E	0x00200000 /* RW wake on disconnect ena */
+#define  EHCI_PS_WKCNNT_E	0x00100000 /* RW wake on connect ena */
+#define  EHCI_PS_PTC		0x000f0000 /* RW port test control */
+#define  EHCI_PS_PIC		0x0000c000 /* RW port indicator control */
+#define  EHCI_PS_PO		0x00002000 /* RW port owner */
+#define  EHCI_PS_PP		0x00001000 /* RW,RO port power */
+#define  EHCI_PS_LS		0x00000c00 /* RO line status */
+#define  EHCI_PS_IS_LOWSPEED(x)	(((x) & EHCI_PS_LS) == 0x00000400)
+#define  EHCI_PS_PR		0x00000100 /* RW port reset */
+#define  EHCI_PS_SUSP		0x00000080 /* RW suspend */
+#define  EHCI_PS_FPR		0x00000040 /* RW force port resume */
+#define  EHCI_PS_OCC		0x00000020 /* RWC over current change */
+#define  EHCI_PS_OCA		0x00000010 /* RO over current active */
+#define  EHCI_PS_PEC		0x00000008 /* RWC port enable change */
+#define  EHCI_PS_PE		0x00000004 /* RW port enable */
+#define  EHCI_PS_CSC		0x00000002 /* RWC connect status change */
+#define  EHCI_PS_CS		0x00000001 /* RO connect status */
+#define  EHCI_PS_CLEAR		(EHCI_PS_OCC|EHCI_PS_PEC|EHCI_PS_CSC)
+
+#define EHCI_PORT_RESET_COMPLETE 2 /* ms */
+
+#define EHCI_FLALIGN_ALIGN	0x1000
+
+/* No data structure may cross a page boundary. */
+#define EHCI_PAGE_SIZE 0x1000
+#define EHCI_PAGE(x) ((x) &~ 0xfff)
+#define EHCI_PAGE_OFFSET(x) ((x) & 0xfff)
+
+typedef u_int32_t ehci_link_t;
+#define EHCI_LINK_TERMINATE	0x00000001
+#define EHCI_LINK_TYPE(x)	((x) & 0x00000006)
+#define  EHCI_LINK_ITD		0x0
+#define  EHCI_LINK_QH		0x2
+#define  EHCI_LINK_SITD		0x4
+#define  EHCI_LINK_FSTN		0x6
+#define EHCI_LINK_ADDR(x)	((x) &~ 0x1f)
+
+typedef u_int32_t ehci_physaddr_t;
+
+/* Isochronous Transfer Descriptor */
+typedef struct {
+	ehci_link_t	itd_next;
+	/* XXX many more */
+} ehci_itd_t;
+#define EHCI_ITD_ALIGN 32
+
+/* Split Transaction Isochronous Transfer Descriptor */
+typedef struct {
+	ehci_link_t	sitd_next;
+	/* XXX many more */
+} ehci_sitd_t;
+#define EHCI_SITD_ALIGN 32
+
+/* Queue Element Transfer Descriptor */
+#define EHCI_QTD_NBUFFERS 5
+typedef struct {
+	ehci_link_t	qtd_next;
+	ehci_link_t	qtd_altnext;
+	u_int32_t	qtd_status;
+#define EHCI_QTD_GET_STATUS(x)	(((x) >>  0) & 0xff)
+#define  EHCI_QTD_ACTIVE	0x80
+#define  EHCI_QTD_HALTED	0x40
+#define  EHCI_QTD_BUFERR	0x20
+#define  EHCI_QTD_BABBLE	0x10
+#define  EHCI_QTD_XACTERR	0x08
+#define  EHCI_QTD_MISSEDMICRO	0x04
+#define  EHCI_QTD_SPLITXSTATE	0x02
+#define  EHCI_QTD_PINGSTATE	0x01
+#define  EHCI_QTD_STATERRS	0x7c
+#define EHCI_QTD_GET_PID(x)	(((x) >>  8) & 0x3)
+#define EHCI_QTD_SET_PID(x)	((x) <<  8)
+#define  EHCI_QTD_PID_OUT	0x0
+#define  EHCI_QTD_PID_IN	0x1
+#define  EHCI_QTD_PID_SETUP	0x2
+#define EHCI_QTD_GET_CERR(x)	(((x) >> 10) &  0x3)
+#define EHCI_QTD_SET_CERR(x)	((x) << 10)
+#define EHCI_QTD_GET_C_PAGE(x)	(((x) >> 12) &  0x7)
+#define EHCI_QTD_SET_C_PAGE(x)	((x) << 12)
+#define EHCI_QTD_GET_IOC(x)	(((x) >> 15) &  0x1)
+#define EHCI_QTD_IOC		0x00008000
+#define EHCI_QTD_GET_BYTES(x)	(((x) >> 16) &  0x7fff)
+#define EHCI_QTD_SET_BYTES(x)	((x) << 16)
+#define EHCI_QTD_GET_TOGGLE(x)	(((x) >> 31) &  0x1)
+#define EHCI_QTD_TOGGLE		0x80000000
+	ehci_physaddr_t	qtd_buffer[EHCI_QTD_NBUFFERS];
+	ehci_physaddr_t qtd_buffer_hi[EHCI_QTD_NBUFFERS];
+} ehci_qtd_t;
+#define EHCI_QTD_ALIGN 32
+
+/* Queue Head */
+typedef struct {
+	ehci_link_t	qh_link;
+	u_int32_t	qh_endp;
+#define EHCI_QH_GET_ADDR(x)	(((x) >>  0) & 0x7f) /* endpoint addr */
+#define EHCI_QH_SET_ADDR(x)	(x)
+#define EHCI_QH_ADDRMASK	0x0000007f
+#define EHCI_QH_GET_INACT(x)	(((x) >>  7) & 0x01) /* inactivate on next */
+#define EHCI_QH_INACT		0x00000080
+#define EHCI_QH_GET_ENDPT(x)	(((x) >>  8) & 0x0f) /* endpoint no */
+#define EHCI_QH_SET_ENDPT(x)	((x) <<  8)
+#define EHCI_QH_GET_EPS(x)	(((x) >> 12) & 0x03) /* endpoint speed */
+#define EHCI_QH_SET_EPS(x)	((x) << 12)
+#define  EHCI_QH_SPEED_FULL	0x0
+#define  EHCI_QH_SPEED_LOW	0x1
+#define  EHCI_QH_SPEED_HIGH	0x2
+#define EHCI_QH_GET_DTC(x)	(((x) >> 14) & 0x01) /* data toggle control */
+#define EHCI_QH_DTC		0x00004000
+#define EHCI_QH_GET_HRECL(x)	(((x) >> 15) & 0x01) /* head of reclamation */
+#define EHCI_QH_HRECL		0x00008000
+#define EHCI_QH_GET_MPL(x)	(((x) >> 16) & 0x7ff) /* max packet len */
+#define EHCI_QH_SET_MPL(x)	((x) << 16)
+#define EHCI_QG_MPLMASK		0x07ff0000
+#define EHCI_QH_GET_CTL(x)	(((x) >> 26) & 0x01) /* control endpoint */
+#define EHCI_QH_CTL		0x08000000
+#define EHCI_QH_GET_NRL(x)	(((x) >> 28) & 0x0f) /* NAK reload */
+#define EHCI_QH_SET_NRL(x)	((x) << 28)
+	u_int32_t	qh_endphub;
+#define EHCI_QH_GET_SMASK(x)	(((x) >>  0) & 0xff) /* intr sched mask */
+#define EHCI_QH_SET_SMASK(x)	((x) <<  0)
+#define EHCI_QH_GET_CMASK(x)	(((x) >>  8) & 0xff) /* split completion mask */
+#define EHCI_QH_SET_CMASK(x)	((x) <<  8)
+#define EHCI_QH_GET_HUBA(x)	(((x) >> 16) & 0x7f) /* hub address */
+#define EHCI_QH_SET_HUBA(x)	((x) << 16)
+#define EHCI_QH_GET_PORT(x)	(((x) >> 23) & 0x7f) /* hub port */
+#define EHCI_QH_SET_PORT(x)	((x) << 23)
+#define EHCI_QH_GET_MULT(x)	(((x) >> 30) & 0x03) /* pipe multiplier */
+#define EHCI_QH_SET_MULT(x)	((x) << 30)
+	ehci_link_t	qh_curqtd;
+	ehci_qtd_t	qh_qtd;
+} ehci_qh_t;
+#define EHCI_QH_ALIGN 32
+
+/* Periodic Frame Span Traversal Node */
+typedef struct {
+	ehci_link_t	fstn_link;
+	ehci_link_t	fstn_back;
+} ehci_fstn_t;
+#define EHCI_FSTN_ALIGN 32
+
+#endif /* _DEV_PCI_EHCIREG_H_ */
diff --git a/sys/dev/usb/ehcivar.h b/sys/dev/usb/ehcivar.h
new file mode 100644
index 00000000000..dac4448d476
--- /dev/null
+++ b/sys/dev/usb/ehcivar.h
@@ -0,0 +1,137 @@
+/*	$NetBSD: ehcivar.h,v 1.12 2001/12/31 12:16:57 augustss Exp $	*/
+
+/*
+ * Copyright (c) 2001 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Lennart Augustsson (lennart@augustsson.net).
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *        This product includes software developed by the NetBSD
+ *        Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+typedef struct ehci_soft_qtd {
+	ehci_qtd_t qtd;
+	struct ehci_soft_qtd *nextqtd; /* mirrors nextqtd in TD */
+	ehci_physaddr_t physaddr;
+	usbd_xfer_handle xfer;
+	LIST_ENTRY(ehci_soft_qtd) hnext;
+	u_int16_t len;
+} ehci_soft_qtd_t;
+#define EHCI_SQTD_SIZE ((sizeof (struct ehci_soft_qtd) + EHCI_QTD_ALIGN - 1) / EHCI_QTD_ALIGN * EHCI_QTD_ALIGN)
+#define EHCI_SQTD_CHUNK (EHCI_PAGE_SIZE / EHCI_SQTD_SIZE)
+
+typedef struct ehci_soft_qh {
+	ehci_qh_t qh;
+	struct ehci_soft_qh *next;
+	struct ehci_soft_qtd *sqtd;
+	ehci_physaddr_t physaddr;
+} ehci_soft_qh_t;
+#define EHCI_SQH_SIZE ((sizeof (struct ehci_soft_qh) + EHCI_QH_ALIGN - 1) / EHCI_QH_ALIGN * EHCI_QH_ALIGN)
+#define EHCI_SQH_CHUNK (EHCI_PAGE_SIZE / EHCI_SQH_SIZE)
+
+struct ehci_xfer {
+	struct usbd_xfer xfer;
+	struct usb_task	abort_task;
+	LIST_ENTRY(ehci_xfer) inext; /* list of active xfers */
+	ehci_soft_qtd_t *sqtdstart;
+	ehci_soft_qtd_t *sqtdend;
+#ifdef DIAGNOSTIC
+	int isdone;
+#endif
+};
+#define EXFER(xfer) ((struct ehci_xfer *)(xfer))
+
+
+#define EHCI_HASH_SIZE 128
+#define EHCI_COMPANION_MAX 8
+
+typedef struct ehci_softc {
+	struct usbd_bus sc_bus;		/* base device */
+	bus_space_tag_t iot;
+	bus_space_handle_t ioh;
+	bus_size_t sc_size;
+	u_int sc_offs;			/* offset to operational regs */
+
+	char sc_vendor[16];		/* vendor string for root hub */
+	int sc_id_vendor;		/* vendor ID for root hub */
+
+	void *sc_powerhook;		/* cookie from power hook */
+	void *sc_shutdownhook;		/* cookie from shutdown hook */
+
+	u_int sc_ncomp;
+	u_int sc_npcomp;
+	struct usbd_bus *sc_comps[EHCI_COMPANION_MAX];
+
+	usb_dma_t sc_fldma;
+	u_int sc_flsize;
+
+	LIST_HEAD(, ehci_xfer) sc_intrhead;
+
+	ehci_soft_qh_t *sc_freeqhs;
+	ehci_soft_qtd_t *sc_freeqtds;
+
+	int sc_noport;
+	u_int8_t sc_addr;		/* device address */
+	u_int8_t sc_conf;		/* device configuration */
+	usbd_xfer_handle sc_intrxfer;
+	char sc_isreset;
+	char sc_softwake;
+
+	u_int32_t sc_eintrs;
+	ehci_soft_qh_t *sc_async_head;
+
+	SIMPLEQ_HEAD(, usbd_xfer) sc_free_xfers; /* free xfers */
+
+	struct lock sc_doorbell_lock;
+
+	usb_callout_t sc_tmo_pcd;
+
+	device_ptr_t sc_child;		/* /dev/usb# device */
+
+	char sc_dying;
+} ehci_softc_t;
+
+#define EREAD1(sc, a) bus_space_read_1((sc)->iot, (sc)->ioh, (a))
+#define EREAD2(sc, a) bus_space_read_2((sc)->iot, (sc)->ioh, (a))
+#define EREAD4(sc, a) bus_space_read_4((sc)->iot, (sc)->ioh, (a))
+#define EWRITE1(sc, a, x) bus_space_write_1((sc)->iot, (sc)->ioh, (a), (x))
+#define EWRITE2(sc, a, x) bus_space_write_2((sc)->iot, (sc)->ioh, (a), (x))
+#define EWRITE4(sc, a, x) bus_space_write_4((sc)->iot, (sc)->ioh, (a), (x))
+#define EOREAD1(sc, a) bus_space_read_1((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a))
+#define EOREAD2(sc, a) bus_space_read_2((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a))
+#define EOREAD4(sc, a) bus_space_read_4((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a))
+#define EOWRITE1(sc, a, x) bus_space_write_1((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a), (x))
+#define EOWRITE2(sc, a, x) bus_space_write_2((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a), (x))
+#define EOWRITE4(sc, a, x) bus_space_write_4((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a), (x))
+
+usbd_status	ehci_init(ehci_softc_t *);
+int		ehci_intr(void *);
+int		ehci_detach(ehci_softc_t *, int);
+int		ehci_activate(device_ptr_t, enum devact);