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authorMark Kettenis <kettenis@cvs.openbsd.org>2019-08-06 06:56:30 +0000
committerMark Kettenis <kettenis@cvs.openbsd.org>2019-08-06 06:56:30 +0000
commitab31e00b3249546be36fbd66f2be5ddc9ea0ab66 (patch)
tree7c10c8b0f3caee6d3399fd7862e06bca3a3b65b1 /sys/dev
parent21e018dd1b35b1a125508d175c9d88d09329c8a4 (diff)
Read the fifo depths from the appropriate configuration register and
update the values if they are non-zero and smaller than the current hardcoded depths. Fixes dwiic(4) on Ampere eMAG. ok patrick@, jcs@
Diffstat (limited to 'sys/dev')
-rw-r--r--sys/dev/ic/dwiic.c12
-rw-r--r--sys/dev/ic/dwiicreg.h4
2 files changed, 14 insertions, 2 deletions
diff --git a/sys/dev/ic/dwiic.c b/sys/dev/ic/dwiic.c
index 89489a909eb..80b598f08ce 100644
--- a/sys/dev/ic/dwiic.c
+++ b/sys/dev/ic/dwiic.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: dwiic.c,v 1.5 2019/07/16 19:12:32 jcs Exp $ */
+/* $OpenBSD: dwiic.c,v 1.6 2019/08/06 06:56:29 kettenis Exp $ */
/*
* Synopsys DesignWare I2C controller
*
@@ -128,6 +128,8 @@ int
dwiic_init(struct dwiic_softc *sc)
{
uint32_t reg;
+ uint8_t tx_fifo_depth;
+ uint8_t rx_fifo_depth;
/* make sure we're talking to a device we know */
reg = dwiic_read(sc, DW_IC_COMP_TYPE);
@@ -168,6 +170,14 @@ dwiic_init(struct dwiic_softc *sc)
/* FIFO threshold levels */
sc->tx_fifo_depth = 32;
sc->rx_fifo_depth = 32;
+ reg = dwiic_read(sc, DW_IC_COMP_PARAM_1);
+ tx_fifo_depth = DW_IC_TX_FIFO_DEPTH(reg);
+ rx_fifo_depth = DW_IC_RX_FIFO_DEPTH(reg);
+ if (tx_fifo_depth > 1 && tx_fifo_depth < sc->tx_fifo_depth)
+ sc->tx_fifo_depth = tx_fifo_depth;
+ if (rx_fifo_depth > 1 && rx_fifo_depth < sc->rx_fifo_depth)
+ sc->rx_fifo_depth = rx_fifo_depth;
+
dwiic_write(sc, DW_IC_TX_TL, sc->tx_fifo_depth / 2);
dwiic_write(sc, DW_IC_RX_TL, 0);
diff --git a/sys/dev/ic/dwiicreg.h b/sys/dev/ic/dwiicreg.h
index 78b6076cec8..7a031708585 100644
--- a/sys/dev/ic/dwiicreg.h
+++ b/sys/dev/ic/dwiicreg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: dwiicreg.h,v 1.1 2017/11/16 18:12:27 jcs Exp $ */
+/* $OpenBSD: dwiicreg.h,v 1.2 2019/08/06 06:56:29 kettenis Exp $ */
/*
* Synopsys DesignWare I2C controller
*
@@ -49,6 +49,8 @@
#define DW_IC_TX_ABRT_SOURCE 0x80
#define DW_IC_ENABLE_STATUS 0x9c
#define DW_IC_COMP_PARAM_1 0xf4
+#define DW_IC_TX_FIFO_DEPTH(x) ((((x) >> 16) & 0xff) + 1)
+#define DW_IC_RX_FIFO_DEPTH(x) ((((x) >> 8) & 0xff) + 1)
#define DW_IC_COMP_VERSION 0xf8
#define DW_IC_SDA_HOLD_MIN_VERS 0x3131312A
#define DW_IC_COMP_TYPE 0xfc