Typo police:

Replace last ADV/ASC/Adv, etc. uses with ADW/Adw as appropriate.

Delete comments about non-existant structure members,
correct references to existing structure members to use
correct structure names or typedefs.

4 files changed, 103 insertions, 106 deletions

diff --git a/sys/dev/ic/adw.c b/sys/dev/ic/adw.c
index 5ddd1f3c55a..ad12878b3ac 100644
--- a/sys/dev/ic/adw.c
+++ b/sys/dev/ic/adw.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: adw.c,v 1.15 2001/02/20 00:52:58 krw Exp $ */
+/*	$OpenBSD: adw.c,v 1.16 2001/02/22 17:17:32 krw Exp $ */
 /* $NetBSD: adw.c,v 1.23 2000/05/27 18:24:50 dante Exp $	 */
 
 /*
@@ -1169,7 +1169,7 @@ adw_print_info(sc, tid)
 /*
  * adw_isr_callback() - Second Level Interrupt Handler called by AdwISR()
  *
- * Interrupt callback function for the Wide SCSI Adv Library.
+ * Interrupt callback function for the Wide SCSI Adw Library.
  *
  * Notice:
  * Interrupts are disabled by the caller (AdwISR() function), and will be
@@ -1360,7 +1360,7 @@ NO_ERROR:
 
 
 /*
- * adw_async_callback() - Adv Library asynchronous event callback function.
+ * adw_async_callback() - Adw Library asynchronous event callback function.
  */
 static void
 adw_async_callback(sc, code)
@@ -1368,12 +1368,12 @@ adw_async_callback(sc, code)
 	u_int8_t	code;
 {
 	switch (code) {
-	case ADV_ASYNC_SCSI_BUS_RESET_DET:
+	case ADW_ASYNC_SCSI_BUS_RESET_DET:
 		/* The firmware detected a SCSI Bus reset. */
 		printf("%s: SCSI Bus reset detected\n", sc->sc_dev.dv_xname);
 		break;
 
-	case ADV_ASYNC_RDMA_FAILURE:
+	case ADW_ASYNC_RDMA_FAILURE:
 		/*
 		 * Handle RDMA failure by resetting the SCSI Bus and
 		 * possibly the chip if it is unresponsive.
@@ -1383,14 +1383,14 @@ adw_async_callback(sc, code)
 		adw_reset_bus(sc);
 		break;
 
-	case ADV_HOST_SCSI_BUS_RESET:
+	case ADW_HOST_SCSI_BUS_RESET:
 		/* Host generated SCSI bus reset occurred. */
 		printf("%s: Host generated SCSI bus reset occurred\n",
 				sc->sc_dev.dv_xname);
 		break;
 
 
-	case ADV_ASYNC_CARRIER_READY_FAILURE:
+	case ADW_ASYNC_CARRIER_READY_FAILURE:
 		/* 
 		 * Carrier Ready failure.
 	         *
diff --git a/sys/dev/ic/adwlib.c b/sys/dev/ic/adwlib.c
index 9ce9203cd5c..fd5ee2fd1e7 100644
--- a/sys/dev/ic/adwlib.c
+++ b/sys/dev/ic/adwlib.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: adwlib.c,v 1.11 2000/12/08 00:03:31 krw Exp $ */
+/*	$OpenBSD: adwlib.c,v 1.12 2001/02/22 17:17:32 krw Exp $ */
 /* $NetBSD: adwlib.c,v 1.20 2000/07/04 04:17:03 itojun Exp $        */
 
 /*
@@ -137,11 +137,11 @@ const static ADW_EEPROM adw_3550_Default_EEPROM = {
 	  0,0,0,0,0,0,0,0
 	},
 	0,			/* 30 dvc_err_code */
-	0,			/* 31 adv_err_code */
-	0,			/* 32 adv_err_addr */
+	0,			/* 31 adw_err_code */
+	0,			/* 32 adw_err_addr */
 	0,			/* 33 saved_dvc_err_code */
-	0,			/* 34 saved_adv_err_code */
-	0			/* 35 saved_adv_err_addr */
+	0,			/* 34 saved_adw_err_code */
+	0			/* 35 saved_adw_err_addr */
 };
 
 const static ADW_EEPROM adw_38C0800_Default_EEPROM = {
@@ -174,11 +174,11 @@ const static ADW_EEPROM adw_38C0800_Default_EEPROM = {
 	  0,0,0,0,0,0,0,0
 	},
 	0,			/* 30 dvc_err_code */
-	0,			/* 31 adv_err_code */
-	0,			/* 32 adv_err_addr */
+	0,			/* 31 adw_err_code */
+	0,			/* 32 adw_err_addr */
 	0,			/* 33 saved_dvc_err_code */
-	0,			/* 34 saved_adv_err_code */
-	0,			/* 35 saved_adv_err_addr */
+	0,			/* 34 saved_adw_err_code */
+	0,			/* 35 saved_adw_err_addr */
 	{			/* 36-55 reserved1[16] */
 	  0,0,0,0,0,0,0,0,0,0,
 	  0,0,0,0,0,0,0,0,0,0
@@ -220,11 +220,11 @@ const static ADW_EEPROM adw_38C1600_Default_EEPROM = {
 	  0,0,0,0,0,0,0,0
 	},
 	0,			/* 30 dvc_err_code */
-	0,			/* 31 adv_err_code */
-	0,			/* 32 adv_err_addr */
+	0,			/* 31 adw_err_code */
+	0,			/* 32 adw_err_addr */
 	0,			/* 33 saved_dvc_err_code */
-	0,			/* 34 saved_adv_err_code */
-	0,			/* 35 saved_adv_err_addr */
+	0,			/* 34 saved_adw_err_code */
+	0,			/* 35 saved_adw_err_addr */
 	{			/* 36-55 reserved1[16] */
 	  0,0,0,0,0,0,0,0,0,0,
 	  0,0,0,0,0,0,0,0,0,0
@@ -342,7 +342,7 @@ ADW_SOFTC      *sc;
 		 */
 		for (i=2, j=1; i>=0; i--, j++) {
 		eep_config.serial_number[i] =
-			AdwReadEEPWord(iot, ioh, ASC_EEP_DVC_CFG_END - j);
+			AdwReadEEPWord(iot, ioh, ADW_EEP_DVC_CFG_END - j);
 		}
 
 		AdwSetEEPROMConfig(iot, ioh, &eep_config);
@@ -433,7 +433,7 @@ ADW_SOFTC      *sc;
 	}
 
 	/*
-	 * Set ADV_DVC_VAR 'max_host_qng' and ADV_DVC_VAR 'max_dvc_qng'
+	 * Set ADW_SOFTC 'max_host_qng' and 'max_dvc_qng'
 	 * values based on possibly adjusted EEPROM values.
 	 */
 	sc->max_host_qng = eep_config.max_host_qng;
@@ -442,10 +442,10 @@ ADW_SOFTC      *sc;
 
 	/*
 	 * If the EEPROM 'termination' field is set to automatic (0), then set
-	 * the ADV_DVC_CFG 'termination' field to automatic also.
+	 * the ADW_SOFTC.cfg 'termination' field to automatic also.
 	 *
 	 * If the termination is specified with a non-zero 'termination'
-	 * value check that a legal value is set and set the ADV_DVC_CFG
+	 * value check that a legal value is set and set the ADW_SOFTC.cfg
 	 * 'termination' field appropriately.
 	 */
 
@@ -711,7 +711,7 @@ ADW_SOFTC      *sc;
 
 	/*
 	 * Microcode operating variables for WDTR, SDTR, and command tag
-	 * queuing will be set in AdvInquiryHandling() based on what a
+	 * queuing will be set in AdwInquiryHandling() based on what a
 	 * device reports it is capable of in Inquiry byte 7.
 	 *
 	 * If SCSI Bus Resets have been disabled, then directly set
@@ -846,12 +846,12 @@ ADW_SOFTC      *sc;
 		return ADW_IERR_NO_CARRIER;
 	}
 	sc->carr_freelist = ADW_CARRIER_VADDR(sc,
-			ASC_GET_CARRP(sc->icq_sp->next_ba));
+			ADW_GET_CARRP(sc->icq_sp->next_ba));
 
 	/*
 	 * The first command issued will be placed in the stopper carrier.
 	 */
-	sc->icq_sp->next_ba = ASC_CQ_STOPPER;
+	sc->icq_sp->next_ba = ADW_CQ_STOPPER;
 
 	/*
 	 * Set RISC ICQ physical address start value.
@@ -874,16 +874,16 @@ ADW_SOFTC      *sc;
 		return ADW_IERR_NO_CARRIER;
 	}
 	sc->carr_freelist = ADW_CARRIER_VADDR(sc,
-			ASC_GET_CARRP(sc->irq_sp->next_ba));
+			ADW_GET_CARRP(sc->irq_sp->next_ba));
 
 	/*
 	 * The first command completed by the RISC will be placed in
 	 * the stopper.
 	 *
-	 * Note: Set 'next_ba' to ASC_CQ_STOPPER. When the request is
-	 * completed the RISC will set the ASC_RQ_DONE bit.
+	 * Note: Set 'next_ba' to ADW_CQ_STOPPER. When the request is
+	 * completed the RISC will set the ADW_RQ_DONE bit.
 	 */
-	sc->irq_sp->next_ba = ASC_CQ_STOPPER;
+	sc->irq_sp->next_ba = ADW_CQ_STOPPER;
 
 	/*
 	 * Set RISC IRQ physical address start value.
@@ -1574,8 +1574,8 @@ AdwGetEEPROMConfig(iot, ioh, cfg_buf)
 	wbuf = (u_int16_t *) cfg_buf;
 	chksum = 0;
 
-	for (eep_addr = ASC_EEP_DVC_CFG_BEGIN;
-		eep_addr < ASC_EEP_DVC_CFG_END;
+	for (eep_addr = ADW_EEP_DVC_CFG_BEGIN;
+		eep_addr < ADW_EEP_DVC_CFG_END;
 		eep_addr++, wbuf++) {
 		wval = AdwReadEEPWord(iot, ioh, eep_addr);
 		chksum += wval;
@@ -1584,8 +1584,8 @@ AdwGetEEPROMConfig(iot, ioh, cfg_buf)
 
 	*wbuf = AdwReadEEPWord(iot, ioh, eep_addr);
 	wbuf++;
-	for (eep_addr = ASC_EEP_DVC_CTL_BEGIN;
-			eep_addr < ASC_EEP_MAX_WORD_ADDR;
+	for (eep_addr = ADW_EEP_DVC_CTL_BEGIN;
+			eep_addr < ADW_EEP_MAX_WORD_ADDR;
 			eep_addr++, wbuf++) {
 		*wbuf = AdwReadEEPWord(iot, ioh, eep_addr);
 	}
@@ -1604,7 +1604,7 @@ AdwReadEEPWord(iot, ioh, eep_word_addr)
 	int			eep_word_addr;
 {
 	ADW_WRITE_WORD_REGISTER(iot, ioh, IOPW_EE_CMD,
-		ASC_EEP_CMD_READ | eep_word_addr);
+		ADW_EEP_CMD_READ | eep_word_addr);
 	AdwWaitEEPCmd(iot, ioh);
 
 	return ADW_READ_WORD_REGISTER(iot, ioh, IOPW_EE_DATA);
@@ -1622,9 +1622,9 @@ AdwWaitEEPCmd(iot, ioh)
 	int eep_delay_ms;
 
 
-	for (eep_delay_ms = 0; eep_delay_ms < ASC_EEP_DELAY_MS; eep_delay_ms++){
+	for (eep_delay_ms = 0; eep_delay_ms < ADW_EEP_DELAY_MS; eep_delay_ms++){
 		if (ADW_READ_WORD_REGISTER(iot, ioh, IOPW_EE_CMD) &
-				ASC_EEP_CMD_DONE) {
+				ADW_EEP_CMD_DONE) {
 			break;
 		}
 		AdwSleepMilliSecond(1);
@@ -1650,20 +1650,20 @@ AdwSetEEPROMConfig(iot, ioh, cfg_buf)
 	wbuf = (u_int16_t *) cfg_buf;
 	chksum = 0;
 
-	ADW_WRITE_WORD_REGISTER(iot, ioh, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_ABLE);
+	ADW_WRITE_WORD_REGISTER(iot, ioh, IOPW_EE_CMD, ADW_EEP_CMD_WRITE_ABLE);
 	AdwWaitEEPCmd(iot, ioh);
 
 	/*
 	 * Write EEPROM from word 0 to word 20
 	 */
-	for (addr = ASC_EEP_DVC_CFG_BEGIN;
-	     addr < ASC_EEP_DVC_CFG_END; addr++, wbuf++) {
+	for (addr = ADW_EEP_DVC_CFG_BEGIN;
+	     addr < ADW_EEP_DVC_CFG_END; addr++, wbuf++) {
 		chksum += *wbuf;
 		ADW_WRITE_WORD_REGISTER(iot, ioh, IOPW_EE_DATA, *wbuf);
 		ADW_WRITE_WORD_REGISTER(iot, ioh, IOPW_EE_CMD,
-				ASC_EEP_CMD_WRITE | addr);
+				ADW_EEP_CMD_WRITE | addr);
 		AdwWaitEEPCmd(iot, ioh);
-		AdwSleepMilliSecond(ASC_EEP_DELAY_MS);
+		AdwSleepMilliSecond(ADW_EEP_DELAY_MS);
 	}
 
 	/*
@@ -1671,23 +1671,23 @@ AdwSetEEPROMConfig(iot, ioh, cfg_buf)
 	 */
 	ADW_WRITE_WORD_REGISTER(iot, ioh, IOPW_EE_DATA, chksum);
 	ADW_WRITE_WORD_REGISTER(iot, ioh, IOPW_EE_CMD,
-			ASC_EEP_CMD_WRITE | addr);
+			ADW_EEP_CMD_WRITE | addr);
 	AdwWaitEEPCmd(iot, ioh);
 	wbuf++;        /* skip over check_sum */
 
 	/*
 	 * Write EEPROM OEM name at words 22 to 29
 	 */
-	for (addr = ASC_EEP_DVC_CTL_BEGIN;
-	     addr < ASC_EEP_MAX_WORD_ADDR; addr++, wbuf++) {
+	for (addr = ADW_EEP_DVC_CTL_BEGIN;
+	     addr < ADW_EEP_MAX_WORD_ADDR; addr++, wbuf++) {
 		ADW_WRITE_WORD_REGISTER(iot, ioh, IOPW_EE_DATA, *wbuf);
 		ADW_WRITE_WORD_REGISTER(iot, ioh, IOPW_EE_CMD,
-				ASC_EEP_CMD_WRITE | addr);
+				ADW_EEP_CMD_WRITE | addr);
 		AdwWaitEEPCmd(iot, ioh);
 	}
 
 	ADW_WRITE_WORD_REGISTER(iot, ioh, IOPW_EE_CMD,
-			ASC_EEP_CMD_WRITE_DISABLE);
+			ADW_EEP_CMD_WRITE_DISABLE);
 	AdwWaitEEPCmd(iot, ioh);
 
 	return;
@@ -1733,7 +1733,7 @@ ADW_SCSI_REQ_Q	*scsiq;
 	}
 
 	/*
-	 * Begin of CRITICAL SECTION: Must be protected within splbio/splx pair
+	 * Beginning of CRITICAL SECTION: ASSUME splbio() in effect
 	 */
 	
 	ccb = adw_ccb_phys_kv(sc, scsiq->ccb_ptr);
@@ -1745,7 +1745,7 @@ ADW_SCSI_REQ_Q	*scsiq;
 		return ADW_BUSY;
 	}
 	sc->carr_freelist = ADW_CARRIER_VADDR(sc,
-			ASC_GET_CARRP(new_carrp->next_ba));
+			ADW_GET_CARRP(new_carrp->next_ba));
 	sc->carr_pending_cnt++;
 
 	/*
@@ -1753,7 +1753,7 @@ ADW_SCSI_REQ_Q	*scsiq;
 	 * to the stopper value. The current stopper will be changed
 	 * below to point to the new stopper.
 	 */
-	new_carrp->next_ba = ASC_CQ_STOPPER;
+	new_carrp->next_ba = ADW_CQ_STOPPER;
 
 	req_size = sizeof(ADW_SCSI_REQ_Q);
 	req_paddr = sc->sc_dmamap_control->dm_segs[0].ds_addr +
@@ -1763,7 +1763,7 @@ ADW_SCSI_REQ_Q	*scsiq;
 	scsiq->scsiq_rptr = req_paddr;
 
 	/*
-	 * Every ADV_CARR_T.carr_ba is byte swapped to little-endian
+	 * Every ADW_SCSI_REQ_Q.carr_ba is byte swapped to little-endian
 	 * order during initialization.
 	 */
 	scsiq->carr_ba = sc->icq_sp->carr_ba;
@@ -1875,7 +1875,7 @@ ADW_SOFTC	*sc;
 	 * The hold time delay is done on the host because the RISC has no
 	 * microsecond accurate timer.
 	 */
-	AdwDelayMicroSecond((u_int16_t) ASC_SCSI_RESET_HOLD_TIME_US);
+	AdwDelayMicroSecond((u_int16_t) ADW_SCSI_RESET_HOLD_TIME_US);
 
 	/*
 	 * Send the SCSI Bus Reset end idle command which de-asserts
@@ -1945,7 +1945,7 @@ ADW_SOFTC	*sc;
 			ADW_CTRL_REG_CMD_WR_IO_REG);
 
 	/*
-	 * Reset Adv Library error code, if any, and try
+	 * Reset Adw Library error code, if any, and try
 	 * re-initializing the chip.
 	 * Then translate initialization return value to status value.
 	 */
@@ -1975,14 +1975,11 @@ ADW_SOFTC	*sc;
 
 
 /*
- * Adv Library Interrupt Service Routine
+ * Adw Library Interrupt Service Routine
  *
  *  This function is called by a driver's interrupt service routine.
  *  The function disables and re-enables interrupts.
  *
- *  When a microcode idle command is completed, the ADV_DVC_VAR
- *  'idle_cmd_done' field is set to ADW_TRUE.
- *
  *  Note: AdwISR() can be called when interrupts are disabled or even
  *  when there is no hardware interrupt condition present. It will
  *  always check for completed idle commands and microcode requests.
@@ -2021,7 +2018,7 @@ ADW_SOFTC	*sc;
 
 	/*
 	 * Notify the driver of an asynchronous microcode condition by
-	 * calling the ADV_DVC_VAR.async_callback function. The function
+	 * calling the ADW_SOFTC.async_callback function. The function
 	 * is passed the microcode ADW_MC_INTRB_CODE byte value.
 	 */
 	if (int_stat & ADW_INTR_STATUS_INTRB) {
@@ -2031,7 +2028,7 @@ ADW_SOFTC	*sc;
 
 		if (sc->chip_type == ADW_CHIP_ASC3550 ||
 	    	    sc->chip_type == ADW_CHIP_ASC38C0800) {
-			if (intrb_code == ADV_ASYNC_CARRIER_READY_FAILURE &&
+			if (intrb_code == ADW_ASYNC_CARRIER_READY_FAILURE &&
 				sc->carr_pending_cnt != 0) {
 				ADW_WRITE_BYTE_REGISTER(iot, ioh,
 					IOPB_TICKLE, ADW_TICKLE_A);
@@ -2050,7 +2047,7 @@ ADW_SOFTC	*sc;
 	/*
 	 * Check if the IRQ stopper carrier contains a completed request.
 	 */
-	while (((irq_next_pa = sc->irq_sp->next_ba) & ASC_RQ_DONE) != 0)
+	while (((irq_next_pa = sc->irq_sp->next_ba) & ADW_RQ_DONE) != 0)
 	{
 #if ADW_DEBUG
 		printf("irq 0x%x, 0x%x, 0x%x, 0x%x\n",
@@ -2064,10 +2061,10 @@ ADW_SOFTC	*sc;
 		 * structure.
 		 * The RISC will have set 'areq_ba' to a virtual address.
 		 *
-		 * The firmware will have copied the ASC_SCSI_REQ_Q.ccb_ptr
-		 * field to the carrier ADV_CARR_T.areq_ba field.
+		 * The firmware will have copied the ADW_SCSI_REQ_Q.ccb_ptr
+		 * field to the carrier ADW_CARRIER.areq_ba field.
 		 * The conversion below complements the conversion of
-		 * ASC_SCSI_REQ_Q.scsiq_ptr' in AdwExeScsiQueue().
+		 * ADW_SCSI_REQ_Q.ccb_ptr' in AdwExeScsiQueue().
 		 */
 		ccb = adw_ccb_phys_kv(sc, sc->irq_sp->areq_ba);
 		scsiq = &ccb->scsiq;
@@ -2078,7 +2075,7 @@ ADW_SOFTC	*sc;
 		 * DMAed to host memory by the firmware. Set all status fields
 		 * to indicate good status.
 		 */
-		if ((irq_next_pa & ASC_RQ_GOOD) != 0) {
+		if ((irq_next_pa & ADW_RQ_GOOD) != 0) {
 			scsiq->done_status = QD_NO_ERROR;
 			scsiq->host_status = scsiq->scsi_status = 0;
 			scsiq->data_cnt = 0L;
@@ -2090,7 +2087,7 @@ ADW_SOFTC	*sc;
 		 * stopper carrier.
 		 */
 		free_carrp = sc->irq_sp;
-		sc->irq_sp = ADW_CARRIER_VADDR(sc, ASC_GET_CARRP(irq_next_pa));
+		sc->irq_sp = ADW_CARRIER_VADDR(sc, ADW_GET_CARRP(irq_next_pa));
 
 		free_carrp->next_ba = (sc->carr_freelist == NULL)? NULL
 					: sc->carr_freelist->carr_ba;
@@ -2368,7 +2365,7 @@ ADW_SCSI_REQ_Q *scsiq;
 		 * If the EEPROM enabled Tag Queuing for the device and the
 		 * device supports Tag Queueing, then turn on the device's
 		 * 'tagqng_enable' bit in the microcode and set the microcode
-		 * maximum command count to the ADV_DVC_VAR 'max_dvc_qng'
+		 * maximum command count to the ADW_SOFTC 'max_dvc_qng'
 		 * value.
 		 *
 		 * Tag Queuing is disabled for the BIOS which runs in polled
diff --git a/sys/dev/ic/adwlib.h b/sys/dev/ic/adwlib.h
index 7ea21413325..a8db327aa8c 100644
--- a/sys/dev/ic/adwlib.h
+++ b/sys/dev/ic/adwlib.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: adwlib.h,v 1.6 2000/12/08 00:03:31 krw Exp $ */
+/*	$OpenBSD: adwlib.h,v 1.7 2001/02/22 17:17:32 krw Exp $ */
 /*      $NetBSD: adwlib.h,v 1.14 2000/07/03 18:14:18 dante Exp $        */
 
 /*
@@ -75,18 +75,18 @@
  * Define Adw Reset Hold Time grater than 25 uSec.
  * See AdwResetSCSIBus() for more info.
  */
-#define ASC_SCSI_RESET_HOLD_TIME_US  60
+#define ADW_SCSI_RESET_HOLD_TIME_US  60
 
 /*
  * Define Adw EEPROM constants.
  */
 
-#define ASC_EEP_DVC_CFG_BEGIN           (0x00)
-#define ASC_EEP_DVC_CFG_END             (0x15)
-#define ASC_EEP_DVC_CTL_BEGIN           (0x16)  /* location of OEM name */
-#define ASC_EEP_MAX_WORD_ADDR           (0x1E)
+#define ADW_EEP_DVC_CFG_BEGIN           (0x00)
+#define ADW_EEP_DVC_CFG_END             (0x15)
+#define ADW_EEP_DVC_CTL_BEGIN           (0x16)  /* location of OEM name */
+#define ADW_EEP_MAX_WORD_ADDR           (0x1E)
 
-#define ASC_EEP_DELAY_MS                100
+#define ADW_EEP_DELAY_MS                100
 
 /*
  * EEPROM bits reference by the RISC after initialization.
@@ -110,15 +110,15 @@
  *
  * Default values are maintained in the structure Default_EEPROM_Config.
  */
-#define ADV_EEPROM_BIG_ENDIAN          0x8000   /* EEPROM Bit 15 */
-#define ADV_EEPROM_BIOS_ENABLE         0x4000   /* EEPROM Bit 14 */
+#define ADW_EEPROM_BIG_ENDIAN          0x8000   /* EEPROM Bit 15 */
+#define ADW_EEPROM_BIOS_ENABLE         0x4000   /* EEPROM Bit 14 */
 /*
  * For the ASC3550 Bit 13 is Termination Polarity control bit.
  * For later ICs Bit 13 controls whether the CIS (Card Information
  * Service Section) is loaded from EEPROM.
  */
-#define ADV_EEPROM_TERM_POL            0x2000   /* EEPROM Bit 13 */
-#define ADV_EEPROM_CIS_LD              0x2000   /* EEPROM Bit 13 */
+#define ADW_EEPROM_TERM_POL            0x2000   /* EEPROM Bit 13 */
+#define ADW_EEPROM_CIS_LD              0x2000   /* EEPROM Bit 13 */
 
 /*
  * ASC38C1600 Bit 11
@@ -209,11 +209,11 @@ typedef struct adw_eeprom
 	u_int16_t	check_sum;		/* 21 EEP check sum */
 	u_int8_t	oem_name[16];		/* 22 OEM name */
 	u_int16_t	dvc_err_code;		/* 30 last device driver error code */
-	u_int16_t	adv_err_code;		/* 31 last uc and Adw Lib error code */
-	u_int16_t	adv_err_addr;		/* 32 last uc error address */
+	u_int16_t	adw_err_code;		/* 31 last uc and Adw Lib error code */
+	u_int16_t	adw_err_addr;		/* 32 last uc error address */
 	u_int16_t	saved_dvc_err_code;	/* 33 saved last dev. driver error code	*/
-	u_int16_t	saved_adv_err_code;	/* 34 saved last uc and Adw Lib error code */
-	u_int16_t	saved_adv_err_addr;	/* 35 saved last uc error address 	*/
+	u_int16_t	saved_adw_err_code;	/* 34 saved last uc and Adw Lib error code */
+	u_int16_t	saved_adw_err_addr;	/* 35 saved last uc error address 	*/
 	u_int16_t	reserved1[20];		/* 36 - 55 reserved */
 	u_int16_t	cisptr_lsw;		/* 56 CIS PTR LSW */
 	u_int16_t	cisprt_msw;		/* 57 CIS PTR MSW */
@@ -226,13 +226,13 @@ typedef struct adw_eeprom
 /*
  * EEPROM Commands
  */
-#define ASC_EEP_CMD_READ          0x80
-#define ASC_EEP_CMD_WRITE         0x40
-#define ASC_EEP_CMD_WRITE_ABLE    0x30
-#define ASC_EEP_CMD_WRITE_DISABLE 0x00
+#define ADW_EEP_CMD_READ          0x80
+#define ADW_EEP_CMD_WRITE         0x40
+#define ADW_EEP_CMD_WRITE_ABLE    0x30
+#define ADW_EEP_CMD_WRITE_DISABLE 0x00
 
-#define ASC_EEP_CMD_DONE             0x0200
-#define ASC_EEP_CMD_DONE_ERR         0x0001
+#define ADW_EEP_CMD_DONE             0x0200
+#define ADW_EEP_CMD_DONE_ERR         0x0001
 
 /* cfg_word */
 #define EEP_CFG_WORD_BIG_ENDIAN      0x8000
@@ -834,7 +834,7 @@ typedef struct adw_scsi_req_q {
 } ADW_SCSI_REQ_Q;
 
 /*
- * ASC_SCSI_REQ_Q 'done_status' return values.
+ * ADW_SCSI_REQ_Q 'done_status' return values.
  */
 #define QD_NO_STATUS         0x00       /* Request not completed yet. */
 #define QD_NO_ERROR          0x01
@@ -842,7 +842,7 @@ typedef struct adw_scsi_req_q {
 #define QD_WITH_ERROR        0x04
 
 /*
- * ASC_SCSI_REQ_Q 'host_status' return values.
+ * ADW_SCSI_REQ_Q 'host_status' return values.
  */
 #define QHSTA_NO_ERROR              0x00
 #define QHSTA_M_SEL_TIMEOUT         0x11
@@ -874,7 +874,7 @@ typedef struct adw_scsi_req_q {
 #define QHSTA_M_SGBACKUP_ERROR      0x47 /* Scatter-Gather backup error */
 
 /*
- * ASC_SCSI_REQ_Q 'scsi_status' return values.
+ * ADW_SCSI_REQ_Q 'scsi_status' return values.
  */
 #define SCSI_STATUS_GOOD		0x00
 #define SCSI_STATUS_CHECK_CONDITION	0x02
@@ -918,11 +918,11 @@ typedef struct adw_scsi_req_q {
 #define SCSI_MS_PER_SEC              1000UL  /* milliseconds per second */
 #define SCSI_MAX_RETRY               10      /* retry count */
 
-#define ADV_ASYNC_RDMA_FAILURE          0x01 /* Fatal RDMA failure. */
-#define ADV_ASYNC_SCSI_BUS_RESET_DET    0x02 /* Detected SCSI Bus Reset. */
-#define ADV_ASYNC_CARRIER_READY_FAILURE 0x03 /* Carrier Ready failure. */
+#define ADW_ASYNC_RDMA_FAILURE          0x01 /* Fatal RDMA failure. */
+#define ADW_ASYNC_SCSI_BUS_RESET_DET    0x02 /* Detected SCSI Bus Reset. */
+#define ADW_ASYNC_CARRIER_READY_FAILURE 0x03 /* Carrier Ready failure. */
 
-#define ADV_HOST_SCSI_BUS_RESET      0x80 /* Host Initiated SCSI Bus Reset. */
+#define ADW_HOST_SCSI_BUS_RESET      0x80 /* Host Initiated SCSI Bus Reset. */
 
 
 /* Read byte from a register. */
@@ -1014,16 +1014,16 @@ do {									\
 	ADW_READ_BYTE_REGISTER((iot), (ioh), IOPB_CHIP_TYPE_REV)
 
 /*
- * Abort an SRB in the chip's RISC Memory. The 'srb_ptr' argument must
- * match the ASC_SCSI_REQ_Q 'srb_ptr' field.
+ * Abort a CCB in the chip's RISC Memory. The 'ccb_ptr' argument must
+ * match the ADW_SCSI_REQ_Q 'ccb_ptr' field.
  * 
  * If the request has not yet been sent to the device it will simply be
  * aborted from RISC memory. If the request is disconnected it will be
  * aborted on reselection by sending an Abort Message to the target ID.
  *
  * Return value:
- *      ADW_TRUE(1) - Queue was successfully aborted.
- *      ADW_FALSE(0) - Queue was not found on the active queue list.
+ *      ADW_TRUE(1) - ccb was successfully aborted.
+ *      ADW_FALSE(0) - ccb was not found on the active queue list.
  */
 #define ADW_ABORT_CCB(sc, ccb_ptr) \
 	AdwSendIdleCmd((sc), (u_int16_t) IDLE_CMD_ABORT, (ccb_ptr)->hashkey)
@@ -1113,7 +1113,7 @@ typedef struct {
 } ADW_SCSI_INQUIRY; /* 74 bytes */
 
 /*
- * Adv Library functions available to drivers.
+ * Adw Library functions available to drivers.
  */
 
 int	AdwInitFromEEPROM __P((ADW_SOFTC *));
diff --git a/sys/dev/ic/adwmcode.h b/sys/dev/ic/adwmcode.h
index 7043b85da0a..c73710eb0d7 100644
--- a/sys/dev/ic/adwmcode.h
+++ b/sys/dev/ic/adwmcode.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: adwmcode.h,v 1.4 2000/06/29 00:04:32 krw Exp $ */
+/*	$OpenBSD: adwmcode.h,v 1.5 2001/02/22 17:17:32 krw Exp $ */
 /*      $NetBSD: adwmcode.h,v 1.5 2000/05/27 18:24:51 dante Exp $        */
 
 /*
@@ -70,15 +70,15 @@ typedef struct adw_carrier ADW_CARRIER;
 /*
  * next_ba flags
  */
-#define ASC_RQ_DONE		0x00000001
-#define ASC_RQ_GOOD		0x00000002
-#define ASC_CQ_STOPPER		0x00000000
+#define ADW_RQ_DONE		0x00000001
+#define ADW_RQ_GOOD		0x00000002
+#define ADW_CQ_STOPPER		0x00000000
 
 /*
  * Mask used to eliminate low 4 bits of carrier 'next_ba' field.
  */
-#define ASC_NEXT_BA_MASK	0xFFFFFFF0
-#define ASC_GET_CARRP(carrp)	((carrp) & ASC_NEXT_BA_MASK)
+#define ADW_NEXT_BA_MASK	0xFFFFFFF0
+#define ADW_GET_CARRP(carrp)	((carrp) & ADW_NEXT_BA_MASK)
 
 /*
  * Bus Address of a Carrier.