add support for PCI-E 5752 core and recognize a few additional

5750 revisions.

Info from the Broadcom Linux driver

2 files changed, 43 insertions, 12 deletions

diff --git a/sys/dev/pci/if_bge.c b/sys/dev/pci/if_bge.c
index 769c48d9d56..9bc4fa01697 100644
--- a/sys/dev/pci/if_bge.c
+++ b/sys/dev/pci/if_bge.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: if_bge.c,v 1.70 2005/07/01 20:47:50 brad Exp $	*/
+/*	$OpenBSD: if_bge.c,v 1.71 2005/07/02 00:34:29 brad Exp $	*/
 
 /*
  * Copyright (c) 2001 Wind River Systems
@@ -1169,8 +1169,9 @@ bge_chipinit(sc)
 	if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5703 ||
 	    BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5704 ||
 	    BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5705 ||
+	    BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5750 ||
 	    BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5714 ||
-	    BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5750)
+	    BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5752)
 		dma_rw_ctl &= ~BGE_PCIDMARWCTL_MINDMA;
 
 	pci_conf_write(pa->pa_pc, pa->pa_tag, BGE_PCI_DMA_RW_CTL, dma_rw_ctl);
@@ -1630,6 +1631,10 @@ static const struct bge_revision {
 	  BGE_QUIRK_LINK_STATE_BROKEN|BGE_QUIRK_5700_COMMON,
 	  "BCM5700 B2" },
 
+	{ BGE_CHIPID_BCM5700_B3,
+	  BGE_QUIRK_LINK_STATE_BROKEN|BGE_QUIRK_5700_COMMON,
+	  "BCM5700 B3" },
+
 	/* This is treated like a BCM5700 Bx */
 	{ BGE_CHIPID_BCM5700_ALTIMA,
 	  BGE_QUIRK_LINK_STATE_BROKEN|BGE_QUIRK_5700_COMMON,
@@ -1711,14 +1716,30 @@ static const struct bge_revision {
 	  BGE_QUIRK_ONLY_PHY_1|BGE_QUIRK_5705_CORE,
 	  "BCM5750 A1" },
 
+	{ BGE_CHIPID_BCM5750_A3,
+	  BGE_QUIRK_ONLY_PHY_1|BGE_QUIRK_5705_CORE,
+	  "BCM5750 A3" },
+
+	{ BGE_CHIPID_BCM5750_B0,
+	  BGE_QUIRK_ONLY_PHY_1|BGE_QUIRK_5705_CORE,
+	  "BCM5750 B0" },
+
 	{ BGE_CHIPID_BCM5750_B1,
 	  BGE_QUIRK_ONLY_PHY_1|BGE_QUIRK_5705_CORE,
 	  "BCM5750 B1" },
 
+	{ BGE_CHIPID_BCM5750_C0,
+	  BGE_QUIRK_ONLY_PHY_1|BGE_QUIRK_5705_CORE,
+	  "BCM5750 C0" },
+
 	{ BGE_CHIPID_BCM5714_A0,
 	  BGE_QUIRK_ONLY_PHY_1|BGE_QUIRK_5705_CORE,
 	  "BCM5714 A0" },
 
+	{ BGE_CHIPID_BCM5752_A0,
+	  BGE_QUIRK_ONLY_PHY_1|BGE_QUIRK_5705_CORE,
+	  "BCM5752 A0" },
+
 	{ 0, 0, NULL }
 };
 
@@ -1755,6 +1776,10 @@ static const struct bge_revision bge_majorrevs[] = {
 	  BGE_QUIRK_ONLY_PHY_1|BGE_QUIRK_5705_CORE,
 	  "unknown BCM5714" },
 
+	{ BGE_ASICREV_BCM5752,
+	  BGE_QUIRK_ONLY_PHY_1|BGE_QUIRK_5705_CORE,
+	  "unknown BCM5752" },
+
 	{ 0,
 	  0,
 	  NULL }
@@ -1913,8 +1938,9 @@ bge_attach(parent, self, aux)
 	 * XXX: Broadcom Linux driver.  Not in specs or eratta.
 	 * PCI-Express?
 	 */
-	if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5714 ||
-	    BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5750) {
+	if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5750 ||
+	    BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5714 ||
+	    BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5752) {
 		u_int32_t v;
 
 		v = pci_conf_read(pc, pa->pa_tag, BGE_PCI_MSI_CAPID);
diff --git a/sys/dev/pci/if_bgereg.h b/sys/dev/pci/if_bgereg.h
index 02cb8ebad0f..f37cc8b4718 100644
--- a/sys/dev/pci/if_bgereg.h
+++ b/sys/dev/pci/if_bgereg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: if_bgereg.h,v 1.24 2005/06/29 03:36:06 brad Exp $	*/
+/*	$OpenBSD: if_bgereg.h,v 1.25 2005/07/02 00:34:29 brad Exp $	*/
 
 /*
  * Copyright (c) 2001 Wind River Systems
@@ -224,13 +224,12 @@
 	(BGE_HIF_SWAP_OPTIONS|BGE_PCIMISCCTL_CLEAR_INTA| \
 	 BGE_PCIMISCCTL_MASK_PCI_INTR|BGE_PCIMISCCTL_INDIRECT_ACCESS)
 
-#define BGE_CHIPID_TIGON_I		0x40000000
-#define BGE_CHIPID_TIGON_II		0x60000000
 #define BGE_CHIPID_BCM5700_A0		0x70000000
 #define BGE_CHIPID_BCM5700_A1		0x70010000
 #define BGE_CHIPID_BCM5700_B0		0x71000000
-#define BGE_CHIPID_BCM5700_B1		0x71020000
-#define BGE_CHIPID_BCM5700_B2		0x71030000
+#define BGE_CHIPID_BCM5700_B1		0x71010000
+#define BGE_CHIPID_BCM5700_B2		0x71020000
+#define BGE_CHIPID_BCM5700_B3		0x71030000
 #define BGE_CHIPID_BCM5700_ALTIMA	0x71040000
 #define BGE_CHIPID_BCM5700_C0		0x72000000
 #define BGE_CHIPID_BCM5701_A0		0x00000000	/* grrrr */
@@ -240,7 +239,7 @@
 #define BGE_CHIPID_BCM5703_A0		0x10000000
 #define BGE_CHIPID_BCM5703_A1		0x10010000
 #define BGE_CHIPID_BCM5703_A2		0x10020000
-#define BGE_CHIPID_BCM5703_A3		0x11000000
+#define BGE_CHIPID_BCM5703_A3		0x10030000
 #define BGE_CHIPID_BCM5704_A0		0x20000000
 #define BGE_CHIPID_BCM5704_A1		0x20010000
 #define BGE_CHIPID_BCM5704_A2		0x20020000
@@ -251,8 +250,12 @@
 #define BGE_CHIPID_BCM5705_A3		0x30030000
 #define BGE_CHIPID_BCM5750_A0		0x40000000
 #define BGE_CHIPID_BCM5750_A1		0x40010000
+#define BGE_CHIPID_BCM5750_A3		0x40030000
+#define BGE_CHIPID_BCM5750_B0		0x40100000
 #define BGE_CHIPID_BCM5750_B1		0x41010000
+#define BGE_CHIPID_BCM5750_C0		0x42000000
 #define BGE_CHIPID_BCM5714_A0		0x50000000
+#define BGE_CHIPID_BCM5752_A0		0x60000000
 
 /* shorthand one */
 #define BGE_ASICREV(x)			((x) >> 28)
@@ -263,6 +266,7 @@
 #define BGE_ASICREV_BCM5705		0x03
 #define BGE_ASICREV_BCM5750		0x04
 #define BGE_ASICREV_BCM5714		0x05
+#define BGE_ASICREV_BCM5752		0x06
 
 /* chip revisions */
 #define BGE_CHIPREV(x)			((x) >> 24)
@@ -270,6 +274,9 @@
 #define BGE_CHIPREV_5700_BX		0x71
 #define BGE_CHIPREV_5700_CX		0x72
 #define BGE_CHIPREV_5701_AX		0x00
+#define BGE_CHIPREV_5703_AX		0x10
+#define BGE_CHIPREV_5704_AX		0x20
+#define BGE_CHIPREV_5704_BX		0x21
 
 /* PCI DMA Read/Write Control register */
 #define BGE_PCIDMARWCTL_MINDMA		0x000000FF
@@ -2268,8 +2275,6 @@ struct bge_type {
 	char			*bge_name;
 };
 
-#define BGE_HWREV_TIGON		0x01
-#define BGE_HWREV_TIGON_II	0x02
 #define BGE_TIMEOUT		100000
 #define BGE_TXCONS_UNSET		0xFFFF	/* impossible value */