Seems the voltage bit defenitions in sdmmcreg.h for voltages below 2V

are not quite right.  At least I can't find them in any of the MMC and
SD card documentation I can find on the interwebs.  Instead there is a
single "low voltage bit" that indicates support for the 1.65-1.95V or
1.70-1.95V range depending on the document you're reading.  Go with the
1.65-1.95V range as that is what Linux does.

Necessary (but not sufficient) to make the eMMC on the ASUS X205TA work.

ok jsg@ (who did the armv7 bits)

5 files changed, 12 insertions, 15 deletions

diff --git a/sys/arch/armv7/exynos/exesdhc.c b/sys/arch/armv7/exynos/exesdhc.c
index b5da2c23673..5d9ea8e5067 100644
--- a/sys/arch/armv7/exynos/exesdhc.c
+++ b/sys/arch/armv7/exynos/exesdhc.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: exesdhc.c,v 1.3 2015/05/30 02:17:36 jsg Exp $	*/
+/*	$OpenBSD: exesdhc.c,v 1.4 2016/01/10 14:11:43 kettenis Exp $	*/
 /*
  * Copyright (c) 2009 Dale Rahn <drahn@openbsd.org>
  * Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org>
@@ -331,7 +331,7 @@ exesdhc_attach(struct device *parent, struct device *self, void *args)
 	 * Determine SD bus voltage levels supported by the controller.
 	 */
 	if (caps & SDHC_HOST_CTRL_CAP_VS18)
-		SET(sc->ocr, MMC_OCR_1_7V_1_8V | MMC_OCR_1_8V_1_9V);
+		SET(sc->ocr, MMC_OCR_1_65V_1_95V);
 	if (caps & SDHC_HOST_CTRL_CAP_VS30)
 		SET(sc->ocr, MMC_OCR_2_9V_3_0V | MMC_OCR_3_0V_3_1V);
 	if (caps & SDHC_HOST_CTRL_CAP_VS33)
diff --git a/sys/arch/armv7/imx/imxesdhc.c b/sys/arch/armv7/imx/imxesdhc.c
index 432bcd733b1..f55b41f65e2 100644
--- a/sys/arch/armv7/imx/imxesdhc.c
+++ b/sys/arch/armv7/imx/imxesdhc.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: imxesdhc.c,v 1.12 2015/05/30 03:20:54 jsg Exp $	*/
+/*	$OpenBSD: imxesdhc.c,v 1.13 2016/01/10 14:11:43 kettenis Exp $	*/
 /*
  * Copyright (c) 2009 Dale Rahn <drahn@openbsd.org>
  * Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org>
@@ -281,7 +281,7 @@ imxesdhc_attach(struct device *parent, struct device *self, void *args)
 	 * Determine SD bus voltage levels supported by the controller.
 	 */
 	if (caps & SDHC_HOST_CTRL_CAP_VS18)
-		SET(sc->ocr, MMC_OCR_1_7V_1_8V | MMC_OCR_1_8V_1_9V);
+		SET(sc->ocr, MMC_OCR_1_65V_1_95V);
 	if (caps & SDHC_HOST_CTRL_CAP_VS30)
 		SET(sc->ocr, MMC_OCR_2_9V_3_0V | MMC_OCR_3_0V_3_1V);
 	if (caps & SDHC_HOST_CTRL_CAP_VS33)
diff --git a/sys/arch/armv7/omap/ommmc.c b/sys/arch/armv7/omap/ommmc.c
index 03040e9c6fc..5363ce5fb67 100644
--- a/sys/arch/armv7/omap/ommmc.c
+++ b/sys/arch/armv7/omap/ommmc.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ommmc.c,v 1.14 2015/05/30 02:17:36 jsg Exp $	*/
+/*	$OpenBSD: ommmc.c,v 1.15 2016/01/10 14:11:43 kettenis Exp $	*/
 
 /*
  * Copyright (c) 2009 Dale Rahn <drahn@openbsd.org>
@@ -353,7 +353,7 @@ ommmc_attach(struct device *parent, struct device *self, void *args)
 	 * Determine SD bus voltage levels supported by the controller.
 	 */
 	if (caps & MMCHS_CAPA_VS18)
-		SET(sc->ocr, MMC_OCR_1_7V_1_8V | MMC_OCR_1_8V_1_9V);
+		SET(sc->ocr, MMC_OCR_1_65V_1_95V);
 	if (caps & MMCHS_CAPA_VS30)
 		SET(sc->ocr, MMC_OCR_2_9V_3_0V | MMC_OCR_3_0V_3_1V);
 	if (caps & MMCHS_CAPA_VS33)
@@ -570,7 +570,7 @@ ommmc_bus_power(sdmmc_chipset_handle_t sch, uint32_t ocr)
 		vdd = MMCHS_HCTL_SDVS_V33;
 	else if (ISSET(ocr, MMC_OCR_2_9V_3_0V | MMC_OCR_3_0V_3_1V))
 		vdd = MMCHS_HCTL_SDVS_V30;
-	else if (ISSET(ocr, MMC_OCR_1_7V_1_8V | MMC_OCR_1_8V_1_9V))
+	else if (ISSET(ocr, MMC_OCR_1_65V_1_95V))
 		vdd = MMCHS_HCTL_SDVS_V18;
 	else {
 		/* Unsupported voltage level requested. */
diff --git a/sys/dev/sdmmc/sdhc.c b/sys/dev/sdmmc/sdhc.c
index ac06ca3153a..0fbb05f7ef0 100644
--- a/sys/dev/sdmmc/sdhc.c
+++ b/sys/dev/sdmmc/sdhc.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: sdhc.c,v 1.39 2015/03/14 03:38:49 jsg Exp $	*/
+/*	$OpenBSD: sdhc.c,v 1.40 2016/01/10 14:11:43 kettenis Exp $	*/
 
 /*
  * Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org>
@@ -198,7 +198,7 @@ sdhc_host_found(struct sdhc_softc *sc, bus_space_tag_t iot,
 	 * Determine SD bus voltage levels supported by the controller.
 	 */
 	if (ISSET(caps, SDHC_VOLTAGE_SUPP_1_8V))
-		SET(hp->ocr, MMC_OCR_1_7V_1_8V | MMC_OCR_1_8V_1_9V);
+		SET(hp->ocr, MMC_OCR_1_65V_1_95V);
 	if (ISSET(caps, SDHC_VOLTAGE_SUPP_3_0V))
 		SET(hp->ocr, MMC_OCR_2_9V_3_0V | MMC_OCR_3_0V_3_1V);
 	if (ISSET(caps, SDHC_VOLTAGE_SUPP_3_3V))
@@ -406,7 +406,7 @@ sdhc_bus_power(sdmmc_chipset_handle_t sch, u_int32_t ocr)
 		vdd = SDHC_VOLTAGE_3_3V;
 	else if (ISSET(ocr, MMC_OCR_2_9V_3_0V|MMC_OCR_3_0V_3_1V))
 		vdd = SDHC_VOLTAGE_3_0V;
-	else if (ISSET(ocr, MMC_OCR_1_7V_1_8V|MMC_OCR_1_8V_1_9V))
+	else if (ISSET(ocr, MMC_OCR_1_65V_1_95V))
 		vdd = SDHC_VOLTAGE_1_8V;
 	else {
 		/* Unsupported voltage level requested. */
diff --git a/sys/dev/sdmmc/sdmmcreg.h b/sys/dev/sdmmc/sdmmcreg.h
index fd5080bf6c1..57f61b125d9 100644
--- a/sys/dev/sdmmc/sdmmcreg.h
+++ b/sys/dev/sdmmc/sdmmcreg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: sdmmcreg.h,v 1.7 2015/11/08 12:10:27 jsg Exp $	*/
+/*	$OpenBSD: sdmmcreg.h,v 1.8 2016/01/10 14:11:43 kettenis Exp $	*/
 
 /*
  * Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org>
@@ -67,10 +67,7 @@
 #define MMC_OCR_2_2V_2_3V		(1<<10)
 #define MMC_OCR_2_1V_2_2V		(1<<9)
 #define MMC_OCR_2_0V_2_1V		(1<<8)
-#define MMC_OCR_1_9V_2_0V		(1<<7)
-#define MMC_OCR_1_8V_1_9V		(1<<6)
-#define MMC_OCR_1_7V_1_8V		(1<<5)
-#define MMC_OCR_1_6V_1_7V		(1<<4)
+#define MMC_OCR_1_65V_1_95V		(1<<7)
 
 #define SD_OCR_SDHC_CAP			(1<<30)
 #define SD_OCR_VOL_MASK			0xFF8000 /* bits 23:15 */