diff options
| author | Aaron Campbell <aaron@cvs.openbsd.org> | 2001-03-14 15:17:32 +0000 |
|---|---|---|
| committer | Aaron Campbell <aaron@cvs.openbsd.org> | 2001-03-14 15:17:32 +0000 |
| commit | 1ec7dacb3e39d99538acc2e58b214d6cdb3e5179 (patch) | |
| tree | 07829d445986647fdfeaf0668ca8e82e3c3883db /sys | |
| parent | 60127fc2905e7358cd3fefee7739df4703914438 (diff) | |
Disable PME mode in sis_reset() to fix a problem with the DP83815 chip on
some motherboards; from FreeBSD.
Diffstat (limited to 'sys')
| -rw-r--r-- | sys/dev/pci/if_sis.c | 12 | ||||
| -rw-r--r-- | sys/dev/pci/if_sisreg.h | 7 |
2 files changed, 17 insertions, 2 deletions
diff --git a/sys/dev/pci/if_sis.c b/sys/dev/pci/if_sis.c index 8c4d5749eaa..de631e335c0 100644 --- a/sys/dev/pci/if_sis.c +++ b/sys/dev/pci/if_sis.c @@ -1,4 +1,4 @@ -/* $OpenBSD: if_sis.c,v 1.11 2001/03/12 05:51:18 aaron Exp $ */ +/* $OpenBSD: if_sis.c,v 1.12 2001/03/14 15:17:31 aaron Exp $ */ /* * Copyright (c) 1997, 1998, 1999 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. @@ -571,6 +571,16 @@ void sis_reset(sc) /* Wait a little while for the chip to get its brains in order. */ DELAY(1000); + + /* + * If this is a NetSemi chip, make sure to clear + * PME mode. + */ + if (sc->sis_type == SIS_TYPE_83815) { + CSR_WRITE_4(sc, NS_CLKRUN, NS_CLKRUN_PMESTS); + CSR_WRITE_4(sc, NS_CLKRUN, 0); + } + return; } diff --git a/sys/dev/pci/if_sisreg.h b/sys/dev/pci/if_sisreg.h index 348ebce8699..ff13f207de4 100644 --- a/sys/dev/pci/if_sisreg.h +++ b/sys/dev/pci/if_sisreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: if_sisreg.h,v 1.5 2001/03/12 05:51:18 aaron Exp $ */ +/* $OpenBSD: if_sisreg.h,v 1.6 2001/03/14 15:17:31 aaron Exp $ */ /* * Copyright (c) 1997, 1998, 1999 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. @@ -76,6 +76,7 @@ #define SIS_GPIO 0xB8 /* NS DP83815 registers */ +#define NS_CLKRUN 0x3C #define NS_BMCR 0x80 #define NS_BMSR 0x84 #define NS_PHYIDR1 0x88 @@ -93,6 +94,10 @@ #define NS_PHY_SDCFG 0xF8 #define NS_PHY_TDATA 0xFC +#define NS_CLKRUN_PMESTS 0x00008000 +#define NS_CLKRUN_PMEENB 0x00000100 +#define NS_CLNRUN_CLKRUN_ENB 0x00000001 + #define SIS_CSR_TX_ENABLE 0x00000001 #define SIS_CSR_TX_DISABLE 0x00000002 #define SIS_CSR_RX_ENABLE 0x00000004 |