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authorMark Kettenis <kettenis@cvs.openbsd.org>2008-03-08 19:47:00 +0000
committerMark Kettenis <kettenis@cvs.openbsd.org>2008-03-08 19:47:00 +0000
commit22b225cb417a08d1f3be81c45427e2232d860a85 (patch)
treebf91a901ef31d54da4ec41d19af978fd0e84a7df /sys
parent5d745a2fb66a8e355154fb151d033c5dc78845ee (diff)
Add som sun4v-specific ASIs.
Diffstat (limited to 'sys')
-rw-r--r--sys/arch/sparc64/include/ctlreg.h6
1 files changed, 5 insertions, 1 deletions
diff --git a/sys/arch/sparc64/include/ctlreg.h b/sys/arch/sparc64/include/ctlreg.h
index 64fb5ccc44e..311eae03e47 100644
--- a/sys/arch/sparc64/include/ctlreg.h
+++ b/sys/arch/sparc64/include/ctlreg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: ctlreg.h,v 1.15 2008/01/06 16:09:49 kettenis Exp $ */
+/* $OpenBSD: ctlreg.h,v 1.16 2008/03/08 19:46:59 kettenis Exp $ */
/* $NetBSD: ctlreg.h,v 1.28 2001/08/06 23:55:34 eeh Exp $ */
/*
@@ -99,7 +99,11 @@
#define ASI_PHYS_CACHED_LITTLE 0x1c /* [4u] MMU bypass to main memory, little endian */
#define ASI_PHYS_NON_CACHED_LITTLE 0x1d /* [4u] MMU bypass to I/O location, little endian */
+#define ASI_SCRATCHPAD 0x20 /* [4v] scratchpad registers */
+#define ASI_MMU_CONTEXTID 0x21 /* [4v] MMU context */
+
#define ASI_NUCLEUS_QUAD_LDD 0x24 /* [4u] use w/LDDA to load 128-bit item */
+#define ASI_QUEUE 0x25 /* [4v] interrupt queue registers */
#define ASI_NUCLEUS_QUAD_LDD_LITTLE 0x2c /* [4u] use w/LDDA to load 128-bit item, little endian */
#define ASI_FLUSH_D_PAGE_PRIMARY 0x38 /* [4u] flush D-cache page using primary context */