Give cardbus the pci_chipset_tag_t from pccbb and push it out through

cardbus_attach_args so we can switch to using proper pci config
space functions instead of callback based wrappers.

ok oga@ krw@ kettenis@

23 files changed, 264 insertions, 352 deletions

diff --git a/sys/dev/cardbus/cardbus.c b/sys/dev/cardbus/cardbus.c
index dbdf604396e..6b094139fec 100644
--- a/sys/dev/cardbus/cardbus.c
+++ b/sys/dev/cardbus/cardbus.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cardbus.c,v 1.43 2010/03/27 20:04:03 jsg Exp $	*/
+/*	$OpenBSD: cardbus.c,v 1.44 2010/03/27 21:40:13 jsg Exp $	*/
 /*	$NetBSD: cardbus.c,v 1.24 2000/04/02 19:11:37 mycroft Exp $	*/
 
 /*
@@ -126,6 +126,7 @@ cardbusattach(struct device *parent, struct device *self, void *aux)
 	sc->sc_memt = cba->cba_memt;	/* CardBus MEM space tag */
 	sc->sc_dmat = cba->cba_dmat;	/* DMA tag */
 	sc->sc_cc = cba->cba_cc;
+	sc->sc_pc = cba->cba_pc;
 	sc->sc_cf = cba->cba_cf;
 	sc->sc_rbus_iot = cba->cba_rbus_iot;
 	sc->sc_rbus_memt = cba->cba_rbus_memt;
@@ -140,8 +141,7 @@ cardbus_read_tuples(struct cardbus_attach_args *ca, pcireg_t cis_ptr,
     u_int8_t *tuples, size_t len)
 {
 	struct cardbus_softc *sc = ca->ca_ct->ct_sc;
-	cardbus_chipset_tag_t cc = ca->ca_ct->ct_cc;
-	cardbus_function_tag_t cf = ca->ca_ct->ct_cf;
+	pci_chipset_tag_t pc = ca->ca_pc;
 	pcitag_t tag = ca->ca_tag;
 	pcireg_t command;
 	int found = 0;
@@ -164,7 +164,7 @@ cardbus_read_tuples(struct cardbus_attach_args *ca, pcireg_t cis_ptr,
 		DPRINTF(("%s: reading CIS data from configuration space\n",
 		    sc->sc_dev.dv_xname));
 		for (i = cis_ptr, j = 0; i < 0xff; i += 4) {
-			u_int32_t e = (cf->cardbus_conf_read)(cc, tag, i);
+			u_int32_t e = pci_conf_read(pc, tag, i);
 			tuples[j] = 0xff & e;
 			e >>= 8;
 			tuples[j + 1] = 0xff & e;
@@ -196,7 +196,7 @@ cardbus_read_tuples(struct cardbus_attach_args *ca, pcireg_t cis_ptr,
 
 		/* XXX zero register so mapreg_map doesn't get confused by old
 		   contents */
-		cardbus_conf_write(cc, cf, tag, reg, 0);
+		pci_conf_write(pc, tag, reg, 0);
 		if (Cardbus_mapreg_map(ca->ca_ct, reg,
 		    PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0,
 		    &bar_tag, &bar_memh, &bar_addr, &bar_size)) {
@@ -213,12 +213,12 @@ cardbus_read_tuples(struct cardbus_attach_args *ca, pcireg_t cis_ptr,
 
 			save = splhigh();
 			/* enable rom address decoder */
-			exrom = cardbus_conf_read(cc, cf, tag, reg);
-			cardbus_conf_write(cc, cf, tag, reg, exrom | 1);
+			exrom = pci_conf_read(pc, tag, reg);
+			pci_conf_write(pc, tag, reg, exrom | 1);
 
-			command = cardbus_conf_read(cc, cf, tag,
+			command = pci_conf_read(pc, tag,
 			    PCI_COMMAND_STATUS_REG);
-			cardbus_conf_write(cc, cf, tag,
+			pci_conf_write(pc, tag,
 			    PCI_COMMAND_STATUS_REG,
 			    command | PCI_COMMAND_MEM_ENABLE);
 
@@ -243,13 +243,13 @@ cardbus_read_tuples(struct cardbus_attach_args *ca, pcireg_t cis_ptr,
 				SIMPLEQ_REMOVE_HEAD(&rom_image, next);
 				free(p, M_DEVBUF);
 			}
-			exrom = cardbus_conf_read(cc, cf, tag, reg);
-			cardbus_conf_write(cc, cf, tag, reg, exrom & ~1);
+			exrom = pci_conf_read(pc, tag, reg);
+			pci_conf_write(pc, tag, reg, exrom & ~1);
 			splx(save);
 		} else {
-			command = cardbus_conf_read(cc, cf, tag,
+			command = pci_conf_read(pc, tag,
 			    PCI_COMMAND_STATUS_REG);
-			cardbus_conf_write(cc, cf, tag,
+			pci_conf_write(pc, tag,
 			    PCI_COMMAND_STATUS_REG,
     			    command | PCI_COMMAND_MEM_ENABLE);
 			/* XXX byte order? */
@@ -257,11 +257,11 @@ cardbus_read_tuples(struct cardbus_attach_args *ca, pcireg_t cis_ptr,
 			    cis_ptr, tuples, 256);
 			found++;
 		}
-		command = cardbus_conf_read(cc, cf, tag,
+		command = pci_conf_read(pc, tag,
 		    PCI_COMMAND_STATUS_REG);
-		cardbus_conf_write(cc, cf, tag, PCI_COMMAND_STATUS_REG,
+		pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG,
 		    command & ~PCI_COMMAND_MEM_ENABLE);
-		cardbus_conf_write(cc, cf, tag, reg, 0);
+		pci_conf_write(pc, tag, reg, 0);
 
 		Cardbus_mapreg_unmap(ca->ca_ct, reg, bar_tag, bar_memh,
 		    bar_size);
@@ -383,6 +383,7 @@ cardbus_attach_card(struct cardbus_softc *sc)
 	struct device *csc;
 	int no_work_funcs = 0;
 	cardbus_devfunc_t ct;
+	pci_chipset_tag_t pc = sc->sc_pc;
 	int i;
 
 	cc = sc->sc_cc;
@@ -402,11 +403,11 @@ cardbus_attach_card(struct cardbus_softc *sc)
 
 	function = 0;
 
-	tag = cardbus_make_tag(cc, cf, sc->sc_bus, sc->sc_device, function);
+	tag = pci_make_tag(pc, sc->sc_bus, sc->sc_device, function);
 
 	/* Wait until power comes up.  Maximum 500 ms. */
 	for (i = 0; i < 5; ++i) {
-		id = cardbus_conf_read(cc, cf, tag, PCI_ID_REG);
+		id = pci_conf_read(pc, tag, PCI_ID_REG);
 		if (id != 0xffffffff && id != 0)
 			break;
 		if (cold) {	/* before kernel thread invoked */
@@ -421,7 +422,7 @@ cardbus_attach_card(struct cardbus_softc *sc)
 	if (i == 5)
 		return (0);
 
-	bhlc = cardbus_conf_read(cc, cf, tag, PCI_BHLC_REG);
+	bhlc = pci_conf_read(pc, tag, PCI_BHLC_REG);
 	DPRINTF(("%s bhlc 0x%08x -> ", sc->sc_dev.dv_xname, bhlc));
 	nfunction = PCI_HDRTYPE_MULTIFN(bhlc) ? 8 : 1;
 
@@ -432,12 +433,12 @@ cardbus_attach_card(struct cardbus_softc *sc)
 	for (function = 0; function < nfunction; function++) {
 		struct cardbus_attach_args ca;
 
-		tag = cardbus_make_tag(cc, cf, sc->sc_bus, sc->sc_device,
+		tag = pci_make_tag(pc, sc->sc_bus, sc->sc_device,
 		    function);
 
-		id = cardbus_conf_read(cc, cf, tag, PCI_ID_REG);
-		class = cardbus_conf_read(cc, cf, tag, PCI_CLASS_REG);
-		cis_ptr = cardbus_conf_read(cc, cf, tag, CARDBUS_CIS_REG);
+		id = pci_conf_read(pc, tag, PCI_ID_REG);
+		class = pci_conf_read(pc, tag, PCI_CLASS_REG);
+		cis_ptr = pci_conf_read(pc, tag, CARDBUS_CIS_REG);
 
 		/* Invalid vendor ID value? */
 		if (PCI_VENDOR(id) == PCI_VENDOR_INVALID)
@@ -450,16 +451,16 @@ cardbus_attach_card(struct cardbus_softc *sc)
 		enable_function(sc, cdstatus, function);
 
 		/* clean up every BAR */
-		cardbus_conf_write(cc, cf, tag, CARDBUS_BASE0_REG, 0);
-		cardbus_conf_write(cc, cf, tag, CARDBUS_BASE1_REG, 0);
-		cardbus_conf_write(cc, cf, tag, CARDBUS_BASE2_REG, 0);
-		cardbus_conf_write(cc, cf, tag, CARDBUS_BASE3_REG, 0);
-		cardbus_conf_write(cc, cf, tag, CARDBUS_BASE4_REG, 0);
-		cardbus_conf_write(cc, cf, tag, CARDBUS_BASE5_REG, 0);
-		cardbus_conf_write(cc, cf, tag, CARDBUS_ROM_REG, 0);
+		pci_conf_write(pc, tag, CARDBUS_BASE0_REG, 0);
+		pci_conf_write(pc, tag, CARDBUS_BASE1_REG, 0);
+		pci_conf_write(pc, tag, CARDBUS_BASE2_REG, 0);
+		pci_conf_write(pc, tag, CARDBUS_BASE3_REG, 0);
+		pci_conf_write(pc, tag, CARDBUS_BASE4_REG, 0);
+		pci_conf_write(pc, tag, CARDBUS_BASE5_REG, 0);
+		pci_conf_write(pc, tag, CARDBUS_ROM_REG, 0);
 
 		/* set initial latency and cacheline size */
-		bhlc = cardbus_conf_read(cc, cf, tag, PCI_BHLC_REG);
+		bhlc = pci_conf_read(pc, tag, PCI_BHLC_REG);
 		DPRINTF(("%s func%d bhlc 0x%08x -> ", sc->sc_dev.dv_xname,
 		    function, bhlc));
 		bhlc &= ~((PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT) |
@@ -469,15 +470,15 @@ cardbus_attach_card(struct cardbus_softc *sc)
 		bhlc |= ((sc->sc_lattimer & PCI_LATTIMER_MASK) <<
 		    PCI_LATTIMER_SHIFT);
 
-		cardbus_conf_write(cc, cf, tag, PCI_BHLC_REG, bhlc);
-		bhlc = cardbus_conf_read(cc, cf, tag, PCI_BHLC_REG);
+		pci_conf_write(pc, tag, PCI_BHLC_REG, bhlc);
+		bhlc = pci_conf_read(pc, tag, PCI_BHLC_REG);
 		DPRINTF(("0x%08x\n", bhlc));
 
 		if (PCI_LATTIMER(bhlc) < 0x10) {
 			bhlc &= ~(PCI_LATTIMER_MASK <<
 			    PCI_LATTIMER_SHIFT);
 			bhlc |= (0x10 << PCI_LATTIMER_SHIFT);
-			cardbus_conf_write(cc, cf, tag, PCI_BHLC_REG,
+			pci_conf_write(pc, tag, PCI_BHLC_REG,
 			    bhlc);
 		}
 
@@ -515,6 +516,7 @@ cardbus_attach_card(struct cardbus_softc *sc)
 		ca.ca_function = function;
 		ca.ca_id = id;
 		ca.ca_class = class;
+		ca.ca_pc = sc->sc_pc;
 
 		ca.ca_intrline = sc->sc_intrline;
 
@@ -701,8 +703,7 @@ disable_function(struct cardbus_softc *sc, int function)
 int
 cardbus_function_enable(struct cardbus_softc *sc, int func)
 {
-	cardbus_chipset_tag_t cc = sc->sc_cc;
-	cardbus_function_tag_t cf = sc->sc_cf;
+	pci_chipset_tag_t pc = sc->sc_pc;
 	pcireg_t command;
 	pcitag_t tag;
 
@@ -715,15 +716,13 @@ cardbus_function_enable(struct cardbus_softc *sc, int func)
 
 	/* exiting critical area */
 
-	tag = cardbus_make_tag(cc, cf, sc->sc_bus, sc->sc_device, func);
+	tag = pci_make_tag(pc, sc->sc_bus, sc->sc_device, func);
 
-	command = cardbus_conf_read(cc, cf, tag, PCI_COMMAND_STATUS_REG);
+	command = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
 	command |= (PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_IO_ENABLE |
 	    PCI_COMMAND_MASTER_ENABLE); /* XXX: good guess needed */
 
-	cardbus_conf_write(cc, cf, tag, PCI_COMMAND_STATUS_REG, command);
-
-	cardbus_free_tag(cc, cf, tag);
+	pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, command);
 
 	DPRINTF(("%x\n", sc->sc_poweron_func));
 
@@ -746,45 +745,6 @@ cardbus_function_disable(struct cardbus_softc *sc, int func)
 	return (0);
 }
 
-/*
- * int cardbus_get_capability(cardbus_chipset_tag_t cc,
- *	cardbus_function_tag_t cf, pcitag_t tag, int capid, int *offset,
- *	pcireg_t *value)
- *
- *	Find the specified PCI capability.
- */
-int
-cardbus_get_capability(cardbus_chipset_tag_t cc, cardbus_function_tag_t cf,
-    pcitag_t tag, int capid, int *offset, pcireg_t *value)
-{
-	pcireg_t reg;
-	unsigned int ofs;
-
-	reg = cardbus_conf_read(cc, cf, tag, PCI_COMMAND_STATUS_REG);
-	if (!(reg & PCI_STATUS_CAPLIST_SUPPORT))
-		return (0);
-
-	ofs = PCI_CAPLIST_PTR(cardbus_conf_read(cc, cf, tag,
-	    PCI_CAPLISTPTR_REG));
-	while (ofs != 0) {
-#ifdef DIAGNOSTIC
-		if ((ofs & 3) || (ofs < 0x40))
-			panic("cardbus_get_capability 0x%x", ofs);
-#endif
-		reg = cardbus_conf_read(cc, cf, tag, ofs);
-		if (PCI_CAPLIST_CAP(reg) == capid) {
-			if (offset)
-				*offset = ofs;
-			if (value)
-				*value = reg;
-			return (1);
-		}
-		ofs = PCI_CAPLIST_NEXT(reg);
-	}
-
-	return (0);
-}
-
 int
 cardbus_matchbyid(struct cardbus_attach_args *ca,
     const struct pci_matchid *ids, int nent)
diff --git a/sys/dev/cardbus/cardbus_map.c b/sys/dev/cardbus/cardbus_map.c
index f6fb1a74f93..534854cd198 100644
--- a/sys/dev/cardbus/cardbus_map.c
+++ b/sys/dev/cardbus/cardbus_map.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cardbus_map.c,v 1.12 2010/03/27 20:04:03 jsg Exp $	*/
+/*	$OpenBSD: cardbus_map.c,v 1.13 2010/03/27 21:40:13 jsg Exp $	*/
 /*	$NetBSD: cardbus_map.c,v 1.10 2000/03/07 00:31:46 mycroft Exp $	*/
 
 /*
@@ -56,25 +56,25 @@
 #endif
 
 
-STATIC int cardbus_io_find(cardbus_chipset_tag_t, cardbus_function_tag_t,
+STATIC int cardbus_io_find(pci_chipset_tag_t,
 	       pcitag_t, int, pcireg_t, bus_addr_t *, bus_size_t *,
 	       int *);
-STATIC int cardbus_mem_find(cardbus_chipset_tag_t, cardbus_function_tag_t,
+STATIC int cardbus_mem_find(pci_chipset_tag_t,
 	       pcitag_t, int, pcireg_t, bus_addr_t *, bus_size_t *,
 	       int *);
 
 int
-cardbus_mapreg_probe(cardbus_chipset_tag_t cc, cardbus_function_tag_t cf,
+cardbus_mapreg_probe(pci_chipset_tag_t pc,
     pcitag_t tag, int reg, pcireg_t *typep)
 {
 	pcireg_t address, mask;
 	int s;
 
 	s = splhigh();
-	address = cardbus_conf_read(cc, cf, tag, reg);
-	cardbus_conf_write(cc, cf, tag, reg, 0xffffffff);
-	mask = cardbus_conf_read(cc, cf, tag, reg);
-	cardbus_conf_write(cc, cf, tag, reg, address);
+	address = pci_conf_read(pc, tag, reg);
+	pci_conf_write(pc, tag, reg, 0xffffffff);
+	mask = pci_conf_read(pc, tag, reg);
+	pci_conf_write(pc, tag, reg, address);
 	splx(s);
 
 	if (mask == 0) /* unimplemented mapping register */
@@ -86,14 +86,14 @@ cardbus_mapreg_probe(cardbus_chipset_tag_t cc, cardbus_function_tag_t cf,
 }
 
 /*
- * STATIC int cardbus_io_find(cardbus_chipset_tag_t cc,
- *			      cardbus_function_tag_t cf, pcitag_t tag,
+ * STATIC int cardbus_io_find(pci_chipset_tag_t pc,
+ *			      pcitag_t tag,
  *			      int reg, pcireg_t type, bus_addr_t *basep,
  *			      bus_size_t *sizep, int *flagsp)
  * This code is stolen from sys/dev/pci_map.c.
  */
 STATIC int
-cardbus_io_find(cardbus_chipset_tag_t cc, cardbus_function_tag_t cf,
+cardbus_io_find(pci_chipset_tag_t pc,
     pcitag_t tag, int reg, pcireg_t type, bus_addr_t *basep,
     bus_size_t *sizep, int *flagsp)
 {
@@ -119,10 +119,10 @@ cardbus_io_find(cardbus_chipset_tag_t cc, cardbus_function_tag_t cf,
 	 * what we get back.
 	 */
 	s = splhigh();
-	address = cardbus_conf_read(cc, cf, tag, reg);
-	cardbus_conf_write(cc, cf, tag, reg, 0xffffffff);
-	mask = cardbus_conf_read(cc, cf, tag, reg);
-	cardbus_conf_write(cc, cf, tag, reg, address);
+	address = pci_conf_read(pc, tag, reg);
+	pci_conf_write(pc, tag, reg, 0xffffffff);
+	mask = pci_conf_read(pc, tag, reg);
+	pci_conf_write(pc, tag, reg, address);
 	splx(s);
 
 	if (PCI_MAPREG_TYPE(address) != PCI_MAPREG_TYPE_IO) {
@@ -146,14 +146,14 @@ cardbus_io_find(cardbus_chipset_tag_t cc, cardbus_function_tag_t cf,
 }
 
 /*
- * STATIC int cardbus_mem_find(cardbus_chipset_tag_t cc,
- *			       cardbus_function_tag_t cf, pcitag_t tag,
+ * STATIC int cardbus_mem_find(pci_chipset_tag_t pc,
+ *			       pcitag_t tag,
  *			       int reg, pcireg_t type, bus_addr_t *basep,
  *			       bus_size_t *sizep, int *flagsp)
  * This code is stolen from sys/dev/pci_map.c.
  */
 STATIC int
-cardbus_mem_find(cardbus_chipset_tag_t cc, cardbus_function_tag_t cf,
+cardbus_mem_find(pci_chipset_tag_t pc,
     pcitag_t tag, int reg, pcireg_t type, bus_addr_t *basep,
     bus_size_t *sizep, int *flagsp)
 {
@@ -176,10 +176,10 @@ cardbus_mem_find(cardbus_chipset_tag_t cc, cardbus_function_tag_t cf,
 	 * what we get back.
 	 */
 	s = splhigh();
-	address = cardbus_conf_read(cc, cf, tag, reg);
-	cardbus_conf_write(cc, cf, tag, reg, 0xffffffff);
-	mask = cardbus_conf_read(cc, cf, tag, reg);
-	cardbus_conf_write(cc, cf, tag, reg, address);
+	address = pci_conf_read(pc, tag, reg);
+	pci_conf_write(pc, tag, reg, 0xffffffff);
+	mask = pci_conf_read(pc, tag, reg);
+	pci_conf_write(pc, tag, reg, address);
 	splx(s);
 
 	if (reg != CARDBUS_ROM_REG) {
@@ -247,6 +247,7 @@ cardbus_mapreg_map(struct cardbus_softc *sc, int func, int reg,
     bus_space_handle_t *handlep, bus_addr_t *basep, bus_size_t *sizep)
 {
 	cardbus_chipset_tag_t cc = sc->sc_cc;
+	pci_chipset_tag_t pc = sc->sc_pc;
 	cardbus_function_tag_t cf = sc->sc_cf;
 	bus_space_tag_t bustag;
 	rbus_tag_t rbustag;
@@ -256,20 +257,20 @@ cardbus_mapreg_map(struct cardbus_softc *sc, int func, int reg,
 	int flags;
 	int status = 0;
 
-	pcitag_t tag = cardbus_make_tag(cc, cf, sc->sc_bus,
+	pcitag_t tag = pci_make_tag(pc, sc->sc_bus,
 	    sc->sc_device, func);
 
 	DPRINTF(("cardbus_mapreg_map called: %s %x\n", sc->sc_dev.dv_xname,
 	   type));
 
 	if (PCI_MAPREG_TYPE(type) == PCI_MAPREG_TYPE_IO) {
-		if (cardbus_io_find(cc, cf, tag, reg, type, &base, &size,
+		if (cardbus_io_find(pc, tag, reg, type, &base, &size,
 		    &flags))
 			status = 1;
 		bustag = sc->sc_iot;
 		rbustag = sc->sc_rbus_iot;
 	} else {
-		if (cardbus_mem_find(cc, cf, tag, reg, type, &base, &size,
+		if (cardbus_mem_find(pc, tag, reg, type, &base, &size,
 		    &flags))
 			status = 1;
 		bustag = sc->sc_memt;
@@ -284,7 +285,7 @@ cardbus_mapreg_map(struct cardbus_softc *sc, int func, int reg,
 			panic("io alloc");
 		}
 	}
-	cardbus_conf_write(cc, cf, tag, reg, base);
+	pci_conf_write(pc, tag, reg, base);
 
 	DPRINTF(("cardbus_mapreg_map: physaddr %lx\n", (unsigned long)base));
 
@@ -296,7 +297,6 @@ cardbus_mapreg_map(struct cardbus_softc *sc, int func, int reg,
 		*basep = base;
 	if (sizep != 0)
 		*sizep = size;
-	cardbus_free_tag(cc, cf, tag);
 
 	return (0);
 }
@@ -319,6 +319,7 @@ cardbus_mapreg_unmap(struct cardbus_softc *sc, int func, int reg,
     bus_space_tag_t tag, bus_space_handle_t handle, bus_size_t size)
 {
 	cardbus_chipset_tag_t cc = sc->sc_cc;
+	pci_chipset_tag_t pc = sc->sc_pc;
 	cardbus_function_tag_t cf = sc->sc_cf;
 	int st = 1;
 	pcitag_t cardbustag;
@@ -335,13 +336,11 @@ cardbus_mapreg_unmap(struct cardbus_softc *sc, int func, int reg,
 	} else
 		return (1);
 
-	cardbustag = cardbus_make_tag(cc, cf, sc->sc_bus, sc->sc_device, func);
+	cardbustag = pci_make_tag(pc, sc->sc_bus, sc->sc_device, func);
 
-	cardbus_conf_write(cc, cf, cardbustag, reg, 0);
+	pci_conf_write(pc, cardbustag, reg, 0);
 
 	(*cf->cardbus_space_free)(cc, rbustag, handle, size);
 
-	cardbus_free_tag(cc, cf, cardbustag);
-
 	return (st);
 }
diff --git a/sys/dev/cardbus/cardbusvar.h b/sys/dev/cardbus/cardbusvar.h
index e0b46818cda..60355398415 100644
--- a/sys/dev/cardbus/cardbusvar.h
+++ b/sys/dev/cardbus/cardbusvar.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cardbusvar.h,v 1.17 2010/03/27 20:04:03 jsg Exp $	*/
+/*	$OpenBSD: cardbusvar.h,v 1.18 2010/03/27 21:40:13 jsg Exp $	*/
 /*	$NetBSD: cardbusvar.h,v 1.17 2000/04/02 19:11:37 mycroft Exp $	*/
 
 /*
@@ -74,13 +74,6 @@ typedef struct cardbus_functions {
 	void (*cardbus_intr_disestablish)(cardbus_chipset_tag_t, void *);
 	int (*cardbus_ctrl)(cardbus_chipset_tag_t, int);
 	int (*cardbus_power)(cardbus_chipset_tag_t, int);
-
-	pcitag_t (*cardbus_make_tag)(cardbus_chipset_tag_t, int, int, int);
-	void (*cardbus_free_tag)(cardbus_chipset_tag_t, pcitag_t);
-	pcireg_t (*cardbus_conf_read)(cardbus_chipset_tag_t,
-	    pcitag_t, int);
-	void (*cardbus_conf_write)(cardbus_chipset_tag_t, pcitag_t, int,
-	    pcireg_t);
 } cardbus_function_t, *cardbus_function_tag_t;
 
 /*
@@ -95,6 +88,7 @@ struct cbslot_attach_args {
 	int cba_bus;			/* cardbus bus number */
 
 	cardbus_chipset_tag_t cba_cc;	/* cardbus chipset */
+	pci_chipset_tag_t cba_pc;	/* pci chipset */
 	cardbus_function_tag_t cba_cf;	/* cardbus functions */
 	int cba_intrline;		/* interrupt line */
 
@@ -129,6 +123,7 @@ struct cardbus_softc {
 	bus_dma_tag_t sc_dmat;		/* DMA tag */
 
 	cardbus_chipset_tag_t sc_cc;	/* CardBus chipset */
+	pci_chipset_tag_t sc_pc;	/* PCI chipset */
 	cardbus_function_tag_t sc_cf;	/* CardBus function */
 
 	rbus_tag_t sc_rbus_iot;		/* CardBus i/o rbus tag */
@@ -202,6 +197,7 @@ struct cardbus_cis_info {
 struct cardbus_attach_args {
 	int ca_unit;
 	cardbus_devfunc_t ca_ct;
+	pci_chipset_tag_t ca_pc;	/* PCI chipset */
 
 	bus_space_tag_t ca_iot;		/* CardBus I/O space tag */
 	bus_space_tag_t ca_memt;	/* CardBus MEM space tag */
@@ -275,8 +271,7 @@ void   *cardbus_intr_establish(cardbus_chipset_tag_t, cardbus_function_tag_t,
 void	cardbus_intr_disestablish(cardbus_chipset_tag_t,
 	    cardbus_function_tag_t, void *handler);
 
-int	cardbus_mapreg_probe(cardbus_chipset_tag_t, cardbus_function_tag_t,
-	    pcitag_t, int, pcireg_t *);
+int	cardbus_mapreg_probe(pci_chipset_tag_t, pcitag_t, int, pcireg_t *);
 int	cardbus_mapreg_map(struct cardbus_softc *, int, int, pcireg_t,
 	    int, bus_space_tag_t *, bus_space_handle_t *, bus_addr_t *,
 	    bus_size_t *);
@@ -288,8 +283,6 @@ int	cardbus_function_disable(struct cardbus_softc *, int function);
 
 int	cardbus_matchbyid(struct cardbus_attach_args *,
 	    const struct pci_matchid *, int);
-int	cardbus_get_capability(cardbus_chipset_tag_t, cardbus_function_tag_t,
-	    pcitag_t, int, int *, pcireg_t *);
 
 #define Cardbus_function_enable(ct)			\
     cardbus_function_enable((ct)->ct_sc, (ct)->ct_func)
@@ -303,24 +296,4 @@ int	cardbus_get_capability(cardbus_chipset_tag_t, cardbus_function_tag_t,
     cardbus_mapreg_unmap((ct)->ct_sc, (ct->ct_func), 	\
     (reg), (tag), (handle), (size))
 
-#define Cardbus_make_tag(ct)				\
-    (*(ct)->ct_cf->cardbus_make_tag)((ct)->ct_cc,	\
-    (ct)->ct_bus, (ct)->ct_dev, (ct)->ct_func)
-#define cardbus_make_tag(cc, cf, bus, device, function)	\
-    ((cf)->cardbus_make_tag)((cc), (bus), (device), (function))
-
-#define Cardbus_free_tag(ct, tag)			\
-    (*(ct)->ct_cf->cardbus_free_tag)((ct)->ct_cc, (tag))
-#define cardbus_free_tag(cc, cf, tag)			\
-    (*(cf)->cardbus_free_tag)(cc, (tag))
-
-#define Cardbus_conf_read(ct, tag, offs)		\
-    (*(ct)->ct_cf->cardbus_conf_read)((ct)->ct_cc, (tag), (offs))
-#define cardbus_conf_read(cc, cf, tag, offs)		\
-    ((cf)->cardbus_conf_read)((cc), (tag), (offs))
-#define Cardbus_conf_write(ct, tag, offs, val)		\
-    (*(ct)->ct_cf->cardbus_conf_write)((ct)->ct_cc, (tag), (offs), (val))
-#define cardbus_conf_write(cc, cf, tag, offs, val)	\
-    ((cf)->cardbus_conf_write)((cc), (tag), (offs), (val))
-
 #endif /* !_DEV_CARDBUS_CARDBUSVAR_H_ */
diff --git a/sys/dev/cardbus/com_cardbus.c b/sys/dev/cardbus/com_cardbus.c
index dc528c7e9a5..2abf85cdc37 100644
--- a/sys/dev/cardbus/com_cardbus.c
+++ b/sys/dev/cardbus/com_cardbus.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: com_cardbus.c,v 1.38 2010/03/27 20:04:03 jsg Exp $ */
+/* $OpenBSD: com_cardbus.c,v 1.39 2010/03/27 21:40:13 jsg Exp $ */
 /* $NetBSD: com_cardbus.c,v 1.4 2000/04/17 09:21:59 joda Exp $ */
 
 /*
@@ -77,6 +77,7 @@ struct com_cardbus_softc {
 	pcireg_t		cc_reg;
 	int			cc_type;
 	u_char			cc_bug;
+	pci_chipset_tag_t	cc_pc;
 };
 
 #define DEVNAME(CSC) ((CSC)->cc_com.sc_dev.dv_xname)
@@ -178,7 +179,7 @@ com_cardbus_gofigure(struct cardbus_attach_args *ca,
 		return (0);
 	}
 
-	cis_ptr = Cardbus_conf_read(csc->cc_ct, csc->cc_tag, CARDBUS_CIS_REG);
+	cis_ptr = pci_conf_read(ca->ca_pc, csc->cc_tag, CARDBUS_CIS_REG);
 
 	/* otherwise try to deduce which BAR and type to use from CIS.  If
 	   there is only one BAR, it must be the one we should use, if
@@ -236,9 +237,11 @@ com_cardbus_attach(struct device *parent, struct device *self, void *aux)
 	struct com_softc *sc = (struct com_softc*)self;
 	struct com_cardbus_softc *csc = (struct com_cardbus_softc*)self;
 	struct cardbus_attach_args *ca = aux;
+	cardbus_devfunc_t ct = csc->cc_ct;
 
 	csc->cc_ct = ca->ca_ct;
-	csc->cc_tag = Cardbus_make_tag(csc->cc_ct);
+	csc->cc_tag = pci_make_tag(ca->ca_pc, ct->ct_bus, ct->ct_dev, ct->ct_func);
+	csc->cc_pc = ca->ca_pc;
 
 	if (com_cardbus_gofigure(ca, csc) != 0)
 		return;
@@ -285,30 +288,31 @@ com_cardbus_setup(struct com_cardbus_softc *csc)
 {
 	cardbus_devfunc_t ct = csc->cc_ct;
 	cardbus_chipset_tag_t cc = ct->ct_cc;
+	pci_chipset_tag_t pc = csc->cc_pc;
 	cardbus_function_tag_t cf = ct->ct_cf;
 	pcireg_t reg;
 
-	cardbus_conf_write(cc, cf, csc->cc_tag, csc->cc_reg, csc->cc_base);
+	pci_conf_write(pc, csc->cc_tag, csc->cc_reg, csc->cc_base);
 
 	/* enable accesses on cardbus bridge */
 	cf->cardbus_ctrl(cc, csc->cc_cben);
 	cf->cardbus_ctrl(cc, CARDBUS_BM_ENABLE);
 
 	/* and the card itself */
-	reg = cardbus_conf_read(cc, cf, csc->cc_tag, PCI_COMMAND_STATUS_REG);
+	reg = pci_conf_read(pc, csc->cc_tag, PCI_COMMAND_STATUS_REG);
 	reg &= ~(PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE);
 	reg |= csc->cc_csr;
-	cardbus_conf_write(cc, cf, csc->cc_tag, PCI_COMMAND_STATUS_REG, reg);
+	pci_conf_write(pc, csc->cc_tag, PCI_COMMAND_STATUS_REG, reg);
 
 	/*
 	 * Make sure the latency timer is set to some reasonable
 	 * value.
 	 */
-	reg = cardbus_conf_read(cc, cf, csc->cc_tag, PCI_BHLC_REG);
+	reg = pci_conf_read(pc, csc->cc_tag, PCI_BHLC_REG);
 	if (PCI_LATTIMER(reg) < 0x20) {
 			reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
 			reg |= (0x20 << PCI_LATTIMER_SHIFT);
-			cardbus_conf_write(cc, cf, csc->cc_tag, PCI_BHLC_REG, reg);
+			pci_conf_write(pc, csc->cc_tag, PCI_BHLC_REG, reg);
 	}
 }
 
diff --git a/sys/dev/cardbus/ehci_cardbus.c b/sys/dev/cardbus/ehci_cardbus.c
index 174473928c5..bd4d2b913c8 100644
--- a/sys/dev/cardbus/ehci_cardbus.c
+++ b/sys/dev/cardbus/ehci_cardbus.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ehci_cardbus.c,v 1.14 2010/03/27 20:04:03 jsg Exp $ */
+/*	$OpenBSD: ehci_cardbus.c,v 1.15 2010/03/27 21:40:13 jsg Exp $ */
 /*	$NetBSD: ehci_cardbus.c,v 1.6.6.3 2004/09/21 13:27:25 skrll Exp $	*/
 
 /*
@@ -99,6 +99,7 @@ ehci_cardbus_attach(struct device *parent, struct device *self, void *aux)
 	struct cardbus_attach_args *ca = aux;
 	cardbus_devfunc_t ct = ca->ca_ct;
 	cardbus_chipset_tag_t cc = ct->ct_cc;
+	pci_chipset_tag_t pc = ca->ca_pc;
 	cardbus_function_tag_t cf = ct->ct_cf;
 	pcireg_t csr;
 	usbd_status r;
@@ -121,9 +122,9 @@ ehci_cardbus_attach(struct device *parent, struct device *self, void *aux)
 	(ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
 
 	/* Enable the device. */
-	csr = cardbus_conf_read(cc, cf, ca->ca_tag,
+	csr = pci_conf_read(pc, ca->ca_tag,
 				PCI_COMMAND_STATUS_REG);
-	cardbus_conf_write(cc, cf, ca->ca_tag, PCI_COMMAND_STATUS_REG,
+	pci_conf_write(pc, ca->ca_tag, PCI_COMMAND_STATUS_REG,
 		       csr | PCI_COMMAND_MASTER_ENABLE
 			   | PCI_COMMAND_MEM_ENABLE);
 
diff --git a/sys/dev/cardbus/if_acx_cardbus.c b/sys/dev/cardbus/if_acx_cardbus.c
index 368d5abf6ea..328ab68a922 100644
--- a/sys/dev/cardbus/if_acx_cardbus.c
+++ b/sys/dev/cardbus/if_acx_cardbus.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: if_acx_cardbus.c,v 1.17 2010/03/27 20:04:03 jsg Exp $  */
+/*	$OpenBSD: if_acx_cardbus.c,v 1.18 2010/03/27 21:40:13 jsg Exp $  */
 
 /*
  * Copyright (c) 2006 Claudio Jeker <claudio@openbsd.org>
@@ -79,6 +79,7 @@ struct acx_cardbus_softc {
 	bus_size_t		sc_iomapsize;
 
 	int			sc_acx_attached;
+	pci_chipset_tag_t	sc_pc;
 };
 
 int	acx_cardbus_match(struct device *, void *, void *);
@@ -123,6 +124,7 @@ acx_cardbus_attach(struct device *parent, struct device *self, void *aux)
 	csc->sc_ct = ct;
 	csc->sc_tag = ca->ca_tag;
 	csc->sc_intrline = ca->ca_intrline;
+	csc->sc_pc = ca->ca_pc;
 
 	/* power management hooks */
 	sc->sc_enable = acx_cardbus_enable;
@@ -281,12 +283,13 @@ acx_cardbus_setup(struct acx_cardbus_softc *csc)
 {
 	cardbus_devfunc_t ct = csc->sc_ct;
 	cardbus_chipset_tag_t cc = ct->ct_cc;
+	pci_chipset_tag_t pc = csc->sc_pc;
 	cardbus_function_tag_t cf = ct->ct_cf;
 	pcireg_t reg;
 	int b1 = CARDBUS_BASE0_REG, b2 = CARDBUS_BASE1_REG;
 
 	if (csc->sc_iobar_val) {
-		cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_BASE0_REG,
+		pci_conf_write(pc, csc->sc_tag, CARDBUS_BASE0_REG,
 		    csc->sc_iobar_val);
 		b1 = CARDBUS_BASE1_REG;
 		b2 = CARDBUS_BASE2_REG;
@@ -294,21 +297,21 @@ acx_cardbus_setup(struct acx_cardbus_softc *csc)
 	}
 
 	/* program the BAR */
-	cardbus_conf_write(cc, cf, csc->sc_tag, b1, csc->sc_bar1_val);
-	cardbus_conf_write(cc, cf, csc->sc_tag, b2, csc->sc_bar2_val);
+	pci_conf_write(pc, csc->sc_tag, b1, csc->sc_bar1_val);
+	pci_conf_write(pc, csc->sc_tag, b2, csc->sc_bar2_val);
 
 	/* make sure the right access type is on the cardbus bridge */
 	(*cf->cardbus_ctrl)(cc, CARDBUS_MEM_ENABLE);
 	(*cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
 
 	/* enable the appropriate bits in the PCI CSR */
-	reg = cardbus_conf_read(cc, cf, csc->sc_tag,
+	reg = pci_conf_read(pc, csc->sc_tag,
 	    PCI_COMMAND_STATUS_REG);
 	reg |= PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_MEM_ENABLE;
 #if 0
 	if (csc->sc_iobar_val)
 		reg |= PCI_COMMAND_IO_ENABLE;
 #endif
-	cardbus_conf_write(cc, cf, csc->sc_tag, PCI_COMMAND_STATUS_REG,
+	pci_conf_write(pc, csc->sc_tag, PCI_COMMAND_STATUS_REG,
 	    reg);
 }
diff --git a/sys/dev/cardbus/if_ath_cardbus.c b/sys/dev/cardbus/if_ath_cardbus.c
index 7ef034b79aa..37a59ba1ae4 100644
--- a/sys/dev/cardbus/if_ath_cardbus.c
+++ b/sys/dev/cardbus/if_ath_cardbus.c
@@ -1,4 +1,4 @@
-/*      $OpenBSD: if_ath_cardbus.c,v 1.14 2010/03/27 20:04:03 jsg Exp $   */
+/*      $OpenBSD: if_ath_cardbus.c,v 1.15 2010/03/27 21:40:13 jsg Exp $   */
 /*	$NetBSD: if_ath_cardbus.c,v 1.4 2004/08/02 19:14:28 mycroft Exp $ */
 
 /*
@@ -92,6 +92,7 @@ struct ath_cardbus_softc {
 	pcireg_t sc_bar_val;		/* value of the BAR */
 
 	int	sc_intrline;		/* interrupt line */
+	pci_chipset_tag_t sc_pc;
 };
 
 int	ath_cardbus_match(struct device *, void *, void *);
@@ -139,6 +140,7 @@ ath_cardbus_attach(struct device *parent, struct device *self, void *aux)
 	sc->sc_dmat = ca->ca_dmat;
 	csc->sc_ct = ct;
 	csc->sc_tag = ca->ca_tag;
+	csc->sc_pc = ca->ca_pc;
 
 	/*
 	 * Power management hooks.
@@ -275,7 +277,7 @@ ath_cardbus_setup(struct ath_cardbus_softc *csc)
 {
 	cardbus_devfunc_t ct = csc->sc_ct;
 	cardbus_chipset_tag_t cc = ct->ct_cc;
-	cardbus_function_tag_t cf = ct->ct_cf;
+	pci_chipset_tag_t pc = csc->sc_pc;
 	pcireg_t reg;
 
 #ifdef notyet
@@ -284,7 +286,7 @@ ath_cardbus_setup(struct ath_cardbus_softc *csc)
 #endif
 
 	/* Program the BAR. */
-	cardbus_conf_write(cc, cf, csc->sc_tag, ATH_PCI_MMBA,
+	pci_conf_write(pc, csc->sc_tag, ATH_PCI_MMBA,
 	    csc->sc_bar_val);
 
 	/* Make sure the right access type is on the CardBus bridge. */
@@ -292,20 +294,20 @@ ath_cardbus_setup(struct ath_cardbus_softc *csc)
 	(*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
 
 	/* Enable the appropriate bits in the PCI CSR. */
-	reg = cardbus_conf_read(cc, cf, csc->sc_tag,
+	reg = pci_conf_read(pc, csc->sc_tag,
 	    PCI_COMMAND_STATUS_REG);
 	reg |= PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_MEM_ENABLE;
-	cardbus_conf_write(cc, cf, csc->sc_tag, PCI_COMMAND_STATUS_REG,
+	pci_conf_write(pc, csc->sc_tag, PCI_COMMAND_STATUS_REG,
 	    reg);
 
 	/*
 	 * Make sure the latency timer is set to some reasonable
 	 * value.
 	 */
-	reg = cardbus_conf_read(cc, cf, csc->sc_tag, PCI_BHLC_REG);
+	reg = pci_conf_read(pc, csc->sc_tag, PCI_BHLC_REG);
 	if (PCI_LATTIMER(reg) < 0x20) {
 		reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
 		reg |= (0x20 << PCI_LATTIMER_SHIFT);
-		cardbus_conf_write(cc, cf, csc->sc_tag, PCI_BHLC_REG, reg);
+		pci_conf_write(pc, csc->sc_tag, PCI_BHLC_REG, reg);
 	}
 }
diff --git a/sys/dev/cardbus/if_athn_cardbus.c b/sys/dev/cardbus/if_athn_cardbus.c
index cf06b68ff78..9b5638c7db4 100644
--- a/sys/dev/cardbus/if_athn_cardbus.c
+++ b/sys/dev/cardbus/if_athn_cardbus.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: if_athn_cardbus.c,v 1.7 2010/03/27 20:04:03 jsg Exp $	*/
+/*	$OpenBSD: if_athn_cardbus.c,v 1.8 2010/03/27 21:40:13 jsg Exp $	*/
 
 /*-
  * Copyright (c) 2009 Damien Bergamini <damien.bergamini@free.fr>
@@ -65,6 +65,7 @@ struct athn_cardbus_softc {
 	bus_size_t		sc_mapsize;
 	pcireg_t		sc_bar_val;
 	int			sc_intrline;
+	pci_chipset_tag_t	sc_pc;
 };
 
 int	athn_cardbus_match(struct device *, void *, void *);
@@ -115,6 +116,7 @@ athn_cardbus_attach(struct device *parent, struct device *self, void *aux)
 	csc->sc_ct = ct;
 	csc->sc_tag = ca->ca_tag;
 	csc->sc_intrline = ca->ca_intrline;
+	csc->sc_pc = ca->ca_pc;
 
 	/* Power management hooks. */
 	sc->sc_enable = athn_cardbus_enable;
@@ -220,11 +222,12 @@ athn_cardbus_setup(struct athn_cardbus_softc *csc)
 {
 	cardbus_devfunc_t ct = csc->sc_ct;
 	cardbus_chipset_tag_t cc = ct->ct_cc;
+	pci_chipset_tag_t pc = csc->sc_pc;
 	cardbus_function_tag_t cf = ct->ct_cf;
 	pcireg_t reg;
 
 	/* Program the BAR. */
-	cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_BASE0_REG,
+	pci_conf_write(pc, csc->sc_tag, CARDBUS_BASE0_REG,
 	    csc->sc_bar_val);
 
 	/* Make sure the right access type is on the cardbus bridge. */
@@ -232,10 +235,10 @@ athn_cardbus_setup(struct athn_cardbus_softc *csc)
 	(*cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
 
 	/* Enable the appropriate bits in the PCI CSR. */
-	reg = cardbus_conf_read(cc, cf, csc->sc_tag,
+	reg = pci_conf_read(pc, csc->sc_tag,
 	    PCI_COMMAND_STATUS_REG);
 	reg |= PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_MEM_ENABLE;
-	cardbus_conf_write(cc, cf, csc->sc_tag, PCI_COMMAND_STATUS_REG,
+	pci_conf_write(pc, csc->sc_tag, PCI_COMMAND_STATUS_REG,
 	    reg);
 
 	/*
@@ -243,13 +246,13 @@ athn_cardbus_setup(struct athn_cardbus_softc *csc)
 	 * not doing this may cause very frequent PCI FATAL interrupts from
 	 * the card: http://bugzilla.kernel.org/show_bug.cgi?id=13483
 	 */
-	reg = cardbus_conf_read(cc, cf, csc->sc_tag, 0x40);
+	reg = pci_conf_read(pc, csc->sc_tag, 0x40);
 	reg &= ~0xff00;
-	cardbus_conf_write(cc, cf, csc->sc_tag, 0x40, reg);
+	pci_conf_write(pc, csc->sc_tag, 0x40, reg);
 
 	/* Change latency timer; default value yields poor results. */
-	reg = cardbus_conf_read(cc, cf, csc->sc_tag, PCI_BHLC_REG);
+	reg = pci_conf_read(pc, csc->sc_tag, PCI_BHLC_REG);
 	reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
 	reg |= 168 << PCI_LATTIMER_SHIFT;
-	cardbus_conf_write(cc, cf, csc->sc_tag, PCI_BHLC_REG, reg);
+	pci_conf_write(pc, csc->sc_tag, PCI_BHLC_REG, reg);
 }
diff --git a/sys/dev/cardbus/if_atw_cardbus.c b/sys/dev/cardbus/if_atw_cardbus.c
index 7c9d6ccbcc9..f1d587b7b88 100644
--- a/sys/dev/cardbus/if_atw_cardbus.c
+++ b/sys/dev/cardbus/if_atw_cardbus.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: if_atw_cardbus.c,v 1.17 2010/03/27 20:04:03 jsg Exp $	*/
+/*	$OpenBSD: if_atw_cardbus.c,v 1.18 2010/03/27 21:40:13 jsg Exp $	*/
 /*	$NetBSD: if_atw_cardbus.c,v 1.9 2004/07/23 07:07:55 dyoung Exp $	*/
 
 /*-
@@ -102,6 +102,7 @@ struct atw_cardbus_softc {
 	pcireg_t sc_bar_val;		/* value of the BAR */
 
 	int	sc_intrline;		/* interrupt line */
+	pci_chipset_tag_t sc_pc;
 };
 
 int	atw_cardbus_match(struct device *, void *, void *);
@@ -144,6 +145,7 @@ atw_cardbus_attach(struct device *parent, struct device *self, void *aux)
 	sc->sc_dmat = ca->ca_dmat;
 	csc->sc_ct = ct;
 	csc->sc_tag = ca->ca_tag;
+	csc->sc_pc = ca->ca_pc;
 
 	/*
 	 * Power management hooks.
@@ -157,7 +159,7 @@ atw_cardbus_attach(struct device *parent, struct device *self, void *aux)
 
 #if 0
 	printf(": signature %08x\n%s",
-	    cardbus_conf_read(ct->ct_cc, ct->ct_cf, csc->sc_tag, 0x80),
+	    pci_conf_read(ca->ca_pc, csc->sc_tag, 0x80),
 	    sc->sc_dev.dv_xname);
 #endif
 
@@ -322,7 +324,7 @@ atw_cardbus_setup(struct atw_cardbus_softc *csc)
 #endif
 	cardbus_devfunc_t ct = csc->sc_ct;
 	cardbus_chipset_tag_t cc = ct->ct_cc;
-	cardbus_function_tag_t cf = ct->ct_cf;
+	pci_chipset_tag_t pc = csc->sc_pc;
 	pcireg_t reg;
 
 #ifdef notyet
@@ -331,7 +333,7 @@ atw_cardbus_setup(struct atw_cardbus_softc *csc)
 #endif
 
 	/* Program the BAR. */
-	cardbus_conf_write(cc, cf, csc->sc_tag, csc->sc_bar_reg,
+	pci_conf_write(pc, csc->sc_tag, csc->sc_bar_reg,
 	    csc->sc_bar_val);
 
 	/* Make sure the right access type is on the CardBus bridge. */
@@ -339,21 +341,21 @@ atw_cardbus_setup(struct atw_cardbus_softc *csc)
 	(*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
 
 	/* Enable the appropriate bits in the PCI CSR. */
-	reg = cardbus_conf_read(cc, cf, csc->sc_tag,
+	reg = pci_conf_read(pc, csc->sc_tag,
 	    PCI_COMMAND_STATUS_REG);
 	reg &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE);
 	reg |= csc->sc_csr;
-	cardbus_conf_write(cc, cf, csc->sc_tag, PCI_COMMAND_STATUS_REG,
+	pci_conf_write(pc, csc->sc_tag, PCI_COMMAND_STATUS_REG,
 	    reg);
 
 	/*
 	 * Make sure the latency timer is set to some reasonable
 	 * value.
 	 */
-	reg = cardbus_conf_read(cc, cf, csc->sc_tag, PCI_BHLC_REG);
+	reg = pci_conf_read(pc, csc->sc_tag, PCI_BHLC_REG);
 	if (PCI_LATTIMER(reg) < 0x20) {
 		reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
 		reg |= (0x20 << PCI_LATTIMER_SHIFT);
-		cardbus_conf_write(cc, cf, csc->sc_tag, PCI_BHLC_REG, reg);
+		pci_conf_write(pc, csc->sc_tag, PCI_BHLC_REG, reg);
 	}
 }
diff --git a/sys/dev/cardbus/if_bwi_cardbus.c b/sys/dev/cardbus/if_bwi_cardbus.c
index b121bd8948c..902aef174b1 100644
--- a/sys/dev/cardbus/if_bwi_cardbus.c
+++ b/sys/dev/cardbus/if_bwi_cardbus.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: if_bwi_cardbus.c,v 1.11 2010/03/27 20:04:03 jsg Exp $ */
+/*	$OpenBSD: if_bwi_cardbus.c,v 1.12 2010/03/27 21:40:13 jsg Exp $ */
 
 /*
  * Copyright (c) 2007 Marcus Glocker <mglocker@openbsd.org>
@@ -58,6 +58,7 @@ struct bwi_cardbus_softc {
 	bus_size_t		 csc_mapsize;
 	pcireg_t		 csc_bar_val;
 	int			 csc_intrline;
+	pci_chipset_tag_t	 csc_pc;
 };
 
 int		bwi_cardbus_match(struct device *, void *, void*);
@@ -107,6 +108,7 @@ bwi_cardbus_attach(struct device *parent, struct device *self, void *aux)
 	csc->csc_ct = ct;
 	csc->csc_tag = ca->ca_tag;
 	csc->csc_intrline = ca->ca_intrline;
+	csc->csc_pc = ca->ca_pc;
 
 	/* power management hooks */
 	sc->sc_enable = bwi_cardbus_enable;
@@ -178,11 +180,12 @@ bwi_cardbus_setup(struct bwi_cardbus_softc *csc)
 {
 	cardbus_devfunc_t ct = csc->csc_ct;
 	cardbus_chipset_tag_t cc = ct->ct_cc;
+	pci_chipset_tag_t pc = csc->csc_pc;
 	cardbus_function_tag_t cf = ct->ct_cf;
 	pcireg_t reg;
 
 	/* program the BAR */
-	cardbus_conf_write(cc, cf, csc->csc_tag, CARDBUS_BASE0_REG,
+	pci_conf_write(pc, csc->csc_tag, CARDBUS_BASE0_REG,
 	    csc->csc_bar_val);
 
 	/* make sure the right access type is on the cardbus bridge */
@@ -190,10 +193,10 @@ bwi_cardbus_setup(struct bwi_cardbus_softc *csc)
 	(*cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
 
 	/* enable the appropriate bits in the PCI CSR */
-	reg = cardbus_conf_read(cc, cf, csc->csc_tag,
+	reg = pci_conf_read(pc, csc->csc_tag,
 	    PCI_COMMAND_STATUS_REG);
 	reg |= PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_MEM_ENABLE;
-	cardbus_conf_write(cc, cf, csc->csc_tag, PCI_COMMAND_STATUS_REG,
+	pci_conf_write(pc, csc->csc_tag, PCI_COMMAND_STATUS_REG,
 	    reg);
 }
 
@@ -244,20 +247,16 @@ void
 bwi_cardbus_conf_write(void *self, uint32_t reg, uint32_t val)
 {
 	struct bwi_cardbus_softc *csc = (struct bwi_cardbus_softc *)self;
-	cardbus_devfunc_t ct = csc->csc_ct;
-	cardbus_chipset_tag_t cc = ct->ct_cc;
-	cardbus_function_tag_t cf = ct->ct_cf;
+	pci_chipset_tag_t pc = csc->csc_pc;
 
-	cardbus_conf_write(cc, cf, csc->csc_tag, reg, val);
+	pci_conf_write(pc, csc->csc_tag, reg, val);
 }
 
 uint32_t
 bwi_cardbus_conf_read(void *self, uint32_t reg)
 {
 	struct bwi_cardbus_softc *csc = (struct bwi_cardbus_softc *)self;
-	cardbus_devfunc_t ct = csc->csc_ct;
-	cardbus_chipset_tag_t cc = ct->ct_cc;
-	cardbus_function_tag_t cf = ct->ct_cf;
+	pci_chipset_tag_t pc = csc->csc_pc;
 
-	return (cardbus_conf_read(cc, cf, csc->csc_tag, reg));
+	return (pci_conf_read(pc, csc->csc_tag, reg));
 }
diff --git a/sys/dev/cardbus/if_dc_cardbus.c b/sys/dev/cardbus/if_dc_cardbus.c
index 8ec8054da66..b11b715c877 100644
--- a/sys/dev/cardbus/if_dc_cardbus.c
+++ b/sys/dev/cardbus/if_dc_cardbus.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: if_dc_cardbus.c,v 1.32 2010/03/27 20:04:03 jsg Exp $	*/
+/*	$OpenBSD: if_dc_cardbus.c,v 1.33 2010/03/27 21:40:13 jsg Exp $	*/
 
 /*
  * Copyright (c) 1997, 1998, 1999
@@ -79,6 +79,7 @@ struct dc_cardbus_softc {
 	int			sc_intrline;
 
 	cardbus_devfunc_t	sc_ct;
+	pci_chipset_tag_t	sc_pc;
 	pcitag_t		sc_tag;
 	bus_size_t		sc_mapsize;
 	int			sc_actype;
@@ -126,6 +127,7 @@ dc_cardbus_attach(struct device *parent, struct device *self, void *aux)
 	struct cardbus_attach_args *ca = aux;
 	struct cardbus_devfunc *ct = ca->ca_ct;
 	cardbus_chipset_tag_t cc = ct->ct_cc;
+	pci_chipset_tag_t pc = ca->ca_pc;
 	cardbus_function_tag_t cf = ct->ct_cf;
 	pcireg_t reg;
 	bus_addr_t addr;
@@ -133,6 +135,7 @@ dc_cardbus_attach(struct device *parent, struct device *self, void *aux)
 	sc->sc_dmat = ca->ca_dmat;
 	csc->sc_ct = ct;
 	csc->sc_tag = ca->ca_tag;
+	csc->sc_pc = ca->ca_pc;
 
 	Cardbus_function_enable(ct);
 
@@ -152,7 +155,7 @@ dc_cardbus_attach(struct device *parent, struct device *self, void *aux)
 
 	csc->sc_intrline = ca->ca_intrline;
 
-	sc->dc_cachesize = cardbus_conf_read(cc, cf, ca->ca_tag, DC_PCI_CFLT)
+	sc->dc_cachesize = pci_conf_read(csc->sc_pc, ca->ca_tag, DC_PCI_CFLT)
 	    & 0xFF;
 
 	dc_cardbus_setup(csc);
@@ -215,11 +218,11 @@ dc_cardbus_attach(struct device *parent, struct device *self, void *aux)
  	/*
 	 * set latency timer, do we really need this?
 	 */
-	reg = cardbus_conf_read(cc, cf, ca->ca_tag, PCI_BHLC_REG);
+	reg = pci_conf_read(pc, ca->ca_tag, PCI_BHLC_REG);
 	if (PCI_LATTIMER(reg) < 0x20) {
 		reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
 		reg |= (0x20 << PCI_LATTIMER_SHIFT);
-		cardbus_conf_write(cc, cf, ca->ca_tag, PCI_BHLC_REG, reg);
+		pci_conf_write(pc, ca->ca_tag, PCI_BHLC_REG, reg);
 	}
 
 	sc->sc_ih = cardbus_intr_establish(cc, cf, ca->ca_intrline, IPL_NET,
@@ -260,33 +263,33 @@ dc_cardbus_setup(struct dc_cardbus_softc *csc)
 {
 	cardbus_devfunc_t ct = csc->sc_ct;
 	cardbus_chipset_tag_t cc = ct->ct_cc;
-	cardbus_function_tag_t cf = ct->ct_cf;
+	pci_chipset_tag_t pc = csc->sc_pc;
 	pcireg_t reg;
 	int r;
 
 	/* wakeup the card if needed */
-	reg = cardbus_conf_read(cc, cf, csc->sc_tag, PCI_CFDA);
+	reg = pci_conf_read(pc, csc->sc_tag, PCI_CFDA);
 	if (reg | (DC_CFDA_SUSPEND|DC_CFDA_STANDBY)) {
-		cardbus_conf_write(cc, cf, csc->sc_tag, PCI_CFDA,
+		pci_conf_write(pc, csc->sc_tag, PCI_CFDA,
 		    reg & ~(DC_CFDA_SUSPEND|DC_CFDA_STANDBY));
 	}
 
-	if (cardbus_get_capability(cc, cf, csc->sc_tag, PCI_CAP_PWRMGMT, &r,
+	if (pci_get_capability(csc->sc_pc, csc->sc_tag, PCI_CAP_PWRMGMT, &r,
 	    0)) {
-		r = cardbus_conf_read(cc, cf, csc->sc_tag, r + 4) & 3;
+		r = pci_conf_read(csc->sc_pc, csc->sc_tag, r + 4) & 3;
 		if (r) {
 			printf("%s: awakening from state D%d\n",
 			    csc->sc_dc.sc_dev.dv_xname, r);
-			cardbus_conf_write(cc, cf, csc->sc_tag, r + 4, 0);
+			pci_conf_write(csc->sc_pc, csc->sc_tag, r + 4, 0);
 		}
 	}
 
 	(*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_actype);
 	(*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
 
-	reg = cardbus_conf_read(cc, cf, csc->sc_tag, PCI_COMMAND_STATUS_REG);
+	reg = pci_conf_read(csc->sc_pc, csc->sc_tag, PCI_COMMAND_STATUS_REG);
 	reg |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
 	    PCI_COMMAND_MASTER_ENABLE;
-	cardbus_conf_write(cc, cf, csc->sc_tag, PCI_COMMAND_STATUS_REG, reg);
-	reg = cardbus_conf_read(cc, cf, csc->sc_tag, PCI_COMMAND_STATUS_REG);
+	pci_conf_write(csc->sc_pc, csc->sc_tag, PCI_COMMAND_STATUS_REG, reg);
+	reg = pci_conf_read(csc->sc_pc, csc->sc_tag, PCI_COMMAND_STATUS_REG);
 }
diff --git a/sys/dev/cardbus/if_fxp_cardbus.c b/sys/dev/cardbus/if_fxp_cardbus.c
index 3997afe9dd2..39d3a96dc29 100644
--- a/sys/dev/cardbus/if_fxp_cardbus.c
+++ b/sys/dev/cardbus/if_fxp_cardbus.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: if_fxp_cardbus.c,v 1.26 2010/03/27 20:04:03 jsg Exp $ */
+/*	$OpenBSD: if_fxp_cardbus.c,v 1.27 2010/03/27 21:40:13 jsg Exp $ */
 /*	$NetBSD: if_fxp_cardbus.c,v 1.12 2000/05/08 18:23:36 thorpej Exp $	*/
 
 /*
@@ -92,6 +92,7 @@ struct fxp_cardbus_softc {
 	pcireg_t base0_reg;
 	pcireg_t base1_reg;
 	bus_size_t size;
+	pci_chipset_tag_t pc;
 };
 
 struct cfattach fxp_cardbus_ca = {
@@ -135,6 +136,7 @@ fxp_cardbus_attach(struct device *parent, struct device *self, void *aux)
 	bus_size_t size;
 
 	csc->ct = ca->ca_ct;
+	csc->pc = ca->ca_pc;
 
 	/*
 	 * Map control/status registers.
@@ -188,20 +190,21 @@ fxp_cardbus_setup(struct fxp_softc *sc)
 	struct cardbus_softc *psc =
 	    (struct cardbus_softc *) sc->sc_dev.dv_parent;
 	cardbus_chipset_tag_t cc = psc->sc_cc;
+	pci_chipset_tag_t pc = csc->pc;
 	cardbus_function_tag_t cf = psc->sc_cf;
 	pcireg_t command;
 
-	csc->ct_tag = cardbus_make_tag(cc, cf, csc->ct->ct_bus,
+	csc->ct_tag = pci_make_tag(pc, csc->ct->ct_bus,
 	    csc->ct->ct_dev, csc->ct->ct_func);
 
-	command = cardbus_conf_read(cc, cf, csc->ct_tag, PCI_COMMAND_STATUS_REG);
+	command = pci_conf_read(pc, csc->ct_tag, PCI_COMMAND_STATUS_REG);
 	if (csc->base0_reg) {
-		cardbus_conf_write(cc, cf, csc->ct_tag, CARDBUS_BASE0_REG, csc->base0_reg);
+		pci_conf_write(pc, csc->ct_tag, CARDBUS_BASE0_REG, csc->base0_reg);
 		(cf->cardbus_ctrl) (cc, CARDBUS_MEM_ENABLE);
 		command |= PCI_COMMAND_MEM_ENABLE |
 		    PCI_COMMAND_MASTER_ENABLE;
 	} else if (csc->base1_reg) {
-		cardbus_conf_write(cc, cf, csc->ct_tag, CARDBUS_BASE1_REG, csc->base1_reg);
+		pci_conf_write(pc, csc->ct_tag, CARDBUS_BASE1_REG, csc->base1_reg);
 		(cf->cardbus_ctrl) (cc, CARDBUS_IO_ENABLE);
 		command |= (PCI_COMMAND_IO_ENABLE |
 		    PCI_COMMAND_MASTER_ENABLE);
@@ -210,7 +213,7 @@ fxp_cardbus_setup(struct fxp_softc *sc)
 	(cf->cardbus_ctrl) (cc, CARDBUS_BM_ENABLE);
 
 	/* enable the card */
-	cardbus_conf_write(cc, cf, csc->ct_tag, PCI_COMMAND_STATUS_REG, command);
+	pci_conf_write(pc, csc->ct_tag, PCI_COMMAND_STATUS_REG, command);
 }
 
 int
diff --git a/sys/dev/cardbus/if_malo_cardbus.c b/sys/dev/cardbus/if_malo_cardbus.c
index daa609d2531..230fc56ccb4 100644
--- a/sys/dev/cardbus/if_malo_cardbus.c
+++ b/sys/dev/cardbus/if_malo_cardbus.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: if_malo_cardbus.c,v 1.8 2010/03/27 20:04:03 jsg Exp $ */
+/*	$OpenBSD: if_malo_cardbus.c,v 1.9 2010/03/27 21:40:13 jsg Exp $ */
 
 /*
  * Copyright (c) 2006 Claudio Jeker <claudio@openbsd.org>
@@ -54,6 +54,7 @@ struct malo_cardbus_softc {
 	pcireg_t		sc_bar1_val;
 	pcireg_t		sc_bar2_val;
 	int			sc_intrline;
+	pci_chipset_tag_t	sc_pc;
 };
 
 int	malo_cardbus_match(struct device *parent, void *match, void *aux);
@@ -96,6 +97,7 @@ malo_cardbus_attach(struct device *parent, struct device *self, void *aux)
 	csc->sc_ct = ct;
 	csc->sc_tag = ca->ca_tag;
 	csc->sc_intrline = ca->ca_intrline;
+	csc->sc_pc = ca->ca_pc;
 
 	/* power management hooks */
 	sc->sc_enable = malo_cardbus_enable;
@@ -172,13 +174,14 @@ malo_cardbus_setup(struct malo_cardbus_softc *csc)
 {
 	cardbus_devfunc_t ct = csc->sc_ct;
 	cardbus_chipset_tag_t cc = ct->ct_cc;
+	pci_chipset_tag_t pc = csc->sc_pc;
 	cardbus_function_tag_t cf = ct->ct_cf;
 	pcireg_t reg;
 
 	/* program the BAR */
-	cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_BASE0_REG,
+	pci_conf_write(pc, csc->sc_tag, CARDBUS_BASE0_REG,
 	    csc->sc_bar1_val);
-	cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_BASE1_REG,
+	pci_conf_write(pc, csc->sc_tag, CARDBUS_BASE1_REG,
 	    csc->sc_bar2_val);
 
 	/* make sure the right access type is on the cardbus bridge */
@@ -186,10 +189,10 @@ malo_cardbus_setup(struct malo_cardbus_softc *csc)
 	(*cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
 
 	/* enable the appropriate bits in the PCI CSR */
-	reg = cardbus_conf_read(cc, cf, csc->sc_tag,
+	reg = pci_conf_read(pc, csc->sc_tag,
 	    PCI_COMMAND_STATUS_REG);
 	reg |= PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_MEM_ENABLE;
-	cardbus_conf_write(cc, cf, csc->sc_tag, PCI_COMMAND_STATUS_REG,
+	pci_conf_write(pc, csc->sc_tag, PCI_COMMAND_STATUS_REG,
 	    reg);
 }
 
diff --git a/sys/dev/cardbus/if_pgt_cardbus.c b/sys/dev/cardbus/if_pgt_cardbus.c
index 1e2ae2100aa..88ffd78b3b4 100644
--- a/sys/dev/cardbus/if_pgt_cardbus.c
+++ b/sys/dev/cardbus/if_pgt_cardbus.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: if_pgt_cardbus.c,v 1.10 2010/03/27 20:04:03 jsg Exp $ */
+/*	$OpenBSD: if_pgt_cardbus.c,v 1.11 2010/03/27 21:40:13 jsg Exp $ */
 
 /*
  * Copyright (c) 2006 Marcus Glocker <mglocker@openbsd.org>
@@ -63,6 +63,7 @@ struct pgt_cardbus_softc {
 	void			*sc_ih;
 	bus_size_t		 sc_mapsize;
 	pcireg_t		 sc_bar0_val;
+	pci_chipset_tag_t	 sc_pc;
 };
 
 int	pgt_cardbus_match(struct device *, void *, void *);
@@ -106,6 +107,7 @@ pgt_cardbus_attach(struct device *parent, struct device *self, void *aux)
 	csc->sc_ct = ct;
 	csc->sc_tag = ca->ca_tag;
 	csc->sc_intrline = ca->ca_intrline;
+	csc->sc_pc = ca->ca_pc;
 
 	/* power management hooks */
 	sc->sc_enable = pgt_cardbus_enable;
@@ -228,11 +230,12 @@ pgt_cardbus_setup(struct pgt_cardbus_softc *csc)
 {
 	cardbus_devfunc_t ct = csc->sc_ct;
 	cardbus_chipset_tag_t cc = ct->ct_cc;
+	pci_chipset_tag_t pc = csc->sc_pc;
 	cardbus_function_tag_t cf = ct->ct_cf;
 	pcireg_t reg;
 
 	/* program the BAR */
-	cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_BASE0_REG,
+	pci_conf_write(pc, csc->sc_tag, CARDBUS_BASE0_REG,
 	    csc->sc_bar0_val);
 
 	/* make sure the right access type is on the cardbus bridge */
@@ -240,9 +243,9 @@ pgt_cardbus_setup(struct pgt_cardbus_softc *csc)
 	(*cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
 
 	/* enable the appropriate bits in the PCI CSR */
-	reg = cardbus_conf_read(cc, cf, csc->sc_tag,
+	reg = pci_conf_read(pc, csc->sc_tag,
 	    PCI_COMMAND_STATUS_REG);
 	reg |= PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_MEM_ENABLE;
-	cardbus_conf_write(cc, cf, csc->sc_tag, PCI_COMMAND_STATUS_REG,
+	pci_conf_write(pc, csc->sc_tag, PCI_COMMAND_STATUS_REG,
 	    reg);
 }
diff --git a/sys/dev/cardbus/if_ral_cardbus.c b/sys/dev/cardbus/if_ral_cardbus.c
index 9cb140c703b..33ac332ff10 100644
--- a/sys/dev/cardbus/if_ral_cardbus.c
+++ b/sys/dev/cardbus/if_ral_cardbus.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: if_ral_cardbus.c,v 1.16 2010/03/27 20:04:03 jsg Exp $  */
+/*	$OpenBSD: if_ral_cardbus.c,v 1.17 2010/03/27 21:40:13 jsg Exp $  */
 
 /*-
  * Copyright (c) 2005-2007
@@ -94,6 +94,7 @@ struct ral_cardbus_softc {
 	bus_size_t		sc_mapsize;
 	pcireg_t		sc_bar_val;
 	int			sc_intrline;
+	pci_chipset_tag_t	sc_pc;
 };
 
 int	ral_cardbus_match(struct device *, void *, void *);
@@ -171,6 +172,7 @@ ral_cardbus_attach(struct device *parent, struct device *self, void *aux)
 	csc->sc_ct = ct;
 	csc->sc_tag = ca->ca_tag;
 	csc->sc_intrline = ca->ca_intrline;
+	csc->sc_pc = ca->ca_pc;
 
 	/* power management hooks */
 	sc->sc_enable = ral_cardbus_enable;
@@ -284,11 +286,12 @@ ral_cardbus_setup(struct ral_cardbus_softc *csc)
 {
 	cardbus_devfunc_t ct = csc->sc_ct;
 	cardbus_chipset_tag_t cc = ct->ct_cc;
+	pci_chipset_tag_t pc = csc->sc_pc;
 	cardbus_function_tag_t cf = ct->ct_cf;
 	pcireg_t reg;
 
 	/* program the BAR */
-	cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_BASE0_REG,
+	pci_conf_write(pc, csc->sc_tag, CARDBUS_BASE0_REG,
 	    csc->sc_bar_val);
 
 	/* make sure the right access type is on the cardbus bridge */
@@ -296,9 +299,9 @@ ral_cardbus_setup(struct ral_cardbus_softc *csc)
 	(*cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
 
 	/* enable the appropriate bits in the PCI CSR */
-	reg = cardbus_conf_read(cc, cf, csc->sc_tag,
+	reg = pci_conf_read(pc, csc->sc_tag,
 	    PCI_COMMAND_STATUS_REG);
 	reg |= PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_MEM_ENABLE;
-	cardbus_conf_write(cc, cf, csc->sc_tag, PCI_COMMAND_STATUS_REG,
+	pci_conf_write(pc, csc->sc_tag, PCI_COMMAND_STATUS_REG,
 	    reg);
 }
diff --git a/sys/dev/cardbus/if_re_cardbus.c b/sys/dev/cardbus/if_re_cardbus.c
index c8ec25b9ee7..068942868e9 100644
--- a/sys/dev/cardbus/if_re_cardbus.c
+++ b/sys/dev/cardbus/if_re_cardbus.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: if_re_cardbus.c,v 1.18 2010/03/27 20:04:03 jsg Exp $	*/
+/*	$OpenBSD: if_re_cardbus.c,v 1.19 2010/03/27 21:40:13 jsg Exp $	*/
 
 /*
  * Copyright (c) 2005 Peter Valchev <pvalchev@openbsd.org>
@@ -61,6 +61,7 @@ struct re_cardbus_softc {
 	void *sc_ih;
 	cardbus_devfunc_t ct;
 	pcitag_t sc_tag;
+	pci_chipset_tag_t sc_pc;
 	int sc_csr;
 	int sc_cben;
 	int sc_bar_reg;
@@ -124,6 +125,7 @@ re_cardbus_attach(struct device *parent, struct device *self, void *aux)
 	sc->sc_dmat = ca->ca_dmat;
 	csc->ct = ct;
 	csc->sc_tag = ca->ca_tag;
+	csc->sc_pc = ca->ca_pc;
 	csc->sc_intrline = ca->ca_intrline;
 
 	/*
@@ -179,36 +181,36 @@ re_cardbus_setup(struct rl_softc *sc)
 	struct re_cardbus_softc *csc = (struct re_cardbus_softc *)sc;
 	cardbus_devfunc_t ct = csc->ct;
 	cardbus_chipset_tag_t cc = ct->ct_cc;
-	cardbus_function_tag_t cf = ct->ct_cf;
+	pci_chipset_tag_t pc = csc->sc_pc;
 	pcireg_t reg, command;
 	int pmreg;
 
 	/* Handle power management nonsense */
-	if (cardbus_get_capability(cc, cf, csc->sc_tag,
+	if (pci_get_capability(pc, csc->sc_tag,
 	    PCI_CAP_PWRMGMT, &pmreg, 0)) {
-		command = cardbus_conf_read(cc, cf, csc->sc_tag,
+		command = pci_conf_read(pc, csc->sc_tag,
 		    pmreg + PCI_PMCSR);
 
 		if (command & RL_PSTATE_MASK) {
 			pcireg_t iobase, membase, irq;
 
 			/* Save important PCI config data */
-			iobase = cardbus_conf_read(cc, cf, csc->sc_tag, RL_PCI_LOIO);
-			membase = cardbus_conf_read(cc, cf, csc->sc_tag, RL_PCI_LOMEM);
-			irq = cardbus_conf_read(cc, cf, csc->sc_tag, RL_PCI_INTLINE);
+			iobase = pci_conf_read(pc, csc->sc_tag, RL_PCI_LOIO);
+			membase = pci_conf_read(pc, csc->sc_tag, RL_PCI_LOMEM);
+			irq = pci_conf_read(pc, csc->sc_tag, RL_PCI_INTLINE);
 
 			/* Reset the power state */
 			printf("%s: chip is in D%d power mode "
 			    "-- setting to D0\n", sc->sc_dev.dv_xname,
 			    command & RL_PSTATE_MASK);
 			command &= RL_PSTATE_MASK;
-			cardbus_conf_write(cc, cf, csc->sc_tag, pmreg + PCI_PMCSR,
+			pci_conf_write(pc, csc->sc_tag, pmreg + PCI_PMCSR,
 			    command);
 
 			/* Restore PCI config data */
-			cardbus_conf_write(cc, cf, csc->sc_tag, RL_PCI_LOIO, iobase);
-			cardbus_conf_write(cc, cf, csc->sc_tag, RL_PCI_LOMEM, membase);
-			cardbus_conf_write(cc, cf, csc->sc_tag, RL_PCI_INTLINE, irq);
+			pci_conf_write(pc, csc->sc_tag, RL_PCI_LOIO, iobase);
+			pci_conf_write(pc, csc->sc_tag, RL_PCI_LOMEM, membase);
+			pci_conf_write(pc, csc->sc_tag, RL_PCI_INTLINE, irq);
 		}
 	}
 
@@ -217,20 +219,20 @@ re_cardbus_setup(struct rl_softc *sc)
 	(*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
 
 	/* Program the BAR */
-	cardbus_conf_write(cc, cf, csc->sc_tag, csc->sc_bar_reg, csc->sc_bar_val);
+	pci_conf_write(pc, csc->sc_tag, csc->sc_bar_reg, csc->sc_bar_val);
 
 	/* Enable proper bits in CARDBUS CSR */
-	reg = cardbus_conf_read(cc, cf, csc->sc_tag, PCI_COMMAND_STATUS_REG);
+	reg = pci_conf_read(pc, csc->sc_tag, PCI_COMMAND_STATUS_REG);
 	reg &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE);
 	reg |= csc->sc_csr;
-	cardbus_conf_write(cc, cf, csc->sc_tag, PCI_COMMAND_STATUS_REG, reg);
+	pci_conf_write(pc, csc->sc_tag, PCI_COMMAND_STATUS_REG, reg);
 
 	/* Make sure the latency timer is set to some reasonable value */
-	reg = cardbus_conf_read(cc, cf, csc->sc_tag, PCI_BHLC_REG);
+	reg = pci_conf_read(pc, csc->sc_tag, PCI_BHLC_REG);
 	if (PCI_LATTIMER(reg) < 0x20) {
 		reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
 		reg |= (0x20 << PCI_LATTIMER_SHIFT);
-		cardbus_conf_write(cc, cf, csc->sc_tag, PCI_BHLC_REG, reg);
+		pci_conf_write(pc, csc->sc_tag, PCI_BHLC_REG, reg);
 	}
 }
 
diff --git a/sys/dev/cardbus/if_rl_cardbus.c b/sys/dev/cardbus/if_rl_cardbus.c
index 5573a9c3498..9bb31998ec1 100644
--- a/sys/dev/cardbus/if_rl_cardbus.c
+++ b/sys/dev/cardbus/if_rl_cardbus.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: if_rl_cardbus.c,v 1.20 2010/03/27 20:04:03 jsg Exp $ */
+/*	$OpenBSD: if_rl_cardbus.c,v 1.21 2010/03/27 21:40:13 jsg Exp $ */
 /*	$NetBSD: if_rl_cardbus.c,v 1.3.8.3 2001/11/14 19:14:02 nathanw Exp $	*/
 
 /*
@@ -112,6 +112,7 @@ struct rl_cardbus_softc {
 	/* CardBus-specific goo. */
 	void *sc_ih;
 	cardbus_devfunc_t sc_ct;
+	pci_chipset_tag_t sc_pc;
 	pcitag_t sc_tag;
 	int sc_csr;
 	int sc_cben;
@@ -158,6 +159,7 @@ rl_cardbus_attach(struct device *parent, struct device *self, void *aux)
 	csc->sc_ct = ct;
 	csc->sc_tag = ca->ca_tag;
 	csc->sc_intrline = ca->ca_intrline;
+	csc->sc_pc = ca->ca_pc;
 
 	/*
 	 * Map control/status registers.
@@ -245,25 +247,25 @@ rl_cardbus_setup(struct rl_cardbus_softc *csc)
 	struct rl_softc		*sc = &csc->sc_rl;
 	cardbus_devfunc_t	ct = csc->sc_ct;
 	cardbus_chipset_tag_t	cc = ct->ct_cc;
-	cardbus_function_tag_t	cf = ct->ct_cf;
+	pci_chipset_tag_t	pc = csc->sc_pc;
 	pcireg_t		reg, command;
 	int			pmreg;
 
 	/*
 	 * Handle power management nonsense.
 	 */
-	if (cardbus_get_capability(cc, cf, csc->sc_tag,
+	if (pci_get_capability(pc, csc->sc_tag,
 	    PCI_CAP_PWRMGMT, &pmreg, 0)) {
-		command = cardbus_conf_read(cc, cf, csc->sc_tag, pmreg + 4);
+		command = pci_conf_read(pc, csc->sc_tag, pmreg + 4);
 		if (command & RL_PSTATE_MASK) {
 			pcireg_t		iobase, membase, irq;
 
 			/* Save important PCI config data. */
-			iobase = cardbus_conf_read(cc, cf, csc->sc_tag,
+			iobase = pci_conf_read(pc, csc->sc_tag,
 			    RL_PCI_LOIO);
-			membase = cardbus_conf_read(cc, cf,csc->sc_tag,
+			membase = pci_conf_read(pc, csc->sc_tag,
 			    RL_PCI_LOMEM);
-			irq = cardbus_conf_read(cc, cf,csc->sc_tag,
+			irq = pci_conf_read(pc, csc->sc_tag,
 			    PCI_PRODUCT_DELTA_8139);
 
 			/* Reset the power state. */
@@ -271,15 +273,15 @@ rl_cardbus_setup(struct rl_cardbus_softc *csc)
 			    "-- setting to D0\n", sc->sc_dev.dv_xname,
 			    command & RL_PSTATE_MASK);
 			command &= 0xFFFFFFFC;
-			cardbus_conf_write(cc, cf, csc->sc_tag,
+			pci_conf_write(pc, csc->sc_tag,
 			    pmreg + 4, command);
 
 			/* Restore PCI config data. */
-			cardbus_conf_write(cc, cf, csc->sc_tag,
+			pci_conf_write(pc, csc->sc_tag,
 			    RL_PCI_LOIO, iobase);
-			cardbus_conf_write(cc, cf, csc->sc_tag,
+			pci_conf_write(pc, csc->sc_tag,
 			    RL_PCI_LOMEM, membase);
-			cardbus_conf_write(cc, cf, csc->sc_tag,
+			pci_conf_write(pc, csc->sc_tag,
 			    PCI_PRODUCT_DELTA_8139, irq);
 		}
 	}
@@ -289,26 +291,26 @@ rl_cardbus_setup(struct rl_cardbus_softc *csc)
 	(*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
 
 	/* Program the BAR */
-	cardbus_conf_write(cc, cf, csc->sc_tag,
+	pci_conf_write(pc, csc->sc_tag,
 		csc->sc_bar_reg, csc->sc_bar_val);
 
 	/* Enable the appropriate bits in the CARDBUS CSR. */
-	reg = cardbus_conf_read(cc, cf, csc->sc_tag, 
+	reg = pci_conf_read(pc, csc->sc_tag, 
 	    PCI_COMMAND_STATUS_REG);
 	reg &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE);
 	reg |= csc->sc_csr;
-	cardbus_conf_write(cc, cf, csc->sc_tag, 
+	pci_conf_write(pc, csc->sc_tag, 
 	    PCI_COMMAND_STATUS_REG, reg);
 
 	/*
 	 * Make sure the latency timer is set to some reasonable
 	 * value.
 	 */
-	reg = cardbus_conf_read(cc, cf, csc->sc_tag, PCI_BHLC_REG);
+	reg = pci_conf_read(pc, csc->sc_tag, PCI_BHLC_REG);
 	if (PCI_LATTIMER(reg) < 0x20) {
 		reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
 		reg |= (0x20 << PCI_LATTIMER_SHIFT);
-		cardbus_conf_write(cc, cf, csc->sc_tag, PCI_BHLC_REG, reg);
+		pci_conf_write(pc, csc->sc_tag, PCI_BHLC_REG, reg);
 	}
 }
 
diff --git a/sys/dev/cardbus/if_rtw_cardbus.c b/sys/dev/cardbus/if_rtw_cardbus.c
index 730d31c7c5a..9aaaf0f7d82 100644
--- a/sys/dev/cardbus/if_rtw_cardbus.c
+++ b/sys/dev/cardbus/if_rtw_cardbus.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: if_rtw_cardbus.c,v 1.17 2010/03/27 20:04:03 jsg Exp $	*/
+/*	$OpenBSD: if_rtw_cardbus.c,v 1.18 2010/03/27 21:40:13 jsg Exp $	*/
 /* $NetBSD: if_rtw_cardbus.c,v 1.4 2004/12/20 21:05:34 dyoung Exp $ */
 
 /*-
@@ -124,6 +124,7 @@ struct rtw_cardbus_softc {
 	void			*sc_ih;		/* interrupt handle */
 	cardbus_devfunc_t	sc_ct;		/* our CardBus devfuncs */
 	pcitag_t		sc_tag;		/* our CardBus tag */
+	pci_chipset_tag_t	sc_pc;		/* PCI chipset */
 	int			sc_csr;		/* CSR bits */
 	bus_size_t		sc_mapsize;	/* size of the mapped bus space
 						 * region
@@ -205,6 +206,7 @@ rtw_cardbus_attach(struct device *parent, struct device *self, void *aux)
 	sc->sc_dmat = ca->ca_dmat;
 	csc->sc_ct = ct;
 	csc->sc_tag = ca->ca_tag;
+	csc->sc_pc = ca->ca_pc;
 
 	/*
 	 * Power management hooks.
@@ -221,7 +223,7 @@ rtw_cardbus_attach(struct device *parent, struct device *self, void *aux)
 	RTW_DPRINTF(RTW_DEBUG_ATTACH,
 	    ("%s: pass %d.%d signature %08x\n", sc->sc_dev.dv_xname,
 	     (rev >> 4) & 0xf, rev & 0xf,
-	     cardbus_conf_read(ct->ct_cc, ct->ct_cf, csc->sc_tag, 0x80)));
+	     pci_conf_read(ca->ca_pc, csc->sc_tag, 0x80)));
 
 	/*
 	 * Map the device.
@@ -391,13 +393,13 @@ rtw_cardbus_setup(struct rtw_cardbus_softc *csc)
 	struct rtw_softc *sc = &csc->sc_rtw;
 	cardbus_devfunc_t ct = csc->sc_ct;
 	cardbus_chipset_tag_t cc = ct->ct_cc;
-	cardbus_function_tag_t cf = ct->ct_cf;
+	pci_chipset_tag_t pc = csc->sc_pc;
 	pcireg_t reg;
 	int pmreg;
 
-	if (cardbus_get_capability(cc, cf, csc->sc_tag,
+	if (pci_get_capability(pc, csc->sc_tag,
 	    PCI_CAP_PWRMGMT, &pmreg, 0)) {
-		reg = cardbus_conf_read(cc, cf, csc->sc_tag, pmreg + 4) & 0x03;
+		reg = pci_conf_read(pc, csc->sc_tag, pmreg + 4) & 0x03;
 #if 1 /* XXX Probably not right for CardBus. */
 		if (reg == 3) {
 			/*
@@ -412,13 +414,13 @@ rtw_cardbus_setup(struct rtw_cardbus_softc *csc)
 		if (reg != 0) {
 			printf("%s: waking up from power state D%d\n",
 			    sc->sc_dev.dv_xname, reg);
-			cardbus_conf_write(cc, cf, csc->sc_tag,
+			pci_conf_write(pc, csc->sc_tag,
 			    pmreg + 4, 0);
 		}
 	}
 
 	/* Program the BAR. */
-	cardbus_conf_write(cc, cf, csc->sc_tag, csc->sc_bar_reg,
+	pci_conf_write(pc, csc->sc_tag, csc->sc_bar_reg,
 	    csc->sc_bar_val);
 
 	/* Make sure the right access type is on the CardBus bridge. */
@@ -426,21 +428,21 @@ rtw_cardbus_setup(struct rtw_cardbus_softc *csc)
 	(*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
 
 	/* Enable the appropriate bits in the PCI CSR. */
-	reg = cardbus_conf_read(cc, cf, csc->sc_tag,
+	reg = pci_conf_read(pc, csc->sc_tag,
 	    PCI_COMMAND_STATUS_REG);
 	reg &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE);
 	reg |= csc->sc_csr;
-	cardbus_conf_write(cc, cf, csc->sc_tag, PCI_COMMAND_STATUS_REG,
+	pci_conf_write(pc, csc->sc_tag, PCI_COMMAND_STATUS_REG,
 	    reg);
 
 	/*
 	 * Make sure the latency timer is set to some reasonable
 	 * value.
 	 */
-	reg = cardbus_conf_read(cc, cf, csc->sc_tag, PCI_BHLC_REG);
+	reg = pci_conf_read(pc, csc->sc_tag, PCI_BHLC_REG);
 	if (PCI_LATTIMER(reg) < 0x20) {
 		reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
 		reg |= (0x20 << PCI_LATTIMER_SHIFT);
-		cardbus_conf_write(cc, cf, csc->sc_tag, PCI_BHLC_REG, reg);
+		pci_conf_write(pc, csc->sc_tag, PCI_BHLC_REG, reg);
 	}
 }
diff --git a/sys/dev/cardbus/if_xl_cardbus.c b/sys/dev/cardbus/if_xl_cardbus.c
index 1ec4bf0e316..64789c2efce 100644
--- a/sys/dev/cardbus/if_xl_cardbus.c
+++ b/sys/dev/cardbus/if_xl_cardbus.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: if_xl_cardbus.c,v 1.26 2010/03/27 20:04:03 jsg Exp $ */
+/*	$OpenBSD: if_xl_cardbus.c,v 1.27 2010/03/27 21:40:13 jsg Exp $ */
 /*	$NetBSD: if_xl_cardbus.c,v 1.13 2000/03/07 00:32:52 mycroft Exp $	*/
 
 /*
@@ -220,7 +220,7 @@ xl_cardbus_attach(struct device *parent, struct device *self, void *aux)
 
 	(ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_IO_ENABLE);
 
-	command = cardbus_conf_read(cc, cf, ca->ca_tag,
+	command = pci_conf_read(ca->ca_pc, ca->ca_tag,
 	    PCI_COMMAND_STATUS_REG);
 	command |= ecp->ecp_csr;
 	csc->sc_cardtype = ecp->ecp_cardtype;
@@ -244,20 +244,20 @@ xl_cardbus_attach(struct device *parent, struct device *self, void *aux)
 	}
 
 	(ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
-	cardbus_conf_write(cc, cf, ca->ca_tag, PCI_COMMAND_STATUS_REG,
+	pci_conf_write(ca->ca_pc, ca->ca_tag, PCI_COMMAND_STATUS_REG,
 	    command);
   
  	/*
 	 * set latency timer
 	 */
-	bhlc = cardbus_conf_read(cc, cf, ca->ca_tag, PCI_BHLC_REG);
+	bhlc = pci_conf_read(ca->ca_pc, ca->ca_tag, PCI_BHLC_REG);
 	if (PCI_LATTIMER(bhlc) < 0x20) {
 		/* at least the value of latency timer should 0x20. */
 		DPRINTF(("if_xl_cardbus: lattimer 0x%x -> 0x20\n",
 		    PCI_LATTIMER(bhlc)));
 		bhlc &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
 		bhlc |= (0x20 << PCI_LATTIMER_SHIFT);
-		cardbus_conf_write(cc, cf, ca->ca_tag, PCI_BHLC_REG, bhlc);
+		pci_conf_write(ca->ca_pc, ca->ca_tag, PCI_BHLC_REG, bhlc);
 	}
 
 	csc->sc_ct = ca->ca_ct;
diff --git a/sys/dev/cardbus/ohci_cardbus.c b/sys/dev/cardbus/ohci_cardbus.c
index 21da000a0a4..d5274cd52e8 100644
--- a/sys/dev/cardbus/ohci_cardbus.c
+++ b/sys/dev/cardbus/ohci_cardbus.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ohci_cardbus.c,v 1.14 2010/03/27 20:04:03 jsg Exp $ */
+/*	$OpenBSD: ohci_cardbus.c,v 1.15 2010/03/27 21:40:13 jsg Exp $ */
 /*	$NetBSD: ohci_cardbus.c,v 1.19 2004/08/02 19:14:28 mycroft Exp $	*/
 
 /*
@@ -98,6 +98,7 @@ ohci_cardbus_attach(struct device *parent, struct device *self, void *aux)
 	struct cardbus_attach_args *ca = aux;
 	cardbus_devfunc_t ct = ca->ca_ct;
 	cardbus_chipset_tag_t cc = ct->ct_cc;
+	pci_chipset_tag_t pc = ca->ca_pc;
 	cardbus_function_tag_t cf = ct->ct_cf;
 	pcireg_t csr;
 	usbd_status r;
@@ -124,9 +125,9 @@ ohci_cardbus_attach(struct device *parent, struct device *self, void *aux)
 	(ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
 
 	/* Enable the device. */
-	csr = cardbus_conf_read(cc, cf, ca->ca_tag,
+	csr = pci_conf_read(pc, ca->ca_tag,
 				PCI_COMMAND_STATUS_REG);
-	cardbus_conf_write(cc, cf, ca->ca_tag, PCI_COMMAND_STATUS_REG,
+	pci_conf_write(pc, ca->ca_tag, PCI_COMMAND_STATUS_REG,
 		       csr | PCI_COMMAND_MASTER_ENABLE
 			   | PCI_COMMAND_MEM_ENABLE);
 
diff --git a/sys/dev/cardbus/puc_cardbus.c b/sys/dev/cardbus/puc_cardbus.c
index 40022107a54..c4ecbdd20fd 100644
--- a/sys/dev/cardbus/puc_cardbus.c
+++ b/sys/dev/cardbus/puc_cardbus.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: puc_cardbus.c,v 1.5 2010/03/27 20:04:03 jsg Exp $	*/
+/*	$OpenBSD: puc_cardbus.c,v 1.6 2010/03/27 21:40:13 jsg Exp $	*/
 
 /*
  * Copyright (c) 2006 Michael Shalayeff
@@ -56,12 +56,10 @@ int
 puc_cardbus_match(struct device *parent, void *match, void *aux)
 {
 	struct cardbus_attach_args *ca = aux;
-	struct cardbus_devfunc *ct = ca->ca_ct;
-	cardbus_chipset_tag_t cc = ct->ct_cc;
-	cardbus_function_tag_t cf = ct->ct_cf;
+	pci_chipset_tag_t pc = ca->ca_pc;
 	pcireg_t bhlc, reg;
 
-	bhlc = cardbus_conf_read(cc, cf, ca->ca_tag, PCI_BHLC_REG);
+	bhlc = pci_conf_read(pc, ca->ca_tag, PCI_BHLC_REG);
 	if (PCI_HDRTYPE_TYPE(bhlc) != 0)
 		return(0);
 
@@ -70,7 +68,7 @@ puc_cardbus_match(struct device *parent, void *match, void *aux)
 	    PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_OXFORD2_EXSYS_EX41098)
 		return (0);
 
-	reg = cardbus_conf_read(cc, cf, ca->ca_tag, PCI_SUBSYS_ID_REG);
+	reg = pci_conf_read(pc, ca->ca_tag, PCI_SUBSYS_ID_REG);
 	if (puc_find_description(PCI_VENDOR(ca->ca_id),
 	    PCI_PRODUCT(ca->ca_id), PCI_VENDOR(reg), PCI_PRODUCT(reg)))
 		return (10);
@@ -86,6 +84,7 @@ puc_cardbus_attach(struct device *parent, struct device *self, void *aux)
 	struct cardbus_attach_args *ca = aux;
 	struct cardbus_devfunc *ct = ca->ca_ct;
 	cardbus_chipset_tag_t cc = ct->ct_cc;
+	pci_chipset_tag_t pc = ca->ca_pc;
 	cardbus_function_tag_t cf = ct->ct_cf;
 	struct puc_attach_args paa;
 	pcireg_t reg;
@@ -95,7 +94,7 @@ puc_cardbus_attach(struct device *parent, struct device *self, void *aux)
 
 	csc->ct = ct;
 
-	reg = cardbus_conf_read(cc, cf, ca->ca_tag, PCI_SUBSYS_ID_REG);
+	reg = pci_conf_read(pc, ca->ca_tag, PCI_SUBSYS_ID_REG);
 	sc->sc_desc = puc_find_description(PCI_VENDOR(ca->ca_id),
 	    PCI_PRODUCT(ca->ca_id), PCI_VENDOR(reg), PCI_PRODUCT(reg));
 
@@ -108,7 +107,7 @@ puc_cardbus_attach(struct device *parent, struct device *self, void *aux)
 
 		sc->sc_bar_mappings[i].mapped = 0;
 		bar = PCI_MAPREG_START + 4 * i;
-		if (!cardbus_mapreg_probe(cc, cf, ca->ca_tag, bar, &type))
+		if (!cardbus_mapreg_probe(pc, ca->ca_tag, bar, &type))
 			continue;
 
 		if (!(sc->sc_bar_mappings[i].mapped = !Cardbus_mapreg_map(ct,
@@ -122,13 +121,13 @@ puc_cardbus_attach(struct device *parent, struct device *self, void *aux)
 
 	csc->intrline = ca->ca_intrline;
 
-	if (cardbus_get_capability(cc, cf, ca->ca_tag, PCI_CAP_PWRMGMT, &reg,
+	if (pci_get_capability(pc, ca->ca_tag, PCI_CAP_PWRMGMT, &reg,
 	    0)) {
-		reg = cardbus_conf_read(cc, cf, ca->ca_tag, reg + 4) & 3;
+		reg = pci_conf_read(pc, ca->ca_tag, reg + 4) & 3;
 		if (reg) {
 			printf("%s: awakening from state D%d\n",
 			    sc->sc_dev.dv_xname, reg);
-			cardbus_conf_write(cc, cf, ca->ca_tag, reg + 4, 0);
+			pci_conf_write(pc, ca->ca_tag, reg + 4, 0);
 		}
 	}
 
diff --git a/sys/dev/cardbus/uhci_cardbus.c b/sys/dev/cardbus/uhci_cardbus.c
index 37f400d9cef..67571f5fc78 100644
--- a/sys/dev/cardbus/uhci_cardbus.c
+++ b/sys/dev/cardbus/uhci_cardbus.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: uhci_cardbus.c,v 1.10 2010/03/27 20:04:03 jsg Exp $	*/
+/*	$OpenBSD: uhci_cardbus.c,v 1.11 2010/03/27 21:40:13 jsg Exp $	*/
 
 /*
  * Copyright (c) 1998 The NetBSD Foundation, Inc.
@@ -88,6 +88,7 @@ uhci_cardbus_attach(struct device *parent, struct device *self, void *aux)
 	struct cardbus_attach_args *ca = aux;
 	cardbus_devfunc_t ct = ca->ca_ct;
 	cardbus_chipset_tag_t cc = ct->ct_cc;
+	pci_chipset_tag_t pc = ca->ca_pc;
 	cardbus_function_tag_t cf = ct->ct_cf;
 	pcireg_t csr;
 	usbd_status r;
@@ -113,9 +114,9 @@ uhci_cardbus_attach(struct device *parent, struct device *self, void *aux)
 	(ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
 
 	/* Enable the device. */
-	csr = cardbus_conf_read(cc, cf, ca->ca_tag,
+	csr = pci_conf_read(pc, ca->ca_tag,
 				PCI_COMMAND_STATUS_REG);
-	cardbus_conf_write(cc, cf, ca->ca_tag, PCI_COMMAND_STATUS_REG,
+	pci_conf_write(pc, ca->ca_tag, PCI_COMMAND_STATUS_REG,
 		       csr | PCI_COMMAND_MASTER_ENABLE
 			   | PCI_COMMAND_IO_ENABLE);
 
@@ -128,10 +129,10 @@ uhci_cardbus_attach(struct device *parent, struct device *self, void *aux)
 	printf(": irq %d\n", ca->ca_intrline);
 
 	/* Set LEGSUP register to its default value. */
-	cardbus_conf_write(cc, cf, ca->ca_tag, PCI_LEGSUP,
+	pci_conf_write(pc, ca->ca_tag, PCI_LEGSUP,
 			   PCI_LEGSUP_USBPIRQDEN);
 
-	switch(cardbus_conf_read(cc, cf, ca->ca_tag, PCI_USBREV) & PCI_USBREV_MASK) {
+	switch(pci_conf_read(pc, ca->ca_tag, PCI_USBREV) & PCI_USBREV_MASK) {
 	case PCI_USBREV_PRE_1_0:
 		sc->sc.sc_bus.usbrev = USBREV_PRE_1_0;
 		break;
diff --git a/sys/dev/pci/pccbb.c b/sys/dev/pci/pccbb.c
index b7de1ceaad9..e0475ead48e 100644
--- a/sys/dev/pci/pccbb.c
+++ b/sys/dev/pci/pccbb.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pccbb.c,v 1.73 2010/03/27 20:04:03 jsg Exp $	*/
+/*	$OpenBSD: pccbb.c,v 1.74 2010/03/27 21:40:13 jsg Exp $	*/
 /*	$NetBSD: pccbb.c,v 1.96 2004/03/28 09:49:31 nakayama Exp $	*/
 
 /*
@@ -120,11 +120,6 @@ void   *pccbb_cb_intr_establish(cardbus_chipset_tag_t, int irq, int level,
     int (*ih) (void *), void *sc, const char *);
 void	pccbb_cb_intr_disestablish(cardbus_chipset_tag_t ct, void *ih);
 
-pcitag_t pccbb_make_tag(cardbus_chipset_tag_t, int, int, int);
-void	pccbb_free_tag(cardbus_chipset_tag_t, pcitag_t);
-pcireg_t pccbb_conf_read(cardbus_chipset_tag_t, pcitag_t, int);
-void	pccbb_conf_write(cardbus_chipset_tag_t, pcitag_t, int,
-    pcireg_t);
 void	pccbb_chipinit(struct pccbb_softc *);
 
 int	pccbb_pcmcia_mem_alloc(pcmcia_chipset_handle_t, bus_size_t,
@@ -209,10 +204,6 @@ static struct cardbus_functions pccbb_funcs = {
 	pccbb_cb_intr_disestablish,
 	pccbb_ctrl,
 	pccbb_power,
-	pccbb_make_tag,
-	pccbb_free_tag,
-	pccbb_conf_read,
-	pccbb_conf_write,
 };
 
 /*
@@ -553,6 +544,7 @@ pccbb_pci_callback(struct device *self)
 		cba.cba_dmat = sc->sc_dmat;
 		cba.cba_bus = (busreg >> 8) & 0x0ff;
 		cba.cba_cc = (void *)sc;
+		cba.cba_pc = sc->sc_pc;
 		cba.cba_cf = &pccbb_funcs;
 		cba.cba_intrline = sc->sc_intrline;
 
@@ -1647,54 +1639,6 @@ cb_show_regs(pci_chipset_tag_t pc, pcitag_t tag, bus_space_tag_t memt,
 }
 #endif
 
-/*
- * pcitag_t pccbb_make_tag(cardbus_chipset_tag_t cc,
- *                                    int busno, int devno, int function)
- *   This is the function to make a tag to access config space of
- *  a CardBus Card.  It works same as pci_conf_read.
- */
-pcitag_t
-pccbb_make_tag(cardbus_chipset_tag_t cc, int busno, int devno, int function)
-{
-	struct pccbb_softc *sc = (struct pccbb_softc *)cc;
-
-	return pci_make_tag(sc->sc_pc, busno, devno, function);
-}
-
-void
-pccbb_free_tag(cardbus_chipset_tag_t cc, pcitag_t tag)
-{
-}
-
-/*
- * pcireg_t pccbb_conf_read(cardbus_chipset_tag_t cc,
- *                                     pcitag_t tag, int offset)
- *   This is the function to read the config space of a CardBus Card.
- *  It works same as pci_conf_read.
- */
-pcireg_t
-pccbb_conf_read(cardbus_chipset_tag_t cc, pcitag_t tag, int offset)
-{
-	struct pccbb_softc *sc = (struct pccbb_softc *)cc;
-
-	return pci_conf_read(sc->sc_pc, tag, offset);
-}
-
-/*
- * void pccbb_conf_write(cardbus_chipset_tag_t cc, pcitag_t tag,
- *                              int offs, pcireg_t val)
- *   This is the function to write the config space of a CardBus Card.
- *  It works same as pci_conf_write.
- */
-void
-pccbb_conf_write(cardbus_chipset_tag_t cc, pcitag_t tag, int reg,
-    pcireg_t val)
-{
-	struct pccbb_softc *sc = (struct pccbb_softc *)cc;
-
-	pci_conf_write(sc->sc_pc, tag, reg, val);
-}
-
 #if 0
 int
 pccbb_new_pcmcia_io_alloc(pcmcia_chipset_handle_t pch,