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authorMiod Vallat <miod@cvs.openbsd.org>2012-04-29 08:59:13 +0000
committerMiod Vallat <miod@cvs.openbsd.org>2012-04-29 08:59:13 +0000
commit2ddd8515ef5a55e1709caaa91b7986cce2cb8df9 (patch)
treee59801037334701c1a48bdaa3bc8f3f37b8841dc /sys
parentb44f8b1d131a3e0dd7e2fafee2ead6fc28d5ac2a (diff)
I am not sure what the mess with the wiring of carrier lines on Indigo resolves
to, so make this controllable with device flags, and default to non-bogus wiring.
Diffstat (limited to 'sys')
-rw-r--r--sys/arch/sgi/hpc/zs.c13
-rw-r--r--sys/arch/sgi/include/z8530var.h4
2 files changed, 12 insertions, 5 deletions
diff --git a/sys/arch/sgi/hpc/zs.c b/sys/arch/sgi/hpc/zs.c
index 18fabe5e3b1..0da82b1babf 100644
--- a/sys/arch/sgi/hpc/zs.c
+++ b/sys/arch/sgi/hpc/zs.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: zs.c,v 1.6 2012/04/18 11:30:01 miod Exp $ */
+/* $OpenBSD: zs.c,v 1.7 2012/04/29 08:59:12 miod Exp $ */
/* $NetBSD: zs.c,v 1.37 2011/02/20 07:59:50 matt Exp $ */
/*-
@@ -193,6 +193,7 @@ void
zs_hpc_attach(struct device *parent, struct device *self, void *aux)
{
struct zsc_softc *zsc = (void *)self;
+ struct cfdata *cf = self->dv_cfdata;
struct hpc_attach_args *haa = aux;
struct zsc_attach_args zsc_args;
struct zs_chanstate *cs;
@@ -225,6 +226,10 @@ zs_hpc_attach(struct device *parent, struct device *self, void *aux)
ch = &zsc->zsc_cs_store[channel];
cs = zsc->zsc_cs[channel] = (struct zs_chanstate *)ch;
+ /* pick Indigo wiring if requested */
+ if (cf->cf_flags & ZSCFL_INDIGO_WIRING)
+ ch->cs_flags |= ZSCFL_INDIGO_WIRING;
+
cs->cs_reg_csr = NULL;
cs->cs_reg_data = NULL;
cs->cs_channel = channel;
@@ -450,7 +455,7 @@ zs_read_reg(struct zs_chanstate *cs, uint8_t reg)
* According to IRIX <sys/z8530.h>, on Indigo, the CTS and DCD bits
* are inverted.
*/
- if (sys_config.system_type == SGI_IP20 && reg == 0)
+ if ((zsc->cs_flags & ZSCFL_INDIGO_WIRING) && reg == 0)
val ^= ZSRR0_CTS | ZSRR0_DCD;
return val;
@@ -465,7 +470,7 @@ zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val)
* According to IRIX <sys/z8530.h>, on Indigo, the RTS and DTR bits
* are inverted.
*/
- if (sys_config.system_type == SGI_IP20 && reg == 5)
+ if ((zsc->cs_flags & ZSCFL_INDIGO_WIRING) && reg == 5)
val ^= ZSWR5_DTR | ZSWR5_RTS;
bus_space_write_1(zsc->cs_bustag, zsc->cs_regs, ZS_REG_CSR, reg);
@@ -491,7 +496,7 @@ zs_read_csr(struct zs_chanstate *cs)
* According to IRIX <sys/z8530.h>, on Indigo, the CTS and DCD bits
* are inverted.
*/
- if (sys_config.system_type == SGI_IP20)
+ if (zsc->cs_flags & ZSCFL_INDIGO_WIRING)
val ^= ZSRR0_CTS | ZSRR0_DCD;
return val;
diff --git a/sys/arch/sgi/include/z8530var.h b/sys/arch/sgi/include/z8530var.h
index 5fab516b720..a71726ddefb 100644
--- a/sys/arch/sgi/include/z8530var.h
+++ b/sys/arch/sgi/include/z8530var.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: z8530var.h,v 1.1 2012/03/28 20:44:23 miod Exp $ */
+/* $OpenBSD: z8530var.h,v 1.2 2012/04/29 08:59:12 miod Exp $ */
/* $NetBSD: z8530var.h,v 1.10 2011/07/01 21:00:21 dyoung Exp $ */
/*
@@ -91,6 +91,8 @@ struct zs_channel {
struct zs_chanstate cs_zscs; /* Required: soft state */
bus_space_tag_t cs_bustag; /* Machine-dependent */
bus_space_handle_t cs_regs;
+ int cs_flags;
+#define ZSCFL_INDIGO_WIRING 0x01
};
struct zsc_softc {