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authorJonathan Gray <jsg@cvs.openbsd.org>2023-06-20 02:37:07 +0000
committerJonathan Gray <jsg@cvs.openbsd.org>2023-06-20 02:37:07 +0000
commit37870f1b7b0512c4afbd01b844a8e9ce6036dc7b (patch)
treed1431016aae9885940a8f916a910a61d9fd35804 /sys
parentb8cc20722c713049d4be9f3caa9bb38b672456d4 (diff)
drm/amdgpu: fix xclk freq on CHIP_STONEY
From Chia-I Wu 34419aa0b448b0eee941102793893e0e256abda1 in linux-6.1.y/6.1.34 b447b079cf3a9971ea4d31301e673f49612ccc18 in mainline linux
Diffstat (limited to 'sys')
-rw-r--r--sys/dev/pci/drm/amd/amdgpu/vi.c11
1 files changed, 9 insertions, 2 deletions
diff --git a/sys/dev/pci/drm/amd/amdgpu/vi.c b/sys/dev/pci/drm/amd/amdgpu/vi.c
index 1e52c5f581e..2a3fbba7605 100644
--- a/sys/dev/pci/drm/amd/amdgpu/vi.c
+++ b/sys/dev/pci/drm/amd/amdgpu/vi.c
@@ -542,8 +542,15 @@ static u32 vi_get_xclk(struct amdgpu_device *adev)
u32 reference_clock = adev->clock.spll.reference_freq;
u32 tmp;
- if (adev->flags & AMD_IS_APU)
- return reference_clock;
+ if (adev->flags & AMD_IS_APU) {
+ switch (adev->asic_type) {
+ case CHIP_STONEY:
+ /* vbios says 48Mhz, but the actual freq is 100Mhz */
+ return 10000;
+ default:
+ return reference_clock;
+ }
+ }
tmp = RREG32_SMC(ixCG_CLKPIN_CNTL_2);
if (REG_GET_FIELD(tmp, CG_CLKPIN_CNTL_2, MUX_TCLK_TO_XCLK))