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authorJonathan Gray <jsg@jsg.id.au>2013-03-06 13:12:45 +1100
committerJonathan Gray <jsg@jsg.id.au>2013-03-06 13:12:45 +1100
commit3a5087a161faa2a1335407fe9e6bfce8b9c2fdb8 (patch)
tree3bec11f9d34220c560a1f5b449f5e0eede84301c /sys
parent70063991b622074c5a5d395c3fc3057ac10818dc (diff)
unconditionally do the workaround to force correct ordering on gen6+
seems to fix the laggyness with firefox (but not the hangs)
Diffstat (limited to 'sys')
-rw-r--r--sys/dev/pci/drm/intel_ringbuffer.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/sys/dev/pci/drm/intel_ringbuffer.c b/sys/dev/pci/drm/intel_ringbuffer.c
index bfee793a71f..90ad07425ee 100644
--- a/sys/dev/pci/drm/intel_ringbuffer.c
+++ b/sys/dev/pci/drm/intel_ringbuffer.c
@@ -801,7 +801,10 @@ gen6_ring_get_seqno(struct intel_ring_buffer *ring, bool lazy_coherency)
/* Workaround to force correct ordering between irq and seqno writes on
* ivb (and maybe also on snb) by reading from a CS register (like
* ACTHD) before reading the status page. */
+#ifdef notyet
+ /* XXX conditionally doing this seems to make everything laggy */
if (!lazy_coherency)
+#endif
intel_ring_get_active_head(ring);
return intel_read_status_page(ring, I915_GEM_HWS_INDEX);
}