Support for DS15/DS25/ES45 (Titan) alpha models (rpb family 38). These systems

are very close to the Tsunami systems (rpb family 34) and share the existing
Tsunami code; the tsc(4) Tsunami controller code is extended to handle the
Titan differences, except for the Titan AGP GART which is left unsupported
for now.

Tested to not cause regressions on DS20 (deraadt@) and ES40 (miod@).
Titan support tested by Sergey Prysiazhnyi on DS25, many thanks for your time!

5 files changed, 137 insertions, 56 deletions

diff --git a/sys/arch/alpha/alpha/cpuconf.c b/sys/arch/alpha/alpha/cpuconf.c
index 83df9c004a6..5434c0950f1 100644
--- a/sys/arch/alpha/alpha/cpuconf.c
+++ b/sys/arch/alpha/alpha/cpuconf.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: cpuconf.c,v 1.12 2008/06/26 05:42:08 ray Exp $ */
+/* $OpenBSD: cpuconf.c,v 1.13 2009/10/02 18:01:47 miod Exp $ */
 /* $NetBSD: cpuconf.c,v 1.27 2000/06/26 02:42:04 enami Exp $ */
 
 /*-
@@ -175,6 +175,7 @@ static const struct cpuinit cpuinit[] = {
 	cpu_notsupp(ST_DEC_EV56_PBP, "EV56 Passive Backplane Board"),
 	cpu_notsupp(ST_DEC_ALPHAVME_320, "AlphaVME 320"),
 	cpu_init(ST_DEC_6600, dec_6600_init, "DEC_6600"),
+	cpu_init(ST_DEC_TITAN, dec_6600_init, "DEC_6600"),
 	cpu_init(ST_API_NAUTILUS, api_up1000_init, "API_UP1000"),
 };
 static const int ncpuinit = (sizeof(cpuinit) / sizeof(cpuinit[0]));
diff --git a/sys/arch/alpha/pci/tsc.c b/sys/arch/alpha/pci/tsc.c
index 4c83ec0001a..0ea9235b9b7 100644
--- a/sys/arch/alpha/pci/tsc.c
+++ b/sys/arch/alpha/pci/tsc.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: tsc.c,v 1.14 2009/03/30 21:43:13 kettenis Exp $ */
+/* $OpenBSD: tsc.c,v 1.15 2009/10/02 18:01:47 miod Exp $ */
 /* $NetBSD: tsc.c,v 1.3 2000/06/25 19:17:40 thorpej Exp $ */
 
 /*-
@@ -64,7 +64,7 @@ struct cfdriver tsc_cd = {
         NULL, "tsc", DV_DULL,
 };
 
-struct tsp_config tsp_configuration[2];
+struct tsp_config tsp_configuration[4];
 
 static int tscprint(void *, const char *pnp);
 
@@ -101,12 +101,17 @@ tscmatch(parent, match, aux)
 {
 	struct mainbus_attach_args *ma = aux;
 
-	return cputype == ST_DEC_6600
-	    && strcmp(ma->ma_name, tsc_cd.cd_name) == 0
-	    && !tscfound;
+	switch (cputype) {
+	case ST_DEC_6600:
+	case ST_DEC_TITAN:
+		return strcmp(ma->ma_name, tsc_cd.cd_name) == 0 && !tscfound;
+	default:
+		return 0;
+	}
 }
 
-void tscattach(parent, self, aux)
+void
+tscattach(parent, self, aux)
 	struct device *parent, *self;
 	void *aux;
 {
@@ -115,17 +120,18 @@ void tscattach(parent, self, aux)
 	u_int64_t csc, aar;
 	struct tsp_attach_args tsp;
 	struct mainbus_attach_args *ma = aux;
+	int titan = cputype == ST_DEC_TITAN;
 
 	tscfound = 1;
 
 	csc = LDQP(TS_C_CSC);
 
 	nbus = 1 + (CSC_BC(csc) >= 2);
-	printf(": 21272 Chipset, Cchip rev %d\n"
-		"%s%d: %c Dchips, %d memory bus%s of %d bytes\n",
-		(int)MISC_REV(LDQP(TS_C_MISC)),
-		ma->ma_name, ma->ma_slot, "2448"[CSC_BC(csc)],
-		nbus, nbus > 1 ? "es" : "", 16 + 16 * ((csc & CSC_AW) != 0));
+	printf(": 2127%c Chipset, Cchip rev %d\n"
+	       "%s%d: %c Dchips, %d memory bus%s of %d bytes\n",
+	    titan ? '4' : '2', (int)MISC_REV(LDQP(TS_C_MISC)),
+	    ma->ma_name, ma->ma_slot, "2448"[CSC_BC(csc)],
+	    nbus, nbus > 1 ? "es" : "", 16 + 16 * ((csc & CSC_AW) != 0));
 	printf("%s%d: arrays present: ", ma->ma_name, ma->ma_slot);
 	for(i = 0; i < 4; ++i) {
 		aar = LDQP(TS_C_AAR0 + i * TS_STEP);
@@ -134,13 +140,21 @@ void tscattach(parent, self, aux)
 	}
 	printf(", Dchip 0 rev %d\n", (int)LDQP(TS_D_DREV) & 0xf);
 
-	bzero(&tsp, sizeof tsp);
 	tsp.tsp_name = "tsp";
-	config_found(self, &tsp, NULL);
+	tsp.tsp_slot = 0;
+	config_found(self, &tsp, tscprint);
+	if (titan) {
+		tsp.tsp_slot += 2;
+		config_found(self, &tsp, tscprint);
+	}
 
-	if(LDQP(TS_C_CSC) & CSC_P1P) {
-		++tsp.tsp_slot;
+	if (csc & CSC_P1P) {
+		tsp.tsp_slot = 1;
 		config_found(self, &tsp, tscprint);
+		if (titan) {
+			tsp.tsp_slot += 2;
+			config_found(self, &tsp, tscprint);
+		}
 	}
 }
 
@@ -149,10 +163,11 @@ tscprint(aux, p)
 	void *aux;
 	const char *p;
 {
-	register struct tsp_attach_args *tsp = aux;
+	struct tsp_attach_args *tsp = aux;
 
-	if(p)
-		printf("%s%d at %s", tsp->tsp_name, tsp->tsp_slot, p);
+	if (p)
+		printf("%s at %s", tsp->tsp_name, p);
+	printf(" hose %d", tsp->tsp_slot);
 	return UNCONF;
 }
 
@@ -166,8 +181,13 @@ tspmatch(parent, match, aux)
 {
 	struct tsp_attach_args *t = aux;
 
-	return  cputype == ST_DEC_6600
-	    && strcmp(t->tsp_name, tsp_cd.cd_name) == 0;
+	switch (cputype) {
+	case ST_DEC_6600:
+	case ST_DEC_TITAN:
+		return strcmp(t->tsp_name, tsp_cd.cd_name) == 0;
+	default:
+		return 0;
+	}
 }
 
 void
@@ -182,7 +202,7 @@ tspattach(parent, self, aux)
 	printf("\n");
 	pcp = tsp_init(1, t->tsp_slot);
 
-	tsp_dma_init(pcp);
+	tsp_dma_init(self, pcp);
 	
 	/*
 	 * Do PCI memory initialization that needs to be deferred until
@@ -212,15 +232,26 @@ tspattach(parent, self, aux)
 struct tsp_config *
 tsp_init(mallocsafe, n)
 	int mallocsafe;
-	int n;	/* Pchip number */
+	int n;	/* hose number */
 {
 	struct tsp_config *pcp;
+	int titan = cputype == ST_DEC_TITAN;
 
-	KASSERT((n | 1) == 1);
+	KASSERT(n >= 0 && n < nitems(tsp_configuration));
 	pcp = &tsp_configuration[n];
 	pcp->pc_pslot = n;
 	pcp->pc_iobase = TS_Pn(n, 0);
-	pcp->pc_csr = S_PAGE(TS_Pn(n, P_CSRBASE));
+	pcp->pc_csr = S_PAGE(TS_Pn(n & 1, P_CSRBASE));
+	if (n & 2) {
+		/* `A' port of PA Chip */
+		pcp->pc_csr++;
+	}
+	if (titan) {
+		/* same address on G and A ports */
+		pcp->pc_tlbia = &pcp->pc_csr->port.g.tsp_tlbia.tsg_r;
+	} else {
+		pcp->pc_tlbia = &pcp->pc_csr->port.p.tsp_tlbia.tsg_r;
+	}
 	snprintf(pcp->pc_io_ex_name, sizeof pcp->pc_io_ex_name,
 	    "tsp%d_bus_io", n);
 	snprintf(pcp->pc_mem_ex_name, sizeof pcp->pc_mem_ex_name,
@@ -239,11 +270,14 @@ tsp_init(mallocsafe, n)
 	pcp->pc_mallocsafe = mallocsafe;
 	tsp_pci_init(&pcp->pc_pc, pcp);
 	alpha_pci_chipset = &pcp->pc_pc;
-	alpha_pci_chipset->pc_name = "tsunami";
+	if (titan)
+		alpha_pci_chipset->pc_name = "titan";
+	else
+		alpha_pci_chipset->pc_name = "tsunami";
 	alpha_pci_chipset->pc_mem = P_PCI_MEM;
 	alpha_pci_chipset->pc_ports = P_PCI_IO;
 	alpha_pci_chipset->pc_hae_mask = 0;
-	alpha_pci_chipset->pc_dense = TS_P0(0);
+	alpha_pci_chipset->pc_dense = TS_P0(0);	/* XXX */
 	alpha_pci_chipset->pc_bwx = 1;
 	pcp->pc_initted = 1;
 	return pcp;
@@ -256,7 +290,7 @@ tspprint(aux, p)
 {
 	register struct pcibus_attach_args *pci = aux;
 
-	if(p)
+	if (p)
 		printf("%s at %s", pci->pba_busname, p);
 	printf(" bus %d", pci->pba_bus);
 	return UNCONF;
diff --git a/sys/arch/alpha/pci/tsp_dma.c b/sys/arch/alpha/pci/tsp_dma.c
index 06264714dbb..e56f6b13850 100644
--- a/sys/arch/alpha/pci/tsp_dma.c
+++ b/sys/arch/alpha/pci/tsp_dma.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: tsp_dma.c,v 1.7 2009/02/01 14:34:00 miod Exp $ */
+/* $OpenBSD: tsp_dma.c,v 1.8 2009/10/02 18:01:47 miod Exp $ */
 /* $NetBSD: tsp_dma.c,v 1.1 1999/06/29 06:46:47 ross Exp $ */
 
 /*-
@@ -87,26 +87,19 @@
 #define	EDIFF(a, b) (((a) | WSBA_ENA | WSBA_SG)	!= ((b) | WSBA_ENA | WSBA_SG))
 
 bus_dma_tag_t tsp_dma_get_tag(bus_dma_tag_t, alpha_bus_t);
-
 int	tsp_bus_dmamap_load_sgmap(bus_dma_tag_t, bus_dmamap_t, void *,
 	    bus_size_t, struct proc *, int);
-
 int	tsp_bus_dmamap_load_mbuf_sgmap(bus_dma_tag_t, bus_dmamap_t,
 	    struct mbuf *, int);
-
 int	tsp_bus_dmamap_load_uio_sgmap(bus_dma_tag_t, bus_dmamap_t,
 	    struct uio *, int);
-
 int	tsp_bus_dmamap_load_raw_sgmap(bus_dma_tag_t, bus_dmamap_t,
 	    bus_dma_segment_t *, int, bus_size_t, int);
-
 void	tsp_bus_dmamap_unload_sgmap(bus_dma_tag_t, bus_dmamap_t);
-
 void	tsp_tlb_invalidate(struct tsp_config *);
 
 void
-tsp_dma_init(pcp)
-	struct tsp_config *pcp;
+tsp_dma_init(struct device *tsp, struct tsp_config *pcp)
 {
 	int i;
 	bus_dma_tag_t t;
@@ -115,19 +108,19 @@ tsp_dma_init(pcp)
 	static struct map_expected {
 		u_int32_t base, mask, enables;
 	} premap[4] = {
-		{ 0x800000, 		   0x700000, WSBA_ENA | WSBA_SG },
-		{ 0x80000000 | WSBA_ENA, 0x3ff00000, WSBA_ENA           },
-		{ 0, 0 },
-		{ 0, 0 }
+		{ 0x00800000, 0x00700000, WSBA_ENA | WSBA_SG },
+		{ 0x80000000, 0x3ff00000, WSBA_ENA           },
+		{ 0, 0, 0 },
+		{ 0, 0, 0 }
 	};
 
 	alpha_mb();
 	for(i = 0; i < 4; ++i) {
 		if (EDIFF(pccsr->tsp_wsba[i].tsg_r, premap[i].base) ||
 		    EDIFF(pccsr->tsp_wsm[i].tsg_r, premap[i].mask))
-			printf("tsp%d: window %d: %lx/base %lx/mask %lx"
+			printf("%s: window %d: %lx/base %lx/mask %lx"
 			    " reinitialized\n",
-			    pcp->pc_pslot, i,
+			    tsp->dv_xname, i,
 			    pccsr->tsp_wsba[i].tsg_r,
 			    pccsr->tsp_wsm[i].tsg_r,
 			    pccsr->tsp_tba[i].tsg_r);
@@ -203,12 +196,21 @@ tsp_dma_init(pcp)
 	alpha_mb();
 
 	/*
+	 * Enable window 1 in direct mode.
+	 */
+	alpha_mb();
+	pccsr->tsp_wsba[1].tsg_r =
+	    (pccsr->tsp_wsba[1].tsg_r & ~WSBA_SG) | WSBA_ENA;
+	alpha_mb();
+
+	/*
 	 * Check windows for sanity, especially if we later decide to
 	 * use the firmware's initialization in some cases.
 	 */
 	if ((sgwbase <= dwbase && dwbase < sgwbase + sgwlen) ||
 	    (dwbase <= sgwbase && sgwbase < dwbase + dwlen))
-		panic("tsp_dma_init: overlap");
+		panic("tsp_dma_init: overlap sg %p len %p d %p len %p",
+		    sgwbase, sgwlen, dwbase, dwlen);
 
 	tbase = pcp->pc_sgmap.aps_ptpa;
 	if (tbase & ~0x7fffffc00UL)
@@ -375,6 +377,6 @@ tsp_tlb_invalidate(pcp)
 {
 
 	alpha_mb();
-	pcp->pc_csr->tsp_tlbia.tsg_r = 0;
+	*pcp->pc_tlbia = 0;
 	alpha_mb();
 }
diff --git a/sys/arch/alpha/pci/tsreg.h b/sys/arch/alpha/pci/tsreg.h
index c399b64e324..a6120fef104 100644
--- a/sys/arch/alpha/pci/tsreg.h
+++ b/sys/arch/alpha/pci/tsreg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: tsreg.h,v 1.4 2006/01/04 10:32:10 martin Exp $ */
+/* $OpenBSD: tsreg.h,v 1.5 2009/10/02 18:01:47 miod Exp $ */
 /* $NetBSD: tsreg.h,v 1.1 1999/06/29 06:46:47 ross Exp $ */
 
 /*-
@@ -199,15 +199,8 @@ typedef struct _ts_gr {
 /*
  * Tsunami Pchip
  */
-struct	ts_pchip {
-	TS_GR	tsp_wsba[4];	/* Window Space Base Address */
-
-	TS_GR	tsp_wsm[4];	/* Window Space Mask */
 
-	TS_GR	tsp_tba[4];	/* Translated Base Address */
-
-	TS_GR	tsp_pctl;	/* Pchip Control */
-	TS_GR	tsp_plat;	/* Pchip Latency */
+struct	ts_pport {
 	TS_GR	tsp_resA;
 	TS_GR	tsp_error;	/* Pchip Error */
 
@@ -222,6 +215,56 @@ struct	ts_pchip {
 	TS_GR	tsp_resC;
 
 	TS_GR	tsp_resD_K[8];
+};
+
+struct	ts_gport {
+	TS_GR	tsp_resA[2];
+	TS_GR	tsp_serror;
+	TS_GR	tsp_serrmask;
+	TS_GR	tsp_serrset;
+	TS_GR	tsp_resB;
+	TS_GR	tsp_gperrmask;
+	TS_GR	tsp_gperren;
+	TS_GR	tsp_gperrset;
+	TS_GR	tsp_resC;
+	TS_GR	tsp_tlbiv;
+	TS_GR	tsp_tlbia;
+	TS_GR	tsp_resD[2];
+	TS_GR	tsp_sctl;
+	TS_GR	tsp_resE[3];
+};
+
+struct	ts_aport {
+	TS_GR	tsp_resA[2];
+	TS_GR	tsp_agperror;
+	TS_GR	tsp_agperrmask;
+	TS_GR	tsp_agperrset;
+	TS_GR	tsp_agplastwr;
+	TS_GR	tsp_aperror;
+	TS_GR	tsp_aperrmask;
+	TS_GR	tsp_aperrset;
+	TS_GR	tsp_resB;
+	TS_GR	tsp_tlbiv;
+	TS_GR	tsp_tlbia;
+	TS_GR	tsp_resC[6];
+};
+
+struct	ts_pchip {
+	TS_GR	tsp_wsba[4];	/* Window Space Base Address */
+
+	TS_GR	tsp_wsm[4];	/* Window Space Mask */
+
+	TS_GR	tsp_tba[4];	/* Translated Base Address */
+
+	TS_GR	tsp_pctl;	/* Pchip Control */
+	TS_GR	tsp_plat;	/* Pchip Latency */
+
+	union {
+		struct ts_pport	p;
+		struct ts_gport	g;
+		struct ts_aport	a;
+	} port;
 
 	TS_GR	tsp_sprts;	/* ??? */
+	TS_GR	tsp_res[31];
 };
diff --git a/sys/arch/alpha/pci/tsvar.h b/sys/arch/alpha/pci/tsvar.h
index 1bf315af943..c4ee612ee13 100644
--- a/sys/arch/alpha/pci/tsvar.h
+++ b/sys/arch/alpha/pci/tsvar.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: tsvar.h,v 1.6 2006/03/16 22:32:44 miod Exp $ */
+/* $OpenBSD: tsvar.h,v 1.7 2009/10/02 18:01:47 miod Exp $ */
 /* $NetBSD: tsvar.h,v 1.1 1999/06/29 06:46:47 ross Exp $ */
 
 /*-
@@ -43,6 +43,7 @@ struct tsp_config {
 	int	pc_initted;		/* Initialized */
 	u_int64_t pc_iobase;		/* All Pchip space starts here */
 	struct	ts_pchip *pc_csr;	/* Pchip CSR space starts here */
+	volatile u_int64_t *pc_tlbia;	/* Pchip TLBIA register address */
 
 	struct	alpha_bus_space pc_iot, pc_memt;
 	struct	alpha_pci_chipset pc_pc;
@@ -76,7 +77,7 @@ extern int tsp_console_hose;
 
 struct	tsp_config *tsp_init(int, int);
 void	tsp_pci_init(pci_chipset_tag_t, void *);
-void	tsp_dma_init(struct tsp_config *);
+void	tsp_dma_init(struct device *, struct tsp_config *);
 
 void	tsp_bus_io_init(bus_space_tag_t, void *);
 void	tsp_bus_mem_init(bus_space_tag_t, void *);