diff options
| author | Theo de Raadt <deraadt@cvs.openbsd.org> | 1995-10-18 16:53:39 +0000 |
|---|---|---|
| committer | Theo de Raadt <deraadt@cvs.openbsd.org> | 1995-10-18 16:53:39 +0000 |
| commit | 67ed58341606f9e4744208115e6f35ba835e4d43 (patch) | |
| tree | 54597e8fd2387710fdf763bb6b9e873fc03b36c3 /sys | |
| parent | 5e4fe2b1909ce9944d40892e152c7fa363159e7a (diff) | |
pretty up
Diffstat (limited to 'sys')
| -rw-r--r-- | sys/arch/sparc/sparc/intersil7170.h | 60 |
1 files changed, 30 insertions, 30 deletions
diff --git a/sys/arch/sparc/sparc/intersil7170.h b/sys/arch/sparc/sparc/intersil7170.h index 9b2be6b35a9..2ca4e4035ab 100644 --- a/sys/arch/sparc/sparc/intersil7170.h +++ b/sys/arch/sparc/sparc/intersil7170.h @@ -40,51 +40,51 @@ */ struct date_time { /* from p. 7 of 10 */ - unsigned char dt_csec; - unsigned char dt_hour; - unsigned char dt_min; - unsigned char dt_sec; - unsigned char dt_month; - unsigned char dt_day; - unsigned char dt_year; - unsigned char dt_dow; + u_char dt_csec; + u_char dt_hour; + u_char dt_min; + u_char dt_sec; + u_char dt_month; + u_char dt_day; + u_char dt_year; + u_char dt_dow; }; struct intersil7170 { struct date_time counters; struct date_time clk_ram; /* should be ok as both are word aligned */ - unsigned char clk_intr_reg; - unsigned char clk_cmd_reg; + u_char clk_intr_reg; + u_char clk_cmd_reg; }; /* bit assignments for command register, p. 6 of 10, write-only */ -#define INTERSIL_CMD_FREQ_32K 0x0 -#define INTERSIL_CMD_FREQ_1M 0x1 -#define INTERSIL_CMD_FREQ_2M 0x2 -#define INTERSIL_CMD_FREQ_4M 0x3 +#define INTERSIL_CMD_FREQ_32K 0x00 +#define INTERSIL_CMD_FREQ_1M 0x01 +#define INTERSIL_CMD_FREQ_2M 0x02 +#define INTERSIL_CMD_FREQ_4M 0x03 -#define INTERSIL_CMD_12HR_MODE 0x0 -#define INTERSIL_CMD_24HR_MODE 0x4 +#define INTERSIL_CMD_12HR_MODE 0x00 +#define INTERSIL_CMD_24HR_MODE 0x04 -#define INTERSIL_CMD_STOP 0x0 -#define INTERSIL_CMD_RUN 0x8 +#define INTERSIL_CMD_STOP 0x00 +#define INTERSIL_CMD_RUN 0x08 -#define INTERSIL_CMD_IDISABLE 0x0 -#define INTERSIL_CMD_IENABLE 0x10 +#define INTERSIL_CMD_IDISABLE 0x00 +#define INTERSIL_CMD_IENABLE 0x10 -#define INTERSIL_CMD_TEST_MODE 0x20 -#define INTERSIL_CMD_NORMAL_MODE 0x0 +#define INTERSIL_CMD_TEST_MODE 0x20 +#define INTERSIL_CMD_NORMAL_MODE 0x00 /* bit assignments for interrupt register r/w, p 7 of 10*/ -#define INTERSIL_INTER_ALARM 0x1 /* r/w */ -#define INTERSIL_INTER_CSECONDS 0x2 /* r/w */ -#define INTERSIL_INTER_DSECONDS 0x4 /* r/w */ -#define INTERSIL_INTER_SECONDS 0x8 /* r/w */ -#define INTERSIL_INTER_MINUTES 0x10 /* r/w */ -#define INTERSIL_INTER_HOURS 0x20 /* r/w */ -#define INTERSIL_INTER_DAYS 0x40 /* r/w */ -#define INTERSIL_INTER_PENDING 0x80 /* read-only */ +#define INTERSIL_INTER_ALARM 0x01 /* r/w */ +#define INTERSIL_INTER_CSECONDS 0x02 /* r/w */ +#define INTERSIL_INTER_DSECONDS 0x04 /* r/w */ +#define INTERSIL_INTER_SECONDS 0x08 /* r/w */ +#define INTERSIL_INTER_MINUTES 0x10 /* r/w */ +#define INTERSIL_INTER_HOURS 0x20 /* r/w */ +#define INTERSIL_INTER_DAYS 0x40 /* r/w */ +#define INTERSIL_INTER_PENDING 0x80 /* read-only */ #define INTERSIL_INTER_BITS "\20\10PENDING\7DAYS\6HRS\5MIN\4SCDS\3DSEC\2CSEC\1ALARM" |