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authorJonathan Gray <jsg@cvs.openbsd.org>2015-02-12 08:48:33 +0000
committerJonathan Gray <jsg@cvs.openbsd.org>2015-02-12 08:48:33 +0000
commit7467958c4a88e5dd558a5dad07fc43086dec54d7 (patch)
tree3556a7a7bf22d06663bea3ce4e0f5f0e07b7f7aa /sys
parent95528ea06e1585eb7eceed49989615c41fea5132 (diff)
Add and use macros for linux memory barriers. Fix the call in
i915_gem_object_flush_fence() to be mb() not wmb() while here.
Diffstat (limited to 'sys')
-rw-r--r--sys/dev/pci/drm/drmP.h9
-rw-r--r--sys/dev/pci/drm/drm_irq.c4
-rw-r--r--sys/dev/pci/drm/i915/i915_gem.c8
-rw-r--r--sys/dev/pci/drm/i915/i915_gem_execbuffer.c4
-rw-r--r--sys/dev/pci/drm/i915/intel_display.c10
-rw-r--r--sys/dev/pci/drm/i915/intel_hdmi.c22
-rw-r--r--sys/dev/pci/drm/radeon/evergreen.c4
-rw-r--r--sys/dev/pci/drm/radeon/r300.c4
-rw-r--r--sys/dev/pci/drm/radeon/r600.c4
-rw-r--r--sys/dev/pci/drm/radeon/radeon_gart.c8
-rw-r--r--sys/dev/pci/drm/radeon/si.c4
-rw-r--r--sys/dev/pci/drm/ttm/ttm_bo_util.c4
12 files changed, 46 insertions, 39 deletions
diff --git a/sys/dev/pci/drm/drmP.h b/sys/dev/pci/drm/drmP.h
index dcd8475fe80..4116c3a3dab 100644
--- a/sys/dev/pci/drm/drmP.h
+++ b/sys/dev/pci/drm/drmP.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: drmP.h,v 1.180 2015/02/11 07:01:36 jsg Exp $ */
+/* $OpenBSD: drmP.h,v 1.181 2015/02/12 08:48:32 jsg Exp $ */
/* drmP.h -- Private header for Direct Rendering Manager -*- linux-c -*-
* Created: Mon Jan 4 10:05:05 1999 by faith@precisioninsight.com
*/
@@ -324,6 +324,13 @@ div_u64(uint64_t x, uint32_t y)
#define smp_mb__before_atomic_inc() DRM_MEMORYBARRIER()
#define smp_mb__after_atomic_inc() DRM_MEMORYBARRIER()
+#define mb() DRM_MEMORYBARRIER()
+#define rmb() DRM_READMEMORYBARRIER()
+#define wmb() DRM_WRITEMEMORYBARRIER()
+#define smp_rmb() DRM_READMEMORYBARRIER()
+#define smp_wmb() DRM_WRITEMEMORYBARRIER()
+#define mmiowb() DRM_WRITEMEMORYBARRIER()
+
#define DRM_COPY_TO_USER(user, kern, size) copyout(kern, user, size)
#define DRM_COPY_FROM_USER(kern, user, size) copyin(user, kern, size)
diff --git a/sys/dev/pci/drm/drm_irq.c b/sys/dev/pci/drm/drm_irq.c
index 659168fbe2c..c9ef221f94b 100644
--- a/sys/dev/pci/drm/drm_irq.c
+++ b/sys/dev/pci/drm/drm_irq.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: drm_irq.c,v 1.58 2015/02/11 07:01:36 jsg Exp $ */
+/* $OpenBSD: drm_irq.c,v 1.59 2015/02/12 08:48:32 jsg Exp $ */
/**
* \file drm_irq.c
* IRQ support
@@ -838,7 +838,7 @@ u32 drm_vblank_count_and_time(struct drm_device *dev, int crtc,
do {
cur_vblank = atomic_read(&dev->_vblank_count[crtc]);
*vblanktime = vblanktimestamp(dev, crtc, cur_vblank);
- DRM_READMEMORYBARRIER();
+ smp_rmb();
} while (cur_vblank != atomic_read(&dev->_vblank_count[crtc]));
return cur_vblank;
diff --git a/sys/dev/pci/drm/i915/i915_gem.c b/sys/dev/pci/drm/i915/i915_gem.c
index 2f205da00d4..014d4b3a6a7 100644
--- a/sys/dev/pci/drm/i915/i915_gem.c
+++ b/sys/dev/pci/drm/i915/i915_gem.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: i915_gem.c,v 1.84 2015/02/12 04:56:03 kettenis Exp $ */
+/* $OpenBSD: i915_gem.c,v 1.85 2015/02/12 08:48:32 jsg Exp $ */
/*
* Copyright (c) 2008-2009 Owain G. Ainsworth <oga@openbsd.org>
*
@@ -2658,7 +2658,7 @@ static void i915_gem_object_finish_gtt(struct drm_i915_gem_object *obj)
u32 old_write_domain, old_read_domains;
/* Act a barrier for all accesses through the GTT */
- DRM_MEMORYBARRIER();
+ mb();
/* Force a pagefault for domain tracking on next user access */
i915_gem_release_mmap(obj);
@@ -2939,7 +2939,7 @@ i915_gem_object_flush_fence(struct drm_i915_gem_object *obj)
* and all writes before removing the fence.
*/
if (obj->base.read_domains & I915_GEM_DOMAIN_GTT)
- DRM_WRITEMEMORYBARRIER();
+ mb();
obj->fenced_gpu_access = false;
return 0;
@@ -3273,7 +3273,7 @@ i915_gem_object_flush_gtt_write_domain(struct drm_i915_gem_object *obj)
* the GTT land before any writes to the device, such as updates to
* the GATT itself.
*/
- DRM_WRITEMEMORYBARRIER();
+ wmb();
old_write_domain = obj->base.write_domain;
obj->base.write_domain = 0;
diff --git a/sys/dev/pci/drm/i915/i915_gem_execbuffer.c b/sys/dev/pci/drm/i915/i915_gem_execbuffer.c
index b0a671809f4..36eb6051a3f 100644
--- a/sys/dev/pci/drm/i915/i915_gem_execbuffer.c
+++ b/sys/dev/pci/drm/i915/i915_gem_execbuffer.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: i915_gem_execbuffer.c,v 1.34 2015/02/12 06:52:11 jsg Exp $ */
+/* $OpenBSD: i915_gem_execbuffer.c,v 1.35 2015/02/12 08:48:32 jsg Exp $ */
/*
* Copyright (c) 2008-2009 Owain G. Ainsworth <oga@openbsd.org>
*
@@ -703,7 +703,7 @@ i915_gem_execbuffer_move_to_gpu(struct intel_ring_buffer *ring,
i915_gem_chipset_flush(ring->dev);
if (flush_domains & I915_GEM_DOMAIN_GTT)
- DRM_WRITEMEMORYBARRIER();
+ wmb();
/* Unconditionally invalidate gpu caches and ensure that we do flush
* any residual writes from the previous batch.
diff --git a/sys/dev/pci/drm/i915/intel_display.c b/sys/dev/pci/drm/i915/intel_display.c
index f0faf93d9e0..80ff8a58ea2 100644
--- a/sys/dev/pci/drm/i915/intel_display.c
+++ b/sys/dev/pci/drm/i915/intel_display.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: intel_display.c,v 1.42 2015/02/12 04:56:03 kettenis Exp $ */
+/* $OpenBSD: intel_display.c,v 1.43 2015/02/12 08:48:32 jsg Exp $ */
/*
* Copyright © 2006-2007 Intel Corporation
*
@@ -7204,7 +7204,7 @@ static void do_intel_finish_page_flip(struct drm_device *dev,
work = intel_crtc->unpin_work;
/* Ensure we don't miss a work->pending update ... */
- DRM_READMEMORYBARRIER();
+ smp_rmb();
if (work == NULL || atomic_read(&work->pending) < INTEL_FLIP_COMPLETE) {
spin_unlock_irqrestore(&dev->event_lock, flags);
@@ -7212,7 +7212,7 @@ static void do_intel_finish_page_flip(struct drm_device *dev,
}
/* and that the unpin work is consistent wrt ->pending. */
- DRM_READMEMORYBARRIER();
+ smp_rmb();
intel_crtc->unpin_work = NULL;
@@ -7269,10 +7269,10 @@ void intel_prepare_page_flip(struct drm_device *dev, int plane)
static inline void intel_mark_page_flip_active(struct intel_crtc *intel_crtc)
{
/* Ensure that the work item is consistent when activating it ... */
- DRM_WRITEMEMORYBARRIER();
+ smp_wmb();
atomic_set(&intel_crtc->unpin_work->pending, INTEL_FLIP_PENDING);
/* and that it is marked active as soon as the irq could fire. */
- DRM_WRITEMEMORYBARRIER();
+ smp_wmb();
}
static int intel_gen2_queue_flip(struct drm_device *dev,
diff --git a/sys/dev/pci/drm/i915/intel_hdmi.c b/sys/dev/pci/drm/i915/intel_hdmi.c
index 2449236678e..68d4feb24db 100644
--- a/sys/dev/pci/drm/i915/intel_hdmi.c
+++ b/sys/dev/pci/drm/i915/intel_hdmi.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: intel_hdmi.c,v 1.11 2015/02/12 06:52:11 jsg Exp $ */
+/* $OpenBSD: intel_hdmi.c,v 1.12 2015/02/12 08:48:32 jsg Exp $ */
/*
* Copyright 2006 Dave Airlie <airlied@linux.ie>
* Copyright © 2006-2009 Intel Corporation
@@ -149,7 +149,7 @@ static void g4x_write_infoframe(struct drm_encoder *encoder,
I915_WRITE(VIDEO_DIP_CTL, val);
- DRM_WRITEMEMORYBARRIER();
+ mmiowb();
for (i = 0; i < len; i += 4) {
I915_WRITE(VIDEO_DIP_DATA, *data);
data++;
@@ -157,7 +157,7 @@ static void g4x_write_infoframe(struct drm_encoder *encoder,
/* Write every possible data byte to force correct ECC calculation. */
for (; i < VIDEO_DIP_DATA_SIZE; i += 4)
I915_WRITE(VIDEO_DIP_DATA, 0);
- DRM_WRITEMEMORYBARRIER();
+ mmiowb();
val |= g4x_infoframe_enable(frame);
val &= ~VIDEO_DIP_FREQ_MASK;
@@ -187,7 +187,7 @@ static void ibx_write_infoframe(struct drm_encoder *encoder,
I915_WRITE(reg, val);
- DRM_WRITEMEMORYBARRIER();
+ mmiowb();
for (i = 0; i < len; i += 4) {
I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data);
data++;
@@ -195,7 +195,7 @@ static void ibx_write_infoframe(struct drm_encoder *encoder,
/* Write every possible data byte to force correct ECC calculation. */
for (; i < VIDEO_DIP_DATA_SIZE; i += 4)
I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0);
- DRM_WRITEMEMORYBARRIER();
+ mmiowb();
val |= g4x_infoframe_enable(frame);
val &= ~VIDEO_DIP_FREQ_MASK;
@@ -228,7 +228,7 @@ static void cpt_write_infoframe(struct drm_encoder *encoder,
I915_WRITE(reg, val);
- DRM_WRITEMEMORYBARRIER();
+ mmiowb();
for (i = 0; i < len; i += 4) {
I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data);
data++;
@@ -236,7 +236,7 @@ static void cpt_write_infoframe(struct drm_encoder *encoder,
/* Write every possible data byte to force correct ECC calculation. */
for (; i < VIDEO_DIP_DATA_SIZE; i += 4)
I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0);
- DRM_WRITEMEMORYBARRIER();
+ mmiowb();
val |= g4x_infoframe_enable(frame);
val &= ~VIDEO_DIP_FREQ_MASK;
@@ -266,7 +266,7 @@ static void vlv_write_infoframe(struct drm_encoder *encoder,
I915_WRITE(reg, val);
- DRM_WRITEMEMORYBARRIER();
+ mmiowb();
for (i = 0; i < len; i += 4) {
I915_WRITE(VLV_TVIDEO_DIP_DATA(intel_crtc->pipe), *data);
data++;
@@ -274,7 +274,7 @@ static void vlv_write_infoframe(struct drm_encoder *encoder,
/* Write every possible data byte to force correct ECC calculation. */
for (; i < VIDEO_DIP_DATA_SIZE; i += 4)
I915_WRITE(VLV_TVIDEO_DIP_DATA(intel_crtc->pipe), 0);
- DRM_WRITEMEMORYBARRIER();
+ mmiowb();
val |= g4x_infoframe_enable(frame);
val &= ~VIDEO_DIP_FREQ_MASK;
@@ -302,7 +302,7 @@ static void hsw_write_infoframe(struct drm_encoder *encoder,
val &= ~hsw_infoframe_enable(frame);
I915_WRITE(ctl_reg, val);
- DRM_WRITEMEMORYBARRIER();
+ mmiowb();
for (i = 0; i < len; i += 4) {
I915_WRITE(data_reg + i, *data);
data++;
@@ -310,7 +310,7 @@ static void hsw_write_infoframe(struct drm_encoder *encoder,
/* Write every possible data byte to force correct ECC calculation. */
for (; i < VIDEO_DIP_DATA_SIZE; i += 4)
I915_WRITE(data_reg + i, 0);
- DRM_WRITEMEMORYBARRIER();
+ mmiowb();
val |= hsw_infoframe_enable(frame);
I915_WRITE(ctl_reg, val);
diff --git a/sys/dev/pci/drm/radeon/evergreen.c b/sys/dev/pci/drm/radeon/evergreen.c
index 183f76e2335..d6416d642ee 100644
--- a/sys/dev/pci/drm/radeon/evergreen.c
+++ b/sys/dev/pci/drm/radeon/evergreen.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: evergreen.c,v 1.13 2015/02/11 07:01:37 jsg Exp $ */
+/* $OpenBSD: evergreen.c,v 1.14 2015/02/12 08:48:32 jsg Exp $ */
/*
* Copyright 2010 Advanced Micro Devices, Inc.
*
@@ -3056,7 +3056,7 @@ restart_ih:
DRM_DEBUG("r600_irq_process start: rptr %d, wptr %d\n", rptr, wptr);
/* Order reading of wptr vs. reading of IH ring data */
- DRM_READMEMORYBARRIER();
+ rmb();
/* display interrupts */
evergreen_irq_ack(rdev);
diff --git a/sys/dev/pci/drm/radeon/r300.c b/sys/dev/pci/drm/radeon/r300.c
index 8869d1202a4..b83f9722c27 100644
--- a/sys/dev/pci/drm/radeon/r300.c
+++ b/sys/dev/pci/drm/radeon/r300.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: r300.c,v 1.5 2015/02/11 07:01:37 jsg Exp $ */
+/* $OpenBSD: r300.c,v 1.6 2015/02/12 08:48:32 jsg Exp $ */
/*
* Copyright 2008 Advanced Micro Devices, Inc.
* Copyright 2008 Red Hat Inc.
@@ -65,7 +65,7 @@ void rv370_pcie_gart_tlb_flush(struct radeon_device *rdev)
(void)RREG32_PCIE(RADEON_PCIE_TX_GART_CNTL);
WREG32_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp);
}
- DRM_MEMORYBARRIER();
+ mb();
}
#define R300_PTE_WRITEABLE (1 << 2)
diff --git a/sys/dev/pci/drm/radeon/r600.c b/sys/dev/pci/drm/radeon/r600.c
index 5dfaee2e88b..b7411fde2a6 100644
--- a/sys/dev/pci/drm/radeon/r600.c
+++ b/sys/dev/pci/drm/radeon/r600.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: r600.c,v 1.12 2015/02/11 07:01:37 jsg Exp $ */
+/* $OpenBSD: r600.c,v 1.13 2015/02/12 08:48:32 jsg Exp $ */
/*
* Copyright 2008 Advanced Micro Devices, Inc.
* Copyright 2008 Red Hat Inc.
@@ -3872,7 +3872,7 @@ restart_ih:
DRM_DEBUG("r600_irq_process start: rptr %d, wptr %d\n", rptr, wptr);
/* Order reading of wptr vs. reading of IH ring data */
- DRM_READMEMORYBARRIER();
+ rmb();
/* display interrupts */
r600_irq_ack(rdev);
diff --git a/sys/dev/pci/drm/radeon/radeon_gart.c b/sys/dev/pci/drm/radeon/radeon_gart.c
index aeee163f059..9de93f01d62 100644
--- a/sys/dev/pci/drm/radeon/radeon_gart.c
+++ b/sys/dev/pci/drm/radeon/radeon_gart.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: radeon_gart.c,v 1.5 2015/02/10 06:19:36 jsg Exp $ */
+/* $OpenBSD: radeon_gart.c,v 1.6 2015/02/12 08:48:32 jsg Exp $ */
/*
* Copyright 2008 Advanced Micro Devices, Inc.
* Copyright 2008 Red Hat Inc.
@@ -246,7 +246,7 @@ void radeon_gart_unbind(struct radeon_device *rdev, unsigned offset,
}
}
}
- DRM_MEMORYBARRIER();
+ mb();
radeon_gart_tlb_flush(rdev);
}
@@ -289,7 +289,7 @@ int radeon_gart_bind(struct radeon_device *rdev, unsigned offset,
}
}
}
- DRM_MEMORYBARRIER();
+ mb();
radeon_gart_tlb_flush(rdev);
return 0;
}
@@ -317,7 +317,7 @@ void radeon_gart_restore(struct radeon_device *rdev)
page_base += RADEON_GPU_PAGE_SIZE;
}
}
- DRM_MEMORYBARRIER();
+ mb();
radeon_gart_tlb_flush(rdev);
}
diff --git a/sys/dev/pci/drm/radeon/si.c b/sys/dev/pci/drm/radeon/si.c
index 92441ba9bc8..8b042782f02 100644
--- a/sys/dev/pci/drm/radeon/si.c
+++ b/sys/dev/pci/drm/radeon/si.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: si.c,v 1.17 2015/02/11 07:01:37 jsg Exp $ */
+/* $OpenBSD: si.c,v 1.18 2015/02/12 08:48:32 jsg Exp $ */
/*
* Copyright 2011 Advanced Micro Devices, Inc.
*
@@ -3744,7 +3744,7 @@ restart_ih:
DRM_DEBUG("si_irq_process start: rptr %d, wptr %d\n", rptr, wptr);
/* Order reading of wptr vs. reading of IH ring data */
- DRM_READMEMORYBARRIER();
+ rmb();
/* display interrupts */
si_irq_ack(rdev);
diff --git a/sys/dev/pci/drm/ttm/ttm_bo_util.c b/sys/dev/pci/drm/ttm/ttm_bo_util.c
index 7a4e6268a90..a77885d6a60 100644
--- a/sys/dev/pci/drm/ttm/ttm_bo_util.c
+++ b/sys/dev/pci/drm/ttm/ttm_bo_util.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: ttm_bo_util.c,v 1.8 2015/02/10 10:50:49 jsg Exp $ */
+/* $OpenBSD: ttm_bo_util.c,v 1.9 2015/02/12 08:48:32 jsg Exp $ */
/**************************************************************************
*
* Copyright (c) 2007-2009 VMware, Inc., Palo Alto, CA., USA
@@ -389,7 +389,7 @@ int ttm_bo_move_memcpy(struct ttm_buffer_object *bo,
if (ret)
goto out1;
}
- DRM_MEMORYBARRIER();
+ mb();
out2:
old_copy = *old_mem;
*old_mem = *new_mem;