diff options
author | Jonathan Gray <jsg@cvs.openbsd.org> | 2022-07-22 06:10:28 +0000 |
---|---|---|
committer | Jonathan Gray <jsg@cvs.openbsd.org> | 2022-07-22 06:10:28 +0000 |
commit | 79a461c130af064f46884a97cac0b41c10041ed3 (patch) | |
tree | 7c1f85c7cd6c149cc42fee6246b2eaeee28befff /sys | |
parent | dcf7a36727fd649d66bf4811e52484e6896df8dd (diff) |
drm/i915/gt: Serialize TLB invalidates with GT resets
From Chris Wilson
86062ca5edf1c2acc4de26452a34ba001e9b6a68 in linux 5.15.y/5.15.56
a1c5a7bf79c1faa5633b918b5c0666545e84c4d1 in mainline linux
Diffstat (limited to 'sys')
-rw-r--r-- | sys/dev/pci/drm/i915/gt/intel_gt.c | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/sys/dev/pci/drm/i915/gt/intel_gt.c b/sys/dev/pci/drm/i915/gt/intel_gt.c index 6411b019c55..ebeb02acf1d 100644 --- a/sys/dev/pci/drm/i915/gt/intel_gt.c +++ b/sys/dev/pci/drm/i915/gt/intel_gt.c @@ -974,6 +974,20 @@ void intel_gt_invalidate_tlbs(struct intel_gt *gt) mutex_lock(>->tlb_invalidate_lock); intel_uncore_forcewake_get(uncore, FORCEWAKE_ALL); + spin_lock_irq(&uncore->lock); /* serialise invalidate with GT reset */ + + for_each_engine(engine, gt, id) { + struct reg_and_bit rb; + + rb = get_reg_and_bit(engine, regs == gen8_regs, regs, num); + if (!i915_mmio_reg_offset(rb.reg)) + continue; + + intel_uncore_write_fw(uncore, rb.reg, rb.bit); + } + + spin_unlock_irq(&uncore->lock); + for_each_engine(engine, gt, id) { /* * HW architecture suggest typical invalidation time at 40us, @@ -988,7 +1002,6 @@ void intel_gt_invalidate_tlbs(struct intel_gt *gt) if (!i915_mmio_reg_offset(rb.reg)) continue; - intel_uncore_write_fw(uncore, rb.reg, rb.bit); if (__intel_wait_for_register_fw(uncore, rb.reg, rb.bit, 0, timeout_us, timeout_ms, |