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authorBrad Smith <brad@cvs.openbsd.org>2013-11-03 23:27:34 +0000
committerBrad Smith <brad@cvs.openbsd.org>2013-11-03 23:27:34 +0000
commit7a50ac5adf542d34ba3a8db35eb15be43060cf33 (patch)
treedbd9835860b40b3ed37d52bebdc79a9b00d25b1b /sys
parent6f9a0ab79c62ad1cbb9d52a80370ac282f8caea0 (diff)
Simplify jme_miibus_readreg() / jme_miibus_writereg() a bit by using the
mii_attach() parameter to be able to specify the location of the PHY. From FreeBSD ok jsg@
Diffstat (limited to 'sys')
-rw-r--r--sys/dev/pci/if_jme.c23
1 files changed, 7 insertions, 16 deletions
diff --git a/sys/dev/pci/if_jme.c b/sys/dev/pci/if_jme.c
index f793c23ad1a..c5f0e00d386 100644
--- a/sys/dev/pci/if_jme.c
+++ b/sys/dev/pci/if_jme.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: if_jme.c,v 1.31 2013/11/03 04:24:28 brad Exp $ */
+/* $OpenBSD: if_jme.c,v 1.32 2013/11/03 23:27:33 brad Exp $ */
/*-
* Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org>
* All rights reserved.
@@ -154,13 +154,8 @@ jme_miibus_readreg(struct device *dev, int phy, int reg)
int i;
/* For FPGA version, PHY address 0 should be ignored. */
- if (sc->jme_caps & JME_CAP_FPGA) {
- if (phy == 0)
- return (0);
- } else {
- if (sc->jme_phyaddr != phy)
- return (0);
- }
+ if ((sc->jme_caps & JME_CAP_FPGA) && phy == 0)
+ return (0);
CSR_WRITE_4(sc, JME_SMI, SMI_OP_READ | SMI_OP_EXECUTE |
SMI_PHY_ADDR(phy) | SMI_REG_ADDR(reg));
@@ -189,13 +184,8 @@ jme_miibus_writereg(struct device *dev, int phy, int reg, int val)
int i;
/* For FPGA version, PHY address 0 should be ignored. */
- if (sc->jme_caps & JME_CAP_FPGA) {
- if (phy == 0)
- return;
- } else {
- if (sc->jme_phyaddr != phy)
- return;
- }
+ if ((sc->jme_caps & JME_CAP_FPGA) && phy == 0)
+ return;
CSR_WRITE_4(sc, JME_SMI, SMI_OP_WRITE | SMI_OP_EXECUTE |
((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) |
@@ -627,7 +617,8 @@ jme_attach(struct device *parent, struct device *self, void *aux)
ifmedia_init(&sc->sc_miibus.mii_media, 0, jme_mediachange,
jme_mediastatus);
- mii_attach(self, &sc->sc_miibus, 0xffffffff, MII_PHY_ANY,
+ mii_attach(self, &sc->sc_miibus, 0xffffffff,
+ sc->jme_caps & JME_CAP_FPGA ? MII_PHY_ANY : sc->jme_phyaddr,
MII_OFFSET_ANY, MIIF_DOPAUSE);
if (LIST_FIRST(&sc->sc_miibus.mii_phys) == NULL) {