Remove DART defines from <machine/mvme188.h> (except for its base address),

and compensate in clock.c which still needs to access a few of its
registers.

While there, access DART registers as bytes as advised in the manual, not
as ints.

2 files changed, 26 insertions, 48 deletions

diff --git a/sys/arch/mvme88k/dev/clock.c b/sys/arch/mvme88k/dev/clock.c
index f01bb4d766a..9656ee2b20b 100644
--- a/sys/arch/mvme88k/dev/clock.c
+++ b/sys/arch/mvme88k/dev/clock.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: clock.c,v 1.44 2004/12/24 22:50:30 miod Exp $ */
+/*	$OpenBSD: clock.c,v 1.45 2006/04/15 22:31:46 miod Exp $ */
 /*
  * Copyright (c) 1999 Steve Murphree, Jr.
  * Copyright (c) 1995 Theo de Raadt
@@ -358,10 +358,19 @@ sbc_statintr(void *eframe)
  * counters interrupt at the same time...
  */
 
+#define	DART_ISR		0xfff82017	/* interrupt status */
+#define	DART_IVR		0xfff82033	/* interrupt vector */
+#define	DART_STARTC		0xfff8203b	/* start counter cmd */
+#define	DART_STOPC		0xfff8203f	/* stop counter cmd */
+#define	DART_ACR		0xfff82013	/* auxiliary control */
+#define	DART_CTUR		0xfff8201b	/* counter/timer MSB */
+#define	DART_CTLR		0xfff8201f	/* counter/timer LSB */
+#define	DART_OPCR		0xfff82037	/* output port config*/
+
 void
 m188_init_clocks(void)
 {
-	volatile u_int32_t imr;
+	volatile u_int8_t imr;
 	int statint, minint;
 
 #ifdef DIAGNOSTIC
@@ -395,19 +404,19 @@ m188_init_clocks(void)
 	statmin = statint - (statvar >> 1);
 
 	/* clear the counter/timer output OP3 while we program the DART */
-	*(volatile u_int32_t *)DART_OPCR = 0x00;
+	*(volatile u_int8_t *)DART_OPCR = 0x00;
 	/* set interrupt vec */
-	*(volatile u_int32_t *)DART_IVR = SYSCON_VECT + SYSCV_TIMER1;
+	*(volatile u_int8_t *)DART_IVR = SYSCON_VECT + SYSCV_TIMER1;
 	/* do the stop counter/timer command */
-	imr = *(volatile u_int32_t *)DART_STOPC;
+	imr = *(volatile u_int8_t *)DART_STOPC;
 	/* set counter/timer to counter mode, PCLK/16 */
-	*(volatile u_int32_t *)DART_ACR = 0x30;
-	*(volatile u_int32_t *)DART_CTUR = (statint >> 8);
-	*(volatile u_int32_t *)DART_CTLR = (statint & 0xff);
+	*(volatile u_int8_t *)DART_ACR = 0x30;
+	*(volatile u_int8_t *)DART_CTUR = (statint >> 8);
+	*(volatile u_int8_t *)DART_CTLR = (statint & 0xff);
 	/* set the counter/timer output OP3 */
-	*(volatile u_int32_t *)DART_OPCR = 0x04;
+	*(volatile u_int8_t *)DART_OPCR = 0x04;
 	/* give the start counter/timer command */
-	imr = *(volatile u_int32_t *)DART_STARTC;
+	imr = *(volatile u_int8_t *)DART_STARTC;
 }
 
 int
@@ -431,12 +440,12 @@ m188_clockintr(void *eframe)
 int
 m188_statintr(void *eframe)
 {
-	volatile u_int32_t tmp;
+	volatile u_int8_t tmp;
 	u_long newint, r, var;
 
 	/* stop counter and acknowledge interrupt */
-	tmp = *(volatile u_int32_t *)DART_STOPC;
-	tmp = *(volatile u_int32_t *)DART_ISR;
+	tmp = *(volatile u_int8_t *)DART_STOPC;
+	tmp = *(volatile u_int8_t *)DART_ISR;
 
 	statclock((struct clockframe *)eframe);
 
@@ -452,9 +461,9 @@ m188_statintr(void *eframe)
 	newint = statmin + r;
 
 	/* setup new value and restart counter */
-	*(volatile u_int32_t *)DART_CTUR = (newint >> 8);
-	*(volatile u_int32_t *)DART_CTLR = (newint & 0xff);
-	tmp = *(volatile u_int32_t *)DART_STARTC;
+	*(volatile u_int8_t *)DART_CTUR = (newint >> 8);
+	*(volatile u_int8_t *)DART_CTLR = (newint & 0xff);
+	tmp = *(volatile u_int8_t *)DART_STARTC;
 
 	return (1);
 }
diff --git a/sys/arch/mvme88k/include/mvme188.h b/sys/arch/mvme88k/include/mvme188.h
index 9a836a7ba8e..25fd1894c95 100644
--- a/sys/arch/mvme88k/include/mvme188.h
+++ b/sys/arch/mvme88k/include/mvme188.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: mvme188.h,v 1.22 2006/04/15 15:45:24 miod Exp $ */
+/*	$OpenBSD: mvme188.h,v 1.23 2006/04/15 22:31:47 miod Exp $ */
 /*
  * Copyright (c) 1999 Steve Murphree, Jr.
  * All rights reserved.
@@ -270,38 +270,7 @@
 #define CIO_CIP			0x20	/* CTC Clear interrupt pending */
 #define CIO_IP			0x20	/* CTC Interrupt pending */
 
-/* these are the DART read registers */
 #define DART_BASE		0xfff82000
-#define DART_MRA		0xfff82000	/* mode A */
-#define DART_SRA		0xfff82004	/* status A */
-#define DART_RBA		0xfff8200c	/* receive buffer A */
-#define DART_IPCR		0xfff82010	/* input port change */
-#define DART_ISR		0xfff82014	/* interrupt status */
-#define DART_CUR		0xfff82018	/* count upper */
-#define DART_CLR		0xfff8201c	/* count lower */
-#define DART_MR1B		0xfff82020	/* mode B */
-#define DART_SRB		0xfff82024	/* status B */
-#define DART_RBB		0xfff8202c	/* receive buffer B */
-#define DART_IVR		0xfff82030	/* interrupt vector */
-#define DART_INP		0xfff82034	/* input port */
-#define DART_STARTC		0xfff82038	/* start counter cmd */
-#define DART_STOPC		0xfff8203c	/* stop counter cmd */
-
-/* these are the DART write registers */
-#define DART_CSRA		0xfff82004	/* clock select A */
-#define DART_CRA		0xfff82008	/* command A */
-#define DART_TBA		0xfff8200c	/* transmit buffer A */
-#define DART_ACR		0xfff82010	/* auxiliary control */
-#define DART_IMR		0xfff82014	/* interrupt mask reg*/
-#define DART_CTUR		0xfff82018	/* counter/timer MSB */
-#define DART_CTLR		0xfff8201c	/* counter/timer LSB */
-#define DART_MRB		0xfff82020	/* mode B */
-#define DART_CSRB		0xfff82024	/* clock select B */
-#define DART_CRB		0xfff82028	/* command B */
-#define DART_TBB		0xfff8202c	/* transmit buffer B */
-#define DART_OPCR		0xfff82034	/* output port config*/
-#define DART_OPRS		0xfff82038	/* output port set */
-#define DART_OPRR		0xfff8203c	/* output port reset */
 
 /*
  * HYPERmodule CMMU addresses