diff options
| author | Kevin Lo <kevlo@cvs.openbsd.org> | 2019-03-22 17:43:19 +0000 |
|---|---|---|
| committer | Kevin Lo <kevlo@cvs.openbsd.org> | 2019-03-22 17:43:19 +0000 |
| commit | 94d29fd871436b925bd74866e2ea66ad5ecaed94 (patch) | |
| tree | 600768e1fcd144d8632f905d67afb2f9a0a53523 /sys | |
| parent | e71f45838174a033dbb648165acba3cdd0c34ca7 (diff) | |
- Fix the AR816X_REV_B0 / default DMA channel selection to be the
same as the original code
- Merge FreeBSD's r304574
Correct DMA channel number selection on AR816x family of
controllers. For Gigabit Ethernet version of AR816x, AR813x/AR815x
except L1D controller, use vendor recommended ASPM parameters.
While here, increase alc_dma_burst array size. Broken H/W can
return bogus value in theory
From Brad.
Diffstat (limited to 'sys')
| -rw-r--r-- | sys/dev/pci/if_alc.c | 29 |
1 files changed, 16 insertions, 13 deletions
diff --git a/sys/dev/pci/if_alc.c b/sys/dev/pci/if_alc.c index f44f643b2da..8ddd0207f1f 100644 --- a/sys/dev/pci/if_alc.c +++ b/sys/dev/pci/if_alc.c @@ -1,4 +1,4 @@ -/* $OpenBSD: if_alc.c,v 1.44 2019/03/22 15:33:30 kevlo Exp $ */ +/* $OpenBSD: if_alc.c,v 1.45 2019/03/22 17:43:18 kevlo Exp $ */ /*- * Copyright (c) 2009, Pyun YongHyeon <yongari@FreeBSD.org> * All rights reserved. @@ -133,7 +133,7 @@ void alc_dma_free(struct alc_softc *); int alc_encap(struct alc_softc *, struct mbuf *); void alc_osc_reset(struct alc_softc *); -uint32_t alc_dma_burst[] = { 128, 256, 512, 1024, 2048, 4096, 0 }; +uint32_t alc_dma_burst[] = { 128, 256, 512, 1024, 2048, 4096, 0, 0 }; const struct pci_matchid alc_devices[] = { { PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_L1C }, @@ -2958,13 +2958,17 @@ alc_init(struct ifnet *ifp) reg = (RXQ_CFG_RD_BURST_DEFAULT << RXQ_CFG_RD_BURST_SHIFT) & RXQ_CFG_RD_BURST_MASK; reg |= RXQ_CFG_RSS_MODE_DIS; - if ((sc->alc_flags & ALC_FLAG_AR816X_FAMILY) != 0) - reg |= (RXQ_CFG_816X_IDT_TBL_SIZE_DEFAULT << - RXQ_CFG_816X_IDT_TBL_SIZE_SHIFT) & - RXQ_CFG_816X_IDT_TBL_SIZE_MASK; - if ((sc->alc_flags & ALC_FLAG_FASTETHER) == 0 && - sc->sc_product != PCI_PRODUCT_ATTANSIC_L1D_1) - reg |= RXQ_CFG_ASPM_THROUGHPUT_LIMIT_1M; + if ((sc->alc_flags & ALC_FLAG_AR816X_FAMILY) != 0) { + reg |= (RXQ_CFG_816X_IDT_TBL_SIZE_DEFAULT << + RXQ_CFG_816X_IDT_TBL_SIZE_SHIFT) & + RXQ_CFG_816X_IDT_TBL_SIZE_MASK; + if ((sc->alc_flags & ALC_FLAG_FASTETHER) == 0) + reg |= RXQ_CFG_ASPM_THROUGHPUT_LIMIT_100M; + } else { + if ((sc->alc_flags & ALC_FLAG_FASTETHER) == 0 && + sc->sc_product != PCI_PRODUCT_ATTANSIC_L1D_1) + reg |= RXQ_CFG_ASPM_THROUGHPUT_LIMIT_100M; + } CSR_WRITE_4(sc, ALC_RXQ_CFG, reg); /* Configure DMA parameters. */ @@ -2984,17 +2988,16 @@ alc_init(struct ifnet *ifp) DMA_CFG_RD_DELAY_CNT_MASK; reg |= (DMA_CFG_WR_DELAY_CNT_DEFAULT << DMA_CFG_WR_DELAY_CNT_SHIFT) & DMA_CFG_WR_DELAY_CNT_MASK; - if ((sc->alc_flags & ALC_FLAG_AR816X_FAMILY) != 0) { switch (AR816X_REV(sc->alc_rev)) { case AR816X_REV_A0: case AR816X_REV_A1: - reg |= DMA_CFG_RD_CHNL_SEL_1; + reg |= DMA_CFG_RD_CHNL_SEL_2; break; case AR816X_REV_B0: - reg |= DMA_CFG_RD_CHNL_SEL_3; - break; + /* FALLTHROUGH */ default: + reg |= DMA_CFG_RD_CHNL_SEL_4; break; } } |