AMD750 Athlon chipset support for PCIBIOS_INTR_FIXUP; from minoura@jp.netbsd.org

5 files changed, 371 insertions, 30 deletions

diff --git a/sys/arch/i386/conf/files.i386 b/sys/arch/i386/conf/files.i386
index 29f86df4b78..cc0a5582421 100644
--- a/sys/arch/i386/conf/files.i386
+++ b/sys/arch/i386/conf/files.i386
@@ -1,4 +1,4 @@
-#	$OpenBSD: files.i386,v 1.71 2000/09/01 05:46:01 aaron Exp $
+#	$OpenBSD: files.i386,v 1.72 2000/11/07 18:21:21 mickey Exp $
 #	$NetBSD: files.i386,v 1.73 1996/05/07 00:58:36 thorpej Exp $
 #
 # new style config file for i386 architecture
@@ -258,6 +258,7 @@ file	arch/i386/pci/opti82c700.c	pcibios
 file	arch/i386/pci/piix.c		pcibios
 file	arch/i386/pci/sis85c503.c	pcibios
 file	arch/i386/pci/via82c586.c	pcibios
+file	arch/i386/pci/amd756.c		pcibios
 
 #
 # CARDBUS
diff --git a/sys/arch/i386/pci/amd756.c b/sys/arch/i386/pci/amd756.c
new file mode 100644
index 00000000000..2a365a9d755
--- /dev/null
+++ b/sys/arch/i386/pci/amd756.c
@@ -0,0 +1,260 @@
+/*	$OpenBSD: amd756.c,v 1.1 2000/11/07 18:21:22 mickey Exp $	*/
+/*	$NetBSD$	*/
+
+/*-
+ * Copyright (c) 1999 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
+ * NASA Ames Research Center.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *     This product includes software developed by the NetBSD
+ *     Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 1999, by UCHIYAMA Yasushi
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. The name of the developer may NOT be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*
+ * Support for the Advanced Micro Devices AMD756 Peripheral Bus Controller.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+#include <sys/malloc.h>
+
+#include <machine/intr.h>
+#include <machine/bus.h>
+
+#include <dev/pci/pcivar.h>
+#include <dev/pci/pcireg.h>
+#include <dev/pci/pcidevs.h>
+
+#include <i386/pci/pci_intr_fixup.h>
+#include <i386/pci/amd756reg.h>
+
+struct viper_handle {
+	bus_space_tag_t ph_iot;
+	bus_space_handle_t ph_regs_ioh;
+	pci_chipset_tag_t ph_pc;
+	pcitag_t ph_tag;
+};
+
+int amd756_getclink __P((pciintr_icu_handle_t, int, int *));
+int amd756_get_intr __P((pciintr_icu_handle_t, int, int *));
+int amd756_set_intr __P((pciintr_icu_handle_t, int, int));
+int amd756_get_trigger __P((pciintr_icu_handle_t, int, int *));
+int amd756_set_trigger __P((pciintr_icu_handle_t, int, int));
+#ifdef VIPER_DEBUG
+static void amd756_pir_dump __P((struct viper_handle *));
+#endif
+
+const struct pciintr_icu amd756_pci_icu = {
+	amd756_getclink,
+	amd756_get_intr,
+	amd756_set_intr,
+	amd756_get_trigger,
+	amd756_set_trigger,
+};
+
+
+int
+amd756_init(pc, iot, tag, ptagp, phandp)
+	pci_chipset_tag_t pc;
+	bus_space_tag_t iot;
+	pcitag_t tag;
+	pciintr_icu_tag_t *ptagp;
+	pciintr_icu_handle_t *phandp;
+{
+	struct viper_handle *ph;
+
+	ph = malloc(sizeof(*ph), M_DEVBUF, M_NOWAIT);
+	if (ph == NULL)
+		return (1);
+
+	ph->ph_iot = iot;
+	ph->ph_pc = pc;
+	ph->ph_tag = tag;
+
+	*ptagp = &amd756_pci_icu;
+	*phandp = ph;
+
+#ifdef VIPER_DEBUG
+	amd756_pir_dump(ph);
+#endif
+
+	return 0;
+}
+
+int
+amd756_getclink(v, link, clinkp)
+	pciintr_icu_handle_t v;
+	int link, *clinkp;
+{
+	if (AMD756_LEGAL_LINK(link - 1) == 0)
+		return (1);
+
+	*clinkp = link - 1;
+	return (0);
+}
+
+int
+amd756_get_intr(v, clink, irqp)
+	pciintr_icu_handle_t v;
+	int clink, *irqp;
+{
+	struct viper_handle *ph = v;
+	pcireg_t reg;
+	int val;
+
+	if (AMD756_LEGAL_LINK(clink) == 0)
+		return (1);
+
+	reg = AMD756_GET_PIIRQSEL(ph);
+	val = (reg >> (4*clink)) & 0x0f;
+	*irqp = (val == 0) ?
+	    I386_PCI_INTERRUPT_LINE_NO_CONNECTION : val;
+
+	return (0);
+}
+
+int
+amd756_set_intr(v, clink, irq)
+	pciintr_icu_handle_t v;
+	int clink, irq;
+{
+	struct viper_handle *ph = v;
+	int val;
+	pcireg_t reg;
+
+	if (AMD756_LEGAL_LINK(clink) == 0 || AMD756_LEGAL_IRQ(irq) == 0)
+		return (1);
+
+	reg = AMD756_GET_PIIRQSEL(ph);
+	amd756_get_intr(v, clink, &val);
+	reg &= ~(0x000f << (4*clink));
+	reg |= irq << (4*clink);
+	AMD756_SET_PIIRQSEL(ph, reg);
+
+	return 0;
+}
+
+int
+amd756_get_trigger(v, irq, triggerp)
+	pciintr_icu_handle_t v;
+	int irq, *triggerp;
+{
+	struct viper_handle *ph = v;
+	int i, pciirq;
+	pcireg_t reg;
+
+	if (AMD756_LEGAL_IRQ(irq) == 0)
+		return (1);
+
+	for (i = 0; i <= 3; i++) {
+		amd756_get_intr(v, i, &pciirq);
+		if (pciirq == irq) {
+			reg = AMD756_GET_EDGESEL(ph);
+			if (reg & (1 << i))
+				*triggerp = IST_EDGE;
+			else
+				*triggerp = IST_LEVEL;
+			break;
+		}
+	}
+
+	return 0;
+}
+
+int
+amd756_set_trigger(v, irq, trigger)
+	pciintr_icu_handle_t v;
+	int irq, trigger;
+{
+	struct viper_handle *ph = v;
+	int i, pciirq;
+	pcireg_t reg;
+
+	if (AMD756_LEGAL_IRQ(irq) == 0)
+		return (1);
+
+	for (i = 0; i <= 3; i++) {
+		amd756_get_intr(v, i, &pciirq);
+		if (pciirq == irq) {
+			reg = AMD756_GET_PIIRQSEL(ph);
+			if (trigger == IST_LEVEL)
+				reg &= ~(1 << (4*i));
+			else
+				reg |= 1 << (4*i);
+			AMD756_SET_PIIRQSEL(ph, reg);
+			break;
+		}
+	}
+
+	return (0);
+}
+
+#ifdef VIPER_DEBUG
+static void
+amd756_pir_dump(ph)
+	struct viper_handle *ph;
+{
+	int a, b;
+
+	printf ("VIPER PCI INTERRUPT ROUTING REGISTERS:\n");
+
+	a = AMD756_GET_EDGESEL(ph);
+	b = AMD756_GET_PIIRQSEL(ph);
+
+	printf ("TRIGGER: %02x, ROUTING: %04x\n", a, b);
+}
+#endif
diff --git a/sys/arch/i386/pci/amd756reg.h b/sys/arch/i386/pci/amd756reg.h
new file mode 100644
index 00000000000..b1a00941eaf
--- /dev/null
+++ b/sys/arch/i386/pci/amd756reg.h
@@ -0,0 +1,75 @@
+/*	$OpenBSD: amd756reg.h,v 1.1 2000/11/07 18:21:22 mickey Exp $	*/
+/*	$NetBSD$	*/
+
+/*
+ * Copyright (c) 1999, by UCHIYAMA Yasushi
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. The name of the developer may NOT be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*
+ * Register definitions for the AMD756 Peripheral Bus Controller.
+ */
+
+/*
+ * Edge Triggered Interrupt Select register. (0x54)
+ * bits 7-4: reserved
+ * bit 3: Edge Triggered Interrupt Select for PCI Interrupt D
+ * bit 2: Edge Triggered Interrupt Select for PCI Interrupt C
+ * bit 1: Edge Triggered Interrupt Select for PCI Interrupt B
+ * bit 0: Edge Triggered Interrupt Select for PCI Interrupt A
+ *   0 = active Low and level triggered
+ *   1 = active High and edge triggered
+ *
+ * PIRQ Select register. (0x56-57)
+ * bits 15-12: PIRQD# Select
+ * bits 11-8:  PIRQD# Select
+ * bits 7-4:   PIRQD# Select
+ * bits 3-0:   PIRQD# Select
+ *   0000: Reserved  0100: IRQ4      1000: Reserved  1100: IRQ12
+ *   0001: IRQ1      0101: IRQ5      1001: IRQ9      1101: Reserved
+ *   0010: Reserved  0110: IRQ6      1010: IRQ10     1110: IRQ14
+ *   0011: IRQ3      0111: IRQ7      1011: IRQ11     1111: IRQ15
+ */
+#define AMD756_CFG_PIR		0x54
+
+#define AMD756_GET_EDGESEL(ph)						\
+	(pci_conf_read((ph)->ph_pc, (ph)->ph_tag, AMD756_CFG_PIR) & 0xff)
+
+#define AMD756_GET_PIIRQSEL(ph)						\
+	(pci_conf_read((ph)->ph_pc, (ph)->ph_tag, AMD756_CFG_PIR) >> 16)
+
+#define AMD756_SET_EDGESEL(ph, n)					\
+	pci_conf_write((ph)->ph_pc, (ph)->ph_tag, AMD756_CFG_PIR,	\
+	(pci_conf_read((ph)->ph_pc, (ph)->ph_tag, AMD756_CFG_PIR)	\
+	    & 0xffff0000) | (n))
+
+#define AMD756_SET_PIIRQSEL(ph, n)					\
+	pci_conf_write((ph)->ph_pc, (ph)->ph_tag, AMD756_CFG_PIR,	\
+	(pci_conf_read((ph)->ph_pc, (ph)->ph_tag, AMD756_CFG_PIR)	\
+	    & 0x000000ff) | ((n) << 16))
+
+#define AMD756_PIRQ_MASK	0xdefa
+#define		AMD756_LEGAL_LINK(link) ((link) >= 0 && (link) <= 3)
+#define AMD756_LEGAL_IRQ(irq) \
+	((irq) >= 0 && (irq) <= 15 && ((1 << (irq)) & AMD756_PIRQ_MASK) != 0)
+
diff --git a/sys/arch/i386/pci/pci_intr_fixup.c b/sys/arch/i386/pci/pci_intr_fixup.c
index 6c6894371f7..cc6668c57b6 100644
--- a/sys/arch/i386/pci/pci_intr_fixup.c
+++ b/sys/arch/i386/pci/pci_intr_fixup.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pci_intr_fixup.c,v 1.9 2000/10/31 18:56:42 deraadt Exp $	*/
+/*	$OpenBSD: pci_intr_fixup.c,v 1.10 2000/11/07 18:21:22 mickey Exp $	*/
 /*	$NetBSD: pci_intr_fixup.c,v 1.10 2000/08/10 21:18:27 soda Exp $	*/
 
 /*-
@@ -49,18 +49,18 @@
  *    notice, this list of conditions and the following disclaimer.
  * 2. The name of the developer may NOT be used to endorse or promote products
  *    derived from this software without specific prior written permission.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 
- * SUCH DAMAGE. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
  */
 
 /*
@@ -146,6 +146,9 @@ const struct pciintr_icu_table {
 	{ PCI_VENDOR_SIS,	PCI_PRODUCT_SIS_85C503,
 	  sis85c503_init },
 
+	{ PCI_VENDOR_AMD,	PCI_PRODUCT_AMD_PBC756_ISA,
+	  amd756_init },
+
 	{ 0,			0,
 	  NULL },
 };
@@ -355,7 +358,7 @@ pciintr_link_init()
 				    pir->bus, PIR_DEVFUNC_DEVICE(pir->device),
 				    link, pir->linkmap[pin].bitmap, l->bitmap);
 #endif
-				/* safer value. */  
+				/* safer value. */
 				l->bitmap &= pir->linkmap[pin].bitmap;
 				/* XXX - or, should ignore this entry? */
 			}
@@ -458,7 +461,7 @@ pciintr_link_fixup()
 		if (pciintr_bitmap_find_lowest_irq(l->bitmap & pciirq,
 		    &l->irq)) {
 			/*
-			 * This IRQ is a valid PCI IRQ already 
+			 * This IRQ is a valid PCI IRQ already
 			 * connected to another PIRQ, and also an
 			 * IRQ our PIRQ can use; connect it up!
 			 */
@@ -640,7 +643,7 @@ pciintr_do_header_fixup(pc, tag)
 		printf("  %d   ", l->fixup_stage);
 	}
 #endif
-	
+
 	/*
 	 * IRQs 14 and 15 are reserved for PCI IDE interrupts; don't muck
 	 * with them.
diff --git a/sys/arch/i386/pci/pci_intr_fixup.h b/sys/arch/i386/pci/pci_intr_fixup.h
index 87918dbccb5..294a8e013cf 100644
--- a/sys/arch/i386/pci/pci_intr_fixup.h
+++ b/sys/arch/i386/pci/pci_intr_fixup.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pci_intr_fixup.h,v 1.3 2000/03/28 03:37:59 mickey Exp $	 */
+/*	$OpenBSD: pci_intr_fixup.h,v 1.4 2000/11/07 18:21:22 mickey Exp $	 */
 /*	$NetBSD: pci_intr_fixup.h,v 1.1 1999/11/17 01:20:38 thorpej Exp $  */
 
 /*
@@ -12,18 +12,18 @@
  *    notice, this list of conditions and the following disclaimer.
  * 2. The name of the developer may NOT be used to endorse or promote products
  *    derived from this software without specific prior written permission.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 
- * SUCH DAMAGE. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
  */
 
 typedef void *pciintr_icu_handle_t;
@@ -64,3 +64,5 @@ int	via82c586_init __P((pci_chipset_tag_t, bus_space_tag_t, pcitag_t,
 	    pciintr_icu_tag_t *, pciintr_icu_handle_t *));
 int	sis85c503_init __P((pci_chipset_tag_t, bus_space_tag_t, pcitag_t,
 	    pciintr_icu_tag_t *, pciintr_icu_handle_t *));
+int	amd756_init __P((pci_chipset_tag_t, bus_space_tag_t, pcitag_t,
+	    pciintr_icu_tag_t *, pciintr_icu_handle_t *));