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authorJonathan Gray <jsg@cvs.openbsd.org>2024-09-12 23:45:03 +0000
committerJonathan Gray <jsg@cvs.openbsd.org>2024-09-12 23:45:03 +0000
commitca602e4984377c9878c7e8b98f4e8d0dab3038cf (patch)
tree54fb5b48b00b6de2be9105d78d23b6ae4b0d116e /sys
parent6ea44a00b3d0dfe7400a1d61b40cfe905c5e678f (diff)
drm/amd: Add gfx12 swizzle mode defs
From Aurabindo Pillai 5f2a2bf25395f50b1b2cb7c04ae2d5986520be5f in linux-6.6.y/6.6.51 7ceb94e87bffff7c12b61eb29749e1d8ac976896 in mainline linux
Diffstat (limited to 'sys')
-rw-r--r--sys/dev/pci/drm/include/uapi/drm/drm_fourcc.h16
1 files changed, 16 insertions, 0 deletions
diff --git a/sys/dev/pci/drm/include/uapi/drm/drm_fourcc.h b/sys/dev/pci/drm/include/uapi/drm/drm_fourcc.h
index 8db7fd3f743..fb304067781 100644
--- a/sys/dev/pci/drm/include/uapi/drm/drm_fourcc.h
+++ b/sys/dev/pci/drm/include/uapi/drm/drm_fourcc.h
@@ -1474,6 +1474,7 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier)
#define AMD_FMT_MOD_TILE_VER_GFX10 2
#define AMD_FMT_MOD_TILE_VER_GFX10_RBPLUS 3
#define AMD_FMT_MOD_TILE_VER_GFX11 4
+#define AMD_FMT_MOD_TILE_VER_GFX12 5
/*
* 64K_S is the same for GFX9/GFX10/GFX10_RBPLUS and hence has GFX9 as canonical
@@ -1484,6 +1485,8 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier)
/*
* 64K_D for non-32 bpp is the same for GFX9/GFX10/GFX10_RBPLUS and hence has
* GFX9 as canonical version.
+ *
+ * 64K_D_2D on GFX12 is identical to 64K_D on GFX11.
*/
#define AMD_FMT_MOD_TILE_GFX9_64K_D 10
#define AMD_FMT_MOD_TILE_GFX9_64K_S_X 25
@@ -1491,6 +1494,19 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier)
#define AMD_FMT_MOD_TILE_GFX9_64K_R_X 27
#define AMD_FMT_MOD_TILE_GFX11_256K_R_X 31
+/* Gfx12 swizzle modes:
+ * 0 - LINEAR
+ * 1 - 256B_2D - 2D block dimensions
+ * 2 - 4KB_2D
+ * 3 - 64KB_2D
+ * 4 - 256KB_2D
+ * 5 - 4KB_3D - 3D block dimensions
+ * 6 - 64KB_3D
+ * 7 - 256KB_3D
+ */
+#define AMD_FMT_MOD_TILE_GFX12_64K_2D 3
+#define AMD_FMT_MOD_TILE_GFX12_256K_2D 4
+
#define AMD_FMT_MOD_DCC_BLOCK_64B 0
#define AMD_FMT_MOD_DCC_BLOCK_128B 1
#define AMD_FMT_MOD_DCC_BLOCK_256B 2