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authorFederico G. Schwindt <fgsch@cvs.openbsd.org>2005-10-02 18:20:02 +0000
committerFederico G. Schwindt <fgsch@cvs.openbsd.org>2005-10-02 18:20:02 +0000
commite9c34241019d6671074f3eaaa7bce4ff83731207 (patch)
treec30991f6f597763d53aa0a6eb3c3944b6b1f26d3 /sys
parent2b1707f96de64e0aa13c6a5642da6f976df8898f (diff)
add special handling for some o2micro devices, so by instance atheros works.
adapted from similar linux change by Aristeu Sergio Rozanski Filho <aris at cathedrallabs dot org> via Leonardo Chiquitto Filho <leonardo at iken dot com dot br>. test compiled by pedro@.
Diffstat (limited to 'sys')
-rw-r--r--sys/dev/pci/pccbb.c34
-rw-r--r--sys/dev/pci/pccbbvar.h5
2 files changed, 35 insertions, 4 deletions
diff --git a/sys/dev/pci/pccbb.c b/sys/dev/pci/pccbb.c
index f73714cb3c5..d47a8cd4fdf 100644
--- a/sys/dev/pci/pccbb.c
+++ b/sys/dev/pci/pccbb.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: pccbb.c,v 1.37 2005/09/16 02:20:23 fgsch Exp $ */
+/* $OpenBSD: pccbb.c,v 1.38 2005/10/02 18:20:00 fgsch Exp $ */
/* $NetBSD: pccbb.c,v 1.96 2004/03/28 09:49:31 nakayama Exp $ */
/*
@@ -332,6 +332,18 @@ struct yenta_chipinfo {
{ MAKEID(PCI_VENDOR_CIRRUS, PCI_PRODUCT_CIRRUS_CL_PD6833),
CB_CIRRUS, PCCBB_PCMCIA_MEM_32},
+ /* older O2Micro bridges */
+ { MAKEID(PCI_VENDOR_O2MICRO, PCI_PRODUCT_O2MICRO_OZ6729),
+ CB_OLDO2MICRO, PCCBB_PCMCIA_MEM_32},
+ { MAKEID(PCI_VENDOR_O2MICRO, PCI_PRODUCT_O2MICRO_OZ6730),
+ CB_OLDO2MICRO, PCCBB_PCMCIA_MEM_32},
+ { MAKEID(PCI_VENDOR_O2MICRO, PCI_PRODUCT_O2MICRO_OZ6872), /* 68[71]2 */
+ CB_OLDO2MICRO, PCCBB_PCMCIA_MEM_32},
+ { MAKEID(PCI_VENDOR_O2MICRO, PCI_PRODUCT_O2MICRO_OZ6832),
+ CB_OLDO2MICRO, PCCBB_PCMCIA_MEM_32},
+ { MAKEID(PCI_VENDOR_O2MICRO, PCI_PRODUCT_O2MICRO_OZ6836),
+ CB_OLDO2MICRO, PCCBB_PCMCIA_MEM_32},
+
/* sentinel, or Generic chip */
{ 0 /* null id */ , CB_UNKNOWN, PCCBB_PCMCIA_MEM_32},
};
@@ -833,6 +845,24 @@ pccbb_chipinit(sc)
pci_conf_write(pc, tag, TOPIC100_PMCSR,
(reg & ~TOPIC100_PMCSR_MASK) | TOPIC100_PMCSR_D0);
break;
+
+ case CB_OLDO2MICRO:
+ /*
+ * older bridges have problems with both read prefetch and
+ * write bursting depending on the combination of the chipset,
+ * bridge and the cardbus card. so disable them to be on the
+ * safe side. One example is O2Micro 6812 with Atheros AR5012
+ * chipsets
+ */
+ DPRINTF(("%s: old O2Micro bridge found\n",
+ sc->sc_dev.dv_xname, reg));
+ reg = pci_conf_read(pc, tag, O2MICRO_RESERVED1);
+ pci_conf_write(pc, tag, O2MICRO_RESERVED1, reg &
+ ~(O2MICRO_RES_READ_PREFETCH | O2MICRO_RES_WRITE_BURST));
+ reg = pci_conf_read(pc, tag, O2MICRO_RESERVED2);
+ pci_conf_write(pc, tag, O2MICRO_RESERVED2, reg &
+ ~(O2MICRO_RES_READ_PREFETCH | O2MICRO_RES_WRITE_BURST));
+ break;
}
/* Close all memory and I/O windows. */
@@ -1979,7 +2009,7 @@ pccbb_pcmcia_io_alloc(pch, start, size, align, pcihp)
* 3. if size is larger, shift msb left once.
* 4. obtain mask value to decrement msb.
*/
- bus_size_t size_tmp = size;
+ bus_size_t size_tmp = size;
int shifts = 0;
mask = 1;
diff --git a/sys/dev/pci/pccbbvar.h b/sys/dev/pci/pccbbvar.h
index 8e927ad91b3..ff77ee572da 100644
--- a/sys/dev/pci/pccbbvar.h
+++ b/sys/dev/pci/pccbbvar.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: pccbbvar.h,v 1.8 2005/09/23 22:55:12 fgsch Exp $ */
+/* $OpenBSD: pccbbvar.h,v 1.9 2005/10/02 18:20:01 fgsch Exp $ */
/* $NetBSD: pccbbvar.h,v 1.13 2000/06/08 10:28:29 haya Exp $ */
/*
* Copyright (c) 1999 HAYAKAWA Koichi. All rights reserved.
@@ -54,7 +54,8 @@
#define CB_TOPIC97 7 /* Toshiba ToPIC97 */
#define CB_CIRRUS 8 /* Cirrus Logic CL-PD683X */
#define CB_TI125X 9 /* TI PCI1250/1251(B)/1450 */
-#define CB_CHIPS_LAST 10 /* Sentinel */
+#define CB_OLDO2MICRO 10 /* O2Micro */
+#define CB_CHIPS_LAST 11 /* Sentinel */
#define PCCARD_VCC_UKN 0x00 /* Unknown */
#define PCCARD_VCC_5V 0x01