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authorJonathan Gray <jsg@cvs.openbsd.org>2023-06-15 03:13:12 +0000
committerJonathan Gray <jsg@cvs.openbsd.org>2023-06-15 03:13:12 +0000
commitfa01de8282ff1c6ed144c8563ecaca2dc0e39488 (patch)
tree44a591ea332ef9a68e3cc30b05c85f05c02dd523 /sys
parent1b1f5762cfc3714e90bb36ffc1854e8d3109f647 (diff)
drm/amdgpu: refine get gpu clock counter method
From Tong Liu01 055852074c968e3649cdcac5d112af17fd39bac8 in linux-6.1.y/6.1.30 5591a051b86be170a84943698ab140342602ff7b in mainline linux
Diffstat (limited to 'sys')
-rw-r--r--sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c17
1 files changed, 15 insertions, 2 deletions
diff --git a/sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c b/sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c
index 4581d3ad160..f9cd0c7b1d0 100644
--- a/sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c
+++ b/sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c
@@ -4641,11 +4641,24 @@ static int gfx_v11_0_post_soft_reset(void *handle)
static uint64_t gfx_v11_0_get_gpu_clock_counter(struct amdgpu_device *adev)
{
uint64_t clock;
+ uint64_t clock_counter_lo, clock_counter_hi_pre, clock_counter_hi_after;
amdgpu_gfx_off_ctrl(adev, false);
mutex_lock(&adev->gfx.gpu_clock_mutex);
- clock = (uint64_t)RREG32_SOC15(SMUIO, 0, regGOLDEN_TSC_COUNT_LOWER) |
- ((uint64_t)RREG32_SOC15(SMUIO, 0, regGOLDEN_TSC_COUNT_UPPER) << 32ULL);
+ if (amdgpu_sriov_vf(adev)) {
+ clock_counter_hi_pre = (uint64_t)RREG32_SOC15(GC, 0, regCP_MES_MTIME_HI);
+ clock_counter_lo = (uint64_t)RREG32_SOC15(GC, 0, regCP_MES_MTIME_LO);
+ clock_counter_hi_after = (uint64_t)RREG32_SOC15(GC, 0, regCP_MES_MTIME_HI);
+ if (clock_counter_hi_pre != clock_counter_hi_after)
+ clock_counter_lo = (uint64_t)RREG32_SOC15(GC, 0, regCP_MES_MTIME_LO);
+ } else {
+ clock_counter_hi_pre = (uint64_t)RREG32_SOC15(SMUIO, 0, regGOLDEN_TSC_COUNT_UPPER);
+ clock_counter_lo = (uint64_t)RREG32_SOC15(SMUIO, 0, regGOLDEN_TSC_COUNT_LOWER);
+ clock_counter_hi_after = (uint64_t)RREG32_SOC15(SMUIO, 0, regGOLDEN_TSC_COUNT_UPPER);
+ if (clock_counter_hi_pre != clock_counter_hi_after)
+ clock_counter_lo = (uint64_t)RREG32_SOC15(SMUIO, 0, regGOLDEN_TSC_COUNT_LOWER);
+ }
+ clock = clock_counter_lo | (clock_counter_hi_after << 32ULL);
mutex_unlock(&adev->gfx.gpu_clock_mutex);
amdgpu_gfx_off_ctrl(adev, true);
return clock;