Give up trying to map DMA descriptor in uncached memory on ECC flavours of the

IP22 motherboard (IP26, IP28). Instead, do not ask for a BUS_DMA_COHERENT
mapping, but perform explicit cache operations.

This removes the need for the memory controller to switch between `fast' and
`slow' mode every time a DMA descriptor is updated.

Tested on IP22 and IP28.

0 files changed, 0 insertions, 0 deletions