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-rw-r--r--sys/arch/amd64/amd64/powernow-k8.c6
-rw-r--r--sys/arch/arm/xscale/pxa2x0_apm.c10
-rw-r--r--sys/arch/arm/xscale/pxa2x0_apm_asm.S8
-rw-r--r--sys/arch/arm/xscale/pxa2x0reg.h10
-rw-r--r--sys/arch/i386/i386/est.c18
-rw-r--r--sys/arch/i386/i386/powernow-k7.c8
-rw-r--r--sys/arch/i386/i386/powernow-k8.c6
-rw-r--r--sys/dev/ic/aic79xx.c4
-rw-r--r--sys/dev/ic/ath.c4
-rw-r--r--sys/dev/pci/ahd_pci.c10
-rw-r--r--sys/dev/pci/if_bgereg.h4
-rw-r--r--sys/dev/pci/if_vge.c4
-rw-r--r--sys/dev/sdmmc/sdhc.c4
-rw-r--r--sys/net80211/ieee80211_var.h4
14 files changed, 50 insertions, 50 deletions
diff --git a/sys/arch/amd64/amd64/powernow-k8.c b/sys/arch/amd64/amd64/powernow-k8.c
index e8441b290e0..233a2e6b54b 100644
--- a/sys/arch/amd64/amd64/powernow-k8.c
+++ b/sys/arch/amd64/amd64/powernow-k8.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: powernow-k8.c,v 1.11 2006/09/25 22:28:11 gwk Exp $ */
+/* $OpenBSD: powernow-k8.c,v 1.12 2006/10/19 10:55:56 tom Exp $ */
/*
* Copyright (c) 2004 Martin Végiard.
* Copyright (c) 2004-2005 Bruno Ducrot
@@ -370,13 +370,13 @@ k8_powernow_init(void)
if (k8pnow_states(cstate, ci->ci_signature, maxfid, maxvid)) {
if (cstate->n_states) {
- printf("%s: %s %d Mhz: speeds:",
+ printf("%s: %s %d MHz: speeds:",
ci->ci_dev->dv_xname, techname, cpuspeed);
for(i = cstate->n_states; i > 0; i--) {
state = &cstate->state_table[i-1];
printf(" %d", state->freq);
}
- printf(" Mhz\n");
+ printf(" MHz\n");
k8pnow_current_state = cstate;
cpu_setperf = k8_powernow_setperf;
setperf_prio = 1;
diff --git a/sys/arch/arm/xscale/pxa2x0_apm.c b/sys/arch/arm/xscale/pxa2x0_apm.c
index 8fc2bc84623..f66c4ff8df5 100644
--- a/sys/arch/arm/xscale/pxa2x0_apm.c
+++ b/sys/arch/arm/xscale/pxa2x0_apm.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: pxa2x0_apm.c,v 1.25 2005/12/22 00:42:14 deraadt Exp $ */
+/* $OpenBSD: pxa2x0_apm.c,v 1.26 2006/10/19 10:55:56 tom Exp $ */
/*-
* Copyright (c) 2001 Alexander Guy. All rights reserved.
@@ -881,7 +881,7 @@ pxa2x0_apm_sleep(struct pxa2x0_apm_softc *sc)
sd.sd_osmr5 = bus_space_read_4(sc->sc_iot, ost_ioh, OST_OSMR5);
sd.sd_oier = bus_space_read_4(sc->sc_iot, ost_ioh, OST_OIER);
- /* Bring the PXA27x into 416Mhz turbo mode. */
+ /* Bring the PXA27x into 416MHz turbo mode. */
if ((cputype & ~CPU_ID_XSCALE_COREREV_MASK) == CPU_ID_PXA27X &&
bus_space_read_4(sc->sc_iot, pxa2x0_clkman_ioh, CLKMAN_CCCR) !=
(CCCR_A | CCCR_TURBO_X2 | CCCR_RUN_X16)) {
@@ -999,7 +999,7 @@ suspend_again:
bus_space_write_4(sc->sc_iot, sc->sc_pm_ioh, POWMAN_RCSR,
RCSR_GPR | RCSR_SMR | RCSR_WDR | RCSR_HWR);
- /* Stop 3/13Mhz oscillator; do not float PCMCIA and chip-selects. */
+ /* Stop 3/13MHz oscillator; do not float PCMCIA and chip-selects. */
rv = PCFR_OPDE;
if ((cputype & ~CPU_ID_XSCALE_COREREV_MASK) == CPU_ID_PXA27X)
/* Enable nRESET_GPIO as a GPIO reset input. */
@@ -1141,13 +1141,13 @@ suspend_again:
pxa2x0_pi2c_setvoltage(sc->sc_iot, sc->sc_pm_ioh, PI2C_VOLTAGE_HIGH);
- /* Change to 208Mhz run mode with fast-bus still disabled. */
+ /* Change to 208MHz run mode with fast-bus still disabled. */
pxa27x_frequency_change(CCCR_A | CCCR_TURBO_X2 | CCCR_RUN_X16,
CLKCFG_F, &pxa2x0_memcfg);
delay(1); /* XXX is the delay long enough, and necessary at all? */
pxa27x_fastbus_run_mode(1, pxa2x0_memcfg.mdrefr_high);
- /* Change to 416Mhz turbo mode with fast-bus enabled. */
+ /* Change to 416MHz turbo mode with fast-bus enabled. */
pxa27x_frequency_change(CCCR_A | CCCR_TURBO_X2 | CCCR_RUN_X16,
CLKCFG_B | CLKCFG_F | CLKCFG_T, &pxa2x0_memcfg);
diff --git a/sys/arch/arm/xscale/pxa2x0_apm_asm.S b/sys/arch/arm/xscale/pxa2x0_apm_asm.S
index d4c79ec4484..72b307f2590 100644
--- a/sys/arch/arm/xscale/pxa2x0_apm_asm.S
+++ b/sys/arch/arm/xscale/pxa2x0_apm_asm.S
@@ -1,4 +1,4 @@
-/* $OpenBSD: pxa2x0_apm_asm.S,v 1.1 2005/02/22 21:53:03 uwe Exp $ */
+/* $OpenBSD: pxa2x0_apm_asm.S,v 1.2 2006/10/19 10:55:56 tom Exp $ */
/*
* Copyright (c) 2005 Uwe Stuehler <uwe@openbsd.org>
@@ -486,7 +486,7 @@ ENTRY(pxa27x_frequency_change)
and r3, r0, #CCCR_L_MASK
ldr r0, .Lmemctliohp
ldr r0, [r0]
- cmp r3, #CCCR_RUN_X7 /* L=7 is 91Mhz mode */
+ cmp r3, #CCCR_RUN_X7 /* L=7 is 91MHz mode */
beq frequency_change_91
and r3, r1, #CLKCFG_B
cmp r3, #CLKCFG_B
@@ -520,7 +520,7 @@ frequency_change_on_cache:
/* Program new CLKCFG value, starting a core PLL frequency change
* if CLKCFG_F is set. */
mcr p14, 0, r1, c6, c0, 0
- /* Change SDRAM clock frequency to 104Mhz, and ensure that the
+ /* Change SDRAM clock frequency to 104MHz, and ensure that the
* store to MDREFR is complete before the next SDRAM access. */
str r4, [r0, #MEMCTL_MDREFR]
ldr r5, [r0, #MEMCTL_MDREFR]
@@ -537,7 +537,7 @@ frequency_change_on_cache:
/*
* void pxa27x_cpu_speed_91(void)
*
- * Switch core run frequency to 91 Mhz.
+ * Switch core run frequency to 91 MHz.
*/
.align 5
ENTRY(pxa27x_cpu_speed_91)
diff --git a/sys/arch/arm/xscale/pxa2x0reg.h b/sys/arch/arm/xscale/pxa2x0reg.h
index 953f16a17f2..19287398112 100644
--- a/sys/arch/arm/xscale/pxa2x0reg.h
+++ b/sys/arch/arm/xscale/pxa2x0reg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: pxa2x0reg.h,v 1.27 2006/03/07 22:35:57 uwe Exp $ */
+/* $OpenBSD: pxa2x0reg.h,v 1.28 2006/10/19 10:55:56 tom Exp $ */
/* $NetBSD: pxa2x0reg.h,v 1.4 2003/06/11 20:43:01 scw Exp $ */
/*
@@ -314,10 +314,10 @@ struct pxa2x0_dma_desc {
#define CCCR_MEM_X40 (4<<0) /* x27, 99.53MHz */
#define CCCR_MEM_X45 (5<<0) /* x27, 99.53MHz */
#define CCCR_MEM_X9 (0x1f<<0) /* x9, 33.2MHz */
-/* PXA27x: L is the core run frequency to 13Mhz oscillator ratio. */
-#define CCCR_RUN_X7 (7<<0) /* 91Mhz, 91Mhz mem, 91Mhz LCD */
-#define CCCR_RUN_X8 (8<<0) /* 104Mhz, 104Mhz mem, 52Mhz LCD */
-#define CCCR_RUN_X16 (16<<0) /* 208Mhz, 104/208Mhz mem, 104Mhz LCD */
+/* PXA27x: L is the core run frequency to 13MHz oscillator ratio. */
+#define CCCR_RUN_X7 (7<<0) /* 91MHz, 91MHz mem, 91MHz LCD */
+#define CCCR_RUN_X8 (8<<0) /* 104MHz, 104MHz mem, 52MHz LCD */
+#define CCCR_RUN_X16 (16<<0) /* 208MHz, 104/208MHz mem, 104MHz LCD */
#define CLKMAN_CKEN 0x04 /* Clock Enable Register */
#define CLKMAN_OSCC 0x08 /* Oscillator Configuration Register */
diff --git a/sys/arch/i386/i386/est.c b/sys/arch/i386/i386/est.c
index 5b67843bdee..2cd33a9515a 100644
--- a/sys/arch/i386/i386/est.c
+++ b/sys/arch/i386/i386/est.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: est.c,v 1.20 2006/09/20 14:09:15 dim Exp $ */
+/* $OpenBSD: est.c,v 1.21 2006/10/19 10:55:56 tom Exp $ */
/*
* Copyright (c) 2003 Michael Eriksson.
* All rights reserved.
@@ -753,7 +753,7 @@ static const u_int16_t C7M_775_ULV[] = {
ID16( 400, 796, BUS100),
};
-/* 1.20GHz Centaur C7-M 400 Mhz FSB */
+/* 1.20GHz Centaur C7-M 400 MHz FSB */
static const u_int16_t C7M_771[] = {
ID16(1200, 860, BUS100),
ID16(1000, 860, BUS100),
@@ -762,7 +762,7 @@ static const u_int16_t C7M_771[] = {
ID16( 400, 844, BUS100),
};
-/* 1.50GHz Centaur C7-M 400 Mhz FSB */
+/* 1.50GHz Centaur C7-M 400 MHz FSB */
static const u_int16_t C7M_754[] = {
ID16(1500, 1004, BUS100),
ID16(1400, 988, BUS100),
@@ -772,7 +772,7 @@ static const u_int16_t C7M_754[] = {
ID16( 400, 844, BUS100),
};
-/* 1.60GHz Centaur C7-M 400 Mhz FSB */
+/* 1.60GHz Centaur C7-M 400 MHz FSB */
static const u_int16_t C7M_764[] = {
ID16(1600, 1084, BUS100),
ID16(1400, 1052, BUS100),
@@ -782,7 +782,7 @@ static const u_int16_t C7M_764[] = {
ID16( 400, 844, BUS100),
};
-/* 1.80GHz Centaur C7-M 400 Mhz FSB */
+/* 1.80GHz Centaur C7-M 400 MHz FSB */
static const u_int16_t C7M_784[] = {
ID16(1800, 1148, BUS100),
ID16(1600, 1100, BUS100),
@@ -793,7 +793,7 @@ static const u_int16_t C7M_784[] = {
ID16( 400, 844, BUS100),
};
-/* 2.00GHz Centaur C7-M 400 Mhz FSB */
+/* 2.00GHz Centaur C7-M 400 MHz FSB */
static const u_int16_t C7M_794[] = {
ID16(2000, 1148, BUS100),
ID16(1800, 1132, BUS100),
@@ -805,7 +805,7 @@ static const u_int16_t C7M_794[] = {
ID16( 400, 844, BUS100),
};
-/* 1.60GHz Centaur C7-M 533 Mhz FSB */
+/* 1.60GHz Centaur C7-M 533 MHz FSB */
static const u_int16_t C7M_765[] = {
ID16(1600, 1084, BUS133),
ID16(1467, 1052, BUS133),
@@ -815,7 +815,7 @@ static const u_int16_t C7M_765[] = {
ID16( 533, 844, BUS133),
};
-/* 2.00GHz Centaur C7-M 533 Mhz FSB */
+/* 2.00GHz Centaur C7-M 533 MHz FSB */
static const u_int16_t C7M_785[] = {
ID16(1867, 1148, BUS133),
ID16(1600, 1100, BUS133),
@@ -826,7 +826,7 @@ static const u_int16_t C7M_785[] = {
ID16( 533, 844, BUS133),
};
-/* 2.00GHz Centaur C7-M 533 Mhz FSB */
+/* 2.00GHz Centaur C7-M 533 MHz FSB */
static const u_int16_t C7M_795[] = {
ID16(2000, 1148, BUS133),
ID16(1867, 1132, BUS133),
diff --git a/sys/arch/i386/i386/powernow-k7.c b/sys/arch/i386/i386/powernow-k7.c
index 76b920ef419..daea0b2c44d 100644
--- a/sys/arch/i386/i386/powernow-k7.c
+++ b/sys/arch/i386/i386/powernow-k7.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: powernow-k7.c,v 1.26 2006/09/29 21:09:25 gwk Exp $ */
+/* $OpenBSD: powernow-k7.c,v 1.27 2006/10/19 10:55:56 tom Exp $ */
/*
* Copyright (c) 2004 Martin Végiard.
@@ -120,7 +120,7 @@ struct psb_s {
struct pst_s {
uint32_t signature;
- uint8_t fsb; /* Front Side Bus frequency (Mhz) */
+ uint8_t fsb; /* Front Side Bus frequency (MHz) */
uint8_t fid; /* Max Frequency code */
uint8_t vid; /* Max Voltage code */
uint8_t n_states; /* Number of states */
@@ -338,13 +338,13 @@ k7_powernow_init(void)
techname = "Cool`n'Quiet K7";
else
techname = "Powernow! K7";
- printf("%s: %s %d Mhz: speeds:",
+ printf("%s: %s %d MHz: speeds:",
ci->ci_dev.dv_xname, techname, pentium_mhz);
for (i = cstate->n_states; i > 0; i--) {
state = &cstate->state_table[i-1];
printf(" %d", state->freq);
}
- printf(" Mhz\n");
+ printf(" MHz\n");
k7pnow_current_state = cstate;
cpu_setperf = k7_powernow_setperf;
diff --git a/sys/arch/i386/i386/powernow-k8.c b/sys/arch/i386/i386/powernow-k8.c
index a028bc44c8e..569b7f3631b 100644
--- a/sys/arch/i386/i386/powernow-k8.c
+++ b/sys/arch/i386/i386/powernow-k8.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: powernow-k8.c,v 1.16 2006/09/25 22:28:11 gwk Exp $ */
+/* $OpenBSD: powernow-k8.c,v 1.17 2006/10/19 10:55:56 tom Exp $ */
/*
* Copyright (c) 2004 Martin Végiard.
@@ -387,13 +387,13 @@ k8_powernow_init(void)
if (k8pnow_states(cstate, ci->ci_signature, maxfid, maxvid)) {
if (cstate->n_states) {
- printf("%s: %s %d Mhz: speeds:",
+ printf("%s: %s %d MHz: speeds:",
ci->ci_dev.dv_xname, techname, pentium_mhz);
for (i = cstate->n_states; i > 0; i--) {
state = &cstate->state_table[i-1];
printf(" %d", state->freq);
}
- printf(" Mhz\n");
+ printf(" MHz\n");
k8pnow_current_state = cstate;
cpu_setperf = k8_powernow_setperf;
setperf_prio = 1;
diff --git a/sys/dev/ic/aic79xx.c b/sys/dev/ic/aic79xx.c
index 1a00de91627..456b55ece86 100644
--- a/sys/dev/ic/aic79xx.c
+++ b/sys/dev/ic/aic79xx.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: aic79xx.c,v 1.36 2006/10/17 11:45:59 todd Exp $ */
+/* $OpenBSD: aic79xx.c,v 1.37 2006/10/19 10:55:56 tom Exp $ */
/*
* Copyright (c) 2004 Milos Urbanek, Kenneth R. Westerback & Marco Peereboom
@@ -3324,7 +3324,7 @@ ahd_update_neg_table(struct ahd_softc *ahd, struct ahd_devinfo *devinfo,
/*
* Harpoon2A assumed that there would be a
- * fallback rate between 160MHz and 80Mhz,
+ * fallback rate between 160MHz and 80MHz,
* so 7 is used as the period factor rather
* than 8 for 160MHz.
*/
diff --git a/sys/dev/ic/ath.c b/sys/dev/ic/ath.c
index 8874ac1bdf2..265e30b2f35 100644
--- a/sys/dev/ic/ath.c
+++ b/sys/dev/ic/ath.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: ath.c,v 1.57 2006/10/14 16:16:18 reyk Exp $ */
+/* $OpenBSD: ath.c,v 1.58 2006/10/19 10:55:56 tom Exp $ */
/* $NetBSD: ath.c,v 1.37 2004/08/18 21:59:39 dyoung Exp $ */
/*-
@@ -2753,7 +2753,7 @@ ath_chan_set(struct ath_softc *sc, struct ieee80211_channel *chan)
if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE,
&status)) {
printf("%s: ath_chan_set: unable to reset "
- "channel %u (%u Mhz)\n", ifp->if_xname,
+ "channel %u (%u MHz)\n", ifp->if_xname,
ieee80211_chan2ieee(ic, chan), chan->ic_freq);
return EIO;
}
diff --git a/sys/dev/pci/ahd_pci.c b/sys/dev/pci/ahd_pci.c
index 543b4a81b06..110f4eb8f1f 100644
--- a/sys/dev/pci/ahd_pci.c
+++ b/sys/dev/pci/ahd_pci.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: ahd_pci.c,v 1.14 2006/07/11 18:50:05 kettenis Exp $ */
+/* $OpenBSD: ahd_pci.c,v 1.15 2006/10/19 10:55:56 tom Exp $ */
/*
* Copyright (c) 2004 Milos Urbanek, Kenneth R. Westerback & Marco Peereboom
@@ -256,10 +256,10 @@ static const char *pci_bus_modes[] =
"PCI bus mode unknown",
"PCI bus mode unknown",
"PCI bus mode unknown",
- "PCI-X 101-133Mhz",
- "PCI-X 67-100Mhz",
- "PCI-X 50-66Mhz",
- "PCI 33 or 66Mhz"
+ "PCI-X 101-133MHz",
+ "PCI-X 67-100MHz",
+ "PCI-X 50-66MHz",
+ "PCI 33 or 66MHz"
};
#define TESTMODE 0x00000800ul
diff --git a/sys/dev/pci/if_bgereg.h b/sys/dev/pci/if_bgereg.h
index 2b0ac15cccc..93d6318616b 100644
--- a/sys/dev/pci/if_bgereg.h
+++ b/sys/dev/pci/if_bgereg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: if_bgereg.h,v 1.66 2006/10/17 22:28:07 brad Exp $ */
+/* $OpenBSD: if_bgereg.h,v 1.67 2006/10/19 10:55:56 tom Exp $ */
/*
* Copyright (c) 2001 Wind River Systems
@@ -740,7 +740,7 @@
#define BGE_SERDESCFG_CDET 0x00010000 /* comma detect enable */
#define BGE_SERDESCFG_TBILOOP 0x00020000 /* local loopback */
#define BGE_SERDESCFG_REMLOOP 0x00040000 /* remote loopback */
-#define BGE_SERDESCFG_INVPHASE 0x00080000 /* Reverse 125Mhz clock */
+#define BGE_SERDESCFG_INVPHASE 0x00080000 /* Reverse 125MHz clock */
#define BGE_SERDESCFG_12REGCTL 0x00300000 /* 1.2v regulator ctl */
#define BGE_SERDESCFG_REGCTL 0x00C00000 /* regulator ctl (2.5v) */
diff --git a/sys/dev/pci/if_vge.c b/sys/dev/pci/if_vge.c
index fac9849db91..9c4d3fed95c 100644
--- a/sys/dev/pci/if_vge.c
+++ b/sys/dev/pci/if_vge.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: if_vge.c,v 1.28 2006/10/03 19:46:08 damien Exp $ */
+/* $OpenBSD: if_vge.c,v 1.29 2006/10/19 10:55:56 tom Exp $ */
/* $FreeBSD: if_vge.c,v 1.3 2004/09/11 22:13:25 wpaul Exp $ */
/*
* Copyright (c) 2004
@@ -43,7 +43,7 @@
*/
/*
- * The VIA Networking VT6122 is a 32bit, 33/66Mhz PCI device that
+ * The VIA Networking VT6122 is a 32bit, 33/66MHz PCI device that
* combines a tri-speed ethernet MAC and PHY, with the following
* features:
*
diff --git a/sys/dev/sdmmc/sdhc.c b/sys/dev/sdmmc/sdhc.c
index b7754b614f6..971f686fa03 100644
--- a/sys/dev/sdmmc/sdhc.c
+++ b/sys/dev/sdmmc/sdhc.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: sdhc.c,v 1.11 2006/07/30 16:40:27 fgsch Exp $ */
+/* $OpenBSD: sdhc.c,v 1.12 2006/10/19 10:55:56 tom Exp $ */
/*
* Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org>
@@ -182,7 +182,7 @@ sdhc_host_found(struct sdhc_softc *sc, bus_space_tag_t iot,
sc->sc_dev.dv_xname);
goto err;
} else if (hp->clkbase < 10000 || hp->clkbase > 63000) {
- /* SDHC 1.0 supports only 10-63 Mhz. */
+ /* SDHC 1.0 supports only 10-63 MHz. */
printf("%s: base clock frequency out of range: %u MHz\n",
sc->sc_dev.dv_xname, hp->clkbase / 1000);
goto err;
diff --git a/sys/net80211/ieee80211_var.h b/sys/net80211/ieee80211_var.h
index 45c49ebefa2..81c5d085982 100644
--- a/sys/net80211/ieee80211_var.h
+++ b/sys/net80211/ieee80211_var.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: ieee80211_var.h,v 1.16 2006/06/27 20:55:51 reyk Exp $ */
+/* $OpenBSD: ieee80211_var.h,v 1.17 2006/10/19 10:55:56 tom Exp $ */
/* $NetBSD: ieee80211_var.h,v 1.7 2004/05/06 03:07:10 dyoung Exp $ */
/*-
@@ -96,7 +96,7 @@ enum ieee80211_protmode {
* Channels are specified by frequency and attributes.
*/
struct ieee80211_channel {
- u_int16_t ic_freq; /* setting in Mhz */
+ u_int16_t ic_freq; /* setting in MHz */
u_int16_t ic_flags; /* see below */
};
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-27 01:29:03 +0000