diff options
-rw-r--r-- | sys/dev/fdt/rkclock.c | 9 | ||||
-rw-r--r-- | sys/dev/fdt/rkclock_clocks.h | 93 |
2 files changed, 60 insertions, 42 deletions
diff --git a/sys/dev/fdt/rkclock.c b/sys/dev/fdt/rkclock.c index 2da88d02041..18561deee31 100644 --- a/sys/dev/fdt/rkclock.c +++ b/sys/dev/fdt/rkclock.c @@ -1,4 +1,4 @@ -/* $OpenBSD: rkclock.c,v 1.8 2017/07/23 17:06:51 kettenis Exp $ */ +/* $OpenBSD: rkclock.c,v 1.9 2017/08/07 22:20:39 kettenis Exp $ */ /* * Copyright (c) 2017 Mark Kettenis <kettenis@openbsd.org> * @@ -436,10 +436,17 @@ rk3399_enable(void *cookie, uint32_t *cells, int on) case RK3399_CLK_MAC_RX: case RK3399_CLK_MAC_TX: case RK3399_CLK_MAC: + case RK3399_CLK_USB3OTG0_REF: + case RK3399_CLK_USB3OTG1_REF: + case RK3399_CLK_USB3OTG0_SUSPEND: + case RK3399_CLK_USB3OTG1_SUSPEND: case RK3399_CLK_SDMMC_DRV: case RK3399_CLK_SDMMC_SAMPLE: case RK3399_ACLK_EMMC: case RK3399_ACLK_GMAC: + case RK3399_ACLK_USB3OTG0: + case RK3399_ACLK_USB3OTG1: + case RK3399_ACLK_USB3_GRF: case RK3399_PCLK_GMAC: case RK3399_HCLK_HOST0: case RK3399_HCLK_HOST0_ARB: diff --git a/sys/dev/fdt/rkclock_clocks.h b/sys/dev/fdt/rkclock_clocks.h index e10fee82ee2..6bc3dc28d4a 100644 --- a/sys/dev/fdt/rkclock_clocks.h +++ b/sys/dev/fdt/rkclock_clocks.h @@ -1,54 +1,65 @@ /* Public Domain */ -#define RK3288_PLL_CPLL 3 -#define RK3288_PLL_GPLL 4 +/* + * RK3288 clocks. + */ -#define RK3288_CLK_SDMMC 68 -#define RK3288_CLK_UART0 77 -#define RK3288_CLK_UART1 78 -#define RK3288_CLK_UART2 79 -#define RK3288_CLK_UART3 80 -#define RK3288_CLK_UART4 81 +#define RK3288_PLL_CPLL 3 +#define RK3288_PLL_GPLL 4 -#define RK3288_CLK_MAC_RX 102 -#define RK3288_CLK_MAC_TX 103 -#define RK3288_CLK_SDMMC_DRV 114 -#define RK3288_CLK_SDMMC_SAMPLE 118 +#define RK3288_CLK_SDMMC 68 +#define RK3288_CLK_UART0 77 +#define RK3288_CLK_UART1 78 +#define RK3288_CLK_UART2 79 +#define RK3288_CLK_UART3 80 +#define RK3288_CLK_UART4 81 +#define RK3288_CLK_MAC_RX 102 +#define RK3288_CLK_MAC_TX 103 +#define RK3288_CLK_SDMMC_DRV 114 +#define RK3288_CLK_SDMMC_SAMPLE 118 +#define RK3288_CLK_MAC 151 -#define RK3288_CLK_MAC 151 +#define RK3288_ACLK_GMAC 196 -#define RK3288_ACLK_GMAC 196 +#define RK3288_PCLK_GMAC 349 -#define RK3288_PCLK_GMAC 349 +#define RK3288_HCLK_HOST0 450 +#define RK3288_HCLK_SDMMC 456 -#define RK3288_HCLK_HOST0 450 -#define RK3288_HCLK_SDMMC 456 +/* + * RK3399 clocks. + */ -#define RK3399_PLL_CPLL 4 -#define RK3399_PLL_GPLL 5 -#define RK3399_PLL_NPLL 6 +#define RK3399_PLL_CPLL 4 +#define RK3399_PLL_GPLL 5 +#define RK3399_PLL_NPLL 6 -#define RK3399_CLK_SDMMC 76 -#define RK3399_CLK_EMMC 78 -#define RK3399_CLK_UART0 81 -#define RK3399_CLK_UART1 82 -#define RK3399_CLK_UART2 83 -#define RK3399_CLK_UART3 84 -#define RK3399_CLK_MAC_RX 103 -#define RK3399_CLK_MAC_TX 104 -#define RK3399_CLK_MAC 105 +#define RK3399_CLK_SDMMC 76 +#define RK3399_CLK_EMMC 78 +#define RK3399_CLK_UART0 81 +#define RK3399_CLK_UART1 82 +#define RK3399_CLK_UART2 83 +#define RK3399_CLK_UART3 84 +#define RK3399_CLK_MAC_RX 103 +#define RK3399_CLK_MAC_TX 104 +#define RK3399_CLK_MAC 105 +#define RK3399_CLK_USB3OTG0_REF 129 +#define RK3399_CLK_USB3OTG1_REF 130 +#define RK3399_CLK_USB3OTG0_SUSPEND 131 +#define RK3399_CLK_USB3OTG1_SUSPEND 132 +#define RK3399_CLK_SDMMC_DRV 154 +#define RK3399_CLK_SDMMC_SAMPLE 155 -#define RK3399_CLK_SDMMC_DRV 154 -#define RK3399_CLK_SDMMC_SAMPLE 155 +#define RK3399_ACLK_GMAC 213 +#define RK3399_ACLK_EMMC 240 +#define RK3399_ACLK_USB3OTG0 246 +#define RK3399_ACLK_USB3OTG1 247 +#define RK3399_ACLK_USB3_GRF 249 -#define RK3399_ACLK_GMAC 213 -#define RK3399_ACLK_EMMC 240 +#define RK3399_PCLK_GMAC 358 -#define RK3399_PCLK_GMAC 358 - -#define RK3399_HCLK_HOST0 456 -#define RK3399_HCLK_HOST0_ARB 457 -#define RK3399_HCLK_HOST1 458 -#define RK3399_HCLK_HOST1_ARB 459 - -#define RK3399_HCLK_SDMMC 462 +#define RK3399_HCLK_HOST0 456 +#define RK3399_HCLK_HOST0_ARB 457 +#define RK3399_HCLK_HOST1 458 +#define RK3399_HCLK_HOST1_ARB 459 +#define RK3399_HCLK_SDMMC 462 |