diff options
-rw-r--r-- | gnu/gcc/gcc/config/sh/lib1funcs.asm | 4 | ||||
-rw-r--r-- | gnu/gcc/gcc/config/sh/openbsd.h | 133 | ||||
-rw-r--r-- | gnu/gcc/gcc/config/sh/sh-protos.h | 2 | ||||
-rw-r--r-- | gnu/gcc/gcc/config/sh/sh.c | 238 | ||||
-rw-r--r-- | gnu/gcc/gcc/config/sh/sh.h | 226 | ||||
-rw-r--r-- | gnu/usr.bin/cc/Makefile.tgt | 4 | ||||
-rw-r--r-- | gnu/usr.bin/cc/cc_tools/Makefile | 8 | ||||
-rw-r--r-- | gnu/usr.bin/cc/libgcc/Makefile | 11 |
8 files changed, 396 insertions, 230 deletions
diff --git a/gnu/gcc/gcc/config/sh/lib1funcs.asm b/gnu/gcc/gcc/config/sh/lib1funcs.asm index 466b89046f3..99f589fae7a 100644 --- a/gnu/gcc/gcc/config/sh/lib1funcs.asm +++ b/gnu/gcc/gcc/config/sh/lib1funcs.asm @@ -1011,7 +1011,7 @@ GLOBAL(sdivsi3_i4): #ifdef L_sdivsi3 /* __SH4_SINGLE_ONLY__ keeps this part for link compatibility with sh2e/sh3e code. */ -#if (! defined(__SH4__) && ! defined (__SH4_SINGLE__)) || defined (__linux__) +#if (! defined(__SH4__) && ! defined (__SH4_SINGLE__)) || defined (__linux__) || defined (__OpenBSD__) !! !! Steve Chamberlain !! sac@cygnus.com @@ -1452,7 +1452,7 @@ L1: #ifdef L_udivsi3 /* __SH4_SINGLE_ONLY__ keeps this part for link compatibility with sh2e/sh3e code. */ -#if (! defined(__SH4__) && ! defined (__SH4_SINGLE__)) || defined (__linux__) +#if (! defined(__SH4__) && ! defined (__SH4_SINGLE__)) || defined (__linux__) || defined (__OpenBSD__) !! args in r4 and r5, result in r0, clobbers r4, pr, and t bit .global GLOBAL(udivsi3) diff --git a/gnu/gcc/gcc/config/sh/openbsd.h b/gnu/gcc/gcc/config/sh/openbsd.h new file mode 100644 index 00000000000..1fd7b5b8462 --- /dev/null +++ b/gnu/gcc/gcc/config/sh/openbsd.h @@ -0,0 +1,133 @@ +/* Definitions for SH running OpenBSD using ELF + Copyright (C) 2002 - 2006 Free Software Foundation, Inc. + Adapted from the NetBSD configuration contributed by Wasabi Systems, Inc. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2, or (at your option) +any later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; see the file COPYING. If not, write to +the Free Software Foundation, 51 Franklin Street, Fifth Floor, +Boston, MA 02110-1301, USA. */ + +/* Get generic OpenBSD definitions. */ +#include <openbsd.h> + +#define TARGET_VERSION_ENDIAN "le" +#define TARGET_VERSION_CPU "sh" + +/* Enable DWARF 2 exceptions. */ +#undef DWARF2_UNWIND_INFO +#define DWARF2_UNWIND_INFO 1 + +#undef TARGET_CPU_DEFAULT +#define TARGET_CPU_DEFAULT SELECT_SH4 + +#undef TARGET_DEFAULT +#define TARGET_DEFAULT \ + (TARGET_CPU_DEFAULT | MASK_USERMODE | TARGET_ENDIAN_DEFAULT) + +#define TARGET_OS_CPP_BUILTINS() OPENBSD_OS_CPP_BUILTINS_ELF() + +/* Layout of source language data types */ + +/* This must agree with <machine/_types.h> */ +#undef SIZE_TYPE +#define SIZE_TYPE "long unsigned int" + +#undef PTRDIFF_TYPE +#define PTRDIFF_TYPE "long int" + +#undef INTMAX_TYPE +#define INTMAX_TYPE "long long int" + +#undef UINTMAX_TYPE +#define UINTMAX_TYPE "long long unsigned int" + +#undef WCHAR_TYPE +#define WCHAR_TYPE "int" + +#undef WCHAR_TYPE_SIZE +#define WCHAR_TYPE_SIZE 32 + +#undef LINK_DEFAULT_CPU_EMUL +#define LINK_DEFAULT_CPU_EMUL "" + +#undef SUBTARGET_LINK_EMUL_SUFFIX +#define SUBTARGET_LINK_EMUL_SUFFIX "_obsd" + +#undef LINK_EMUL_PREFIX +#define LINK_EMUL_PREFIX "sh%{!mb:l}elf" + +#undef SUBTARGET_LINK_SPEC +#ifdef OBSD_NO_DYNAMIC_LIBRARIES +#define SUBTARGET_LINK_SPEC \ + "%{g:%{!nostdlib:-L/usr/lib/debug}} %{!nostdlib:%{!r*:%{!e*:-e __start}}} -dc -dp %{assert*}" +#else +#define SUBTARGET_LINK_SPEC \ + "%{g:%{!nostdlib:-L/usr/lib/debug}} %{!shared:%{!nostdlib:%{!r*:%{!e*:-e __start}}}} %{shared:-Bshareable -x} -dc -dp %{R*} %{static:-Bstatic} %{assert*} %{!dynamic-linker:-dynamic-linker /usr/libexec/ld.so}" +#endif + + +#undef LINK_SPEC +#define LINK_SPEC SH_LINK_SPEC + +/* As an elf system, we need crtbegin/crtend stuff. */ +#undef STARTFILE_SPEC +#define STARTFILE_SPEC "\ + %{!shared: %{pg:gcrt0%O%s} %{!pg:%{p:gcrt0%O%s} %{!p:crt0%O%s}} \ + crtbegin%O%s} %{shared:crtbeginS%O%s}" +#undef ENDFILE_SPEC +#define ENDFILE_SPEC "%{!shared:crtend%O%s} %{shared:crtendS%O%s}" + +/* Needed for ELF (inspired by netbsd-elf). */ +#undef LOCAL_LABEL_PREFIX +#define LOCAL_LABEL_PREFIX "." + +/* Provide a CPP_SPEC appropriate for OpenBSD. */ +#undef SUBTARGET_CPP_SPEC +#define SUBTARGET_CPP_SPEC OBSD_CPP_SPEC + +/* Define because we use the label and we do not need them. */ +#define NO_PROFILE_COUNTERS 1 + +#undef FUNCTION_PROFILER +#define FUNCTION_PROFILER(STREAM,LABELNO) \ +do \ + { \ + if (TARGET_SHMEDIA32 || TARGET_SHMEDIA64) \ + { \ + /* FIXME */ \ + sorry ("unimplemented-shmedia profiling"); \ + } \ + else \ + { \ + fprintf((STREAM), "\tmov.l\t%sLP%d,r1\n", \ + LOCAL_LABEL_PREFIX, (LABELNO)); \ + fprintf((STREAM), "\tmova\t%sLP%dr,r0\n", \ + LOCAL_LABEL_PREFIX, (LABELNO)); \ + fprintf((STREAM), "\tjmp\t@r1\n"); \ + fprintf((STREAM), "\tnop\n"); \ + fprintf((STREAM), "\t.align\t2\n"); \ + fprintf((STREAM), "%sLP%d:\t.long\t__mcount\n", \ + LOCAL_LABEL_PREFIX, (LABELNO)); \ + fprintf((STREAM), "%sLP%dr:\n", LOCAL_LABEL_PREFIX, (LABELNO)); \ + } \ + } \ +while (0) + +/* Since libgcc is compiled with -fpic for this target, we can't use + __sdivsi3_1 as the division strategy for -O0 and -Os. */ +#undef SH_DIV_STRATEGY_DEFAULT +#define SH_DIV_STRATEGY_DEFAULT SH_DIV_CALL2 +#undef SH_DIV_STR_FOR_SIZE +#define SH_DIV_STR_FOR_SIZE "call2" diff --git a/gnu/gcc/gcc/config/sh/sh-protos.h b/gnu/gcc/gcc/config/sh/sh-protos.h index a0661545b56..909a68b4b8a 100644 --- a/gnu/gcc/gcc/config/sh/sh-protos.h +++ b/gnu/gcc/gcc/config/sh/sh-protos.h @@ -154,6 +154,8 @@ extern void sh_pr_nosave_low_regs (struct cpp_reader *); extern rtx function_symbol (rtx, const char *, enum sh_function_kind); extern rtx sh_get_pr_initial_val (void); +extern void sh_override_options (void); + extern rtx sh_function_arg (CUMULATIVE_ARGS *, enum machine_mode, tree, int); extern void sh_function_arg_advance (CUMULATIVE_ARGS *, enum machine_mode, tree, int); extern int sh_pass_in_reg_p (CUMULATIVE_ARGS *, enum machine_mode, tree); diff --git a/gnu/gcc/gcc/config/sh/sh.c b/gnu/gcc/gcc/config/sh/sh.c index 44d294e3722..9640c2048c6 100644 --- a/gnu/gcc/gcc/config/sh/sh.c +++ b/gnu/gcc/gcc/config/sh/sh.c @@ -10943,3 +10943,241 @@ sh_secondary_reload (bool in_p, rtx x, enum reg_class class, enum sh_divide_strategy_e sh_div_strategy = SH_DIV_STRATEGY_DEFAULT; #include "gt-sh.h" + +void +sh_override_options (void) +{ + int regno; + +#if defined(OPENBSD_NATIVE) || defined(OPENBSD_CROSS) + /* disable stack protection for now */ + flag_stack_protect = 0; +#endif + + if (flag_finite_math_only == 2) + flag_finite_math_only + = !flag_signaling_nans && TARGET_SH2E && ! TARGET_IEEE; + if (TARGET_SH2E && !flag_finite_math_only) + target_flags |= MASK_IEEE; + sh_cpu = CPU_SH1; + assembler_dialect = 0; + if (TARGET_SH2) + sh_cpu = CPU_SH2; + if (TARGET_SH2E) + sh_cpu = CPU_SH2E; + if (TARGET_SH2A) + { + sh_cpu = CPU_SH2A; + if (TARGET_SH2A_DOUBLE) + target_flags |= MASK_FMOVD; + } + if (TARGET_SH3) + sh_cpu = CPU_SH3; + if (TARGET_SH3E) + sh_cpu = CPU_SH3E; + if (TARGET_SH4) + { + assembler_dialect = 1; + sh_cpu = CPU_SH4; + } + if (TARGET_SH4A_ARCH) + { + assembler_dialect = 1; + sh_cpu = CPU_SH4A; + } + if (TARGET_SH5) + { + sh_cpu = CPU_SH5; + target_flags |= MASK_ALIGN_DOUBLE; + if (TARGET_SHMEDIA_FPU) + target_flags |= MASK_FMOVD; + if (TARGET_SHMEDIA) + { + /* There are no delay slots on SHmedia. */ + flag_delayed_branch = 0; + /* Relaxation isn't yet supported for SHmedia */ + target_flags &= ~MASK_RELAX; + /* After reload, if conversion does little good but can cause + ICEs: + - find_if_block doesn't do anything for SH because we don't + have conditional execution patterns. (We use conditional + move patterns, which are handled differently, and only + before reload). + - find_cond_trap doesn't do anything for the SH because we \ + don't have conditional traps. + - find_if_case_1 uses redirect_edge_and_branch_force in + the only path that does an optimization, and this causes + an ICE when branch targets are in registers. + - find_if_case_2 doesn't do anything for the SHmedia after + reload except when it can redirect a tablejump - and + that's rather rare. */ + flag_if_conversion2 = 0; + if (! strcmp (sh_div_str, "call")) + sh_div_strategy = SH_DIV_CALL; + else if (! strcmp (sh_div_str, "call2")) + sh_div_strategy = SH_DIV_CALL2; + if (! strcmp (sh_div_str, "fp") && TARGET_FPU_ANY) + sh_div_strategy = SH_DIV_FP; + else if (! strcmp (sh_div_str, "inv")) + sh_div_strategy = SH_DIV_INV; + else if (! strcmp (sh_div_str, "inv:minlat")) + sh_div_strategy = SH_DIV_INV_MINLAT; + else if (! strcmp (sh_div_str, "inv20u")) + sh_div_strategy = SH_DIV_INV20U; + else if (! strcmp (sh_div_str, "inv20l")) + sh_div_strategy = SH_DIV_INV20L; + else if (! strcmp (sh_div_str, "inv:call2")) + sh_div_strategy = SH_DIV_INV_CALL2; + else if (! strcmp (sh_div_str, "inv:call")) + sh_div_strategy = SH_DIV_INV_CALL; + else if (! strcmp (sh_div_str, "inv:fp")) + { + if (TARGET_FPU_ANY) + sh_div_strategy = SH_DIV_INV_FP; + else + sh_div_strategy = SH_DIV_INV; + } + } + /* -fprofile-arcs needs a working libgcov . In unified tree + configurations with newlib, this requires to configure with + --with-newlib --with-headers. But there is no way to check + here we have a working libgcov, so just assume that we have. */ + if (profile_flag) + warning (0, "profiling is still experimental for this target"); + } + else + { + /* Only the sh64-elf assembler fully supports .quad properly. */ + targetm.asm_out.aligned_op.di = NULL; + targetm.asm_out.unaligned_op.di = NULL; + } + if (TARGET_SH1) + { + if (! strcmp (sh_div_str, "call-div1")) + sh_div_strategy = SH_DIV_CALL_DIV1; + else if (! strcmp (sh_div_str, "call-fp") + && (TARGET_FPU_DOUBLE + || (TARGET_HARD_SH4 && TARGET_SH2E) + || (TARGET_SHCOMPACT && TARGET_FPU_ANY))) + sh_div_strategy = SH_DIV_CALL_FP; + else if (! strcmp (sh_div_str, "call-table") && TARGET_SH2) + sh_div_strategy = SH_DIV_CALL_TABLE; + else + /* Pick one that makes most sense for the target in general. + It is not much good to use different functions depending + on -Os, since then we'll end up with two different functions + when some of the code is compiled for size, and some for + speed. */ + + /* SH4 tends to emphasize speed. */ + if (TARGET_HARD_SH4) + sh_div_strategy = SH_DIV_CALL_TABLE; + /* These have their own way of doing things. */ + else if (TARGET_SH2A) + sh_div_strategy = SH_DIV_INTRINSIC; + /* ??? Should we use the integer SHmedia function instead? */ + else if (TARGET_SHCOMPACT && TARGET_FPU_ANY) + sh_div_strategy = SH_DIV_CALL_FP; + /* SH1 .. SH3 cores often go into small-footprint systems, so + default to the smallest implementation available. */ + else if (TARGET_SH2) /* ??? EXPERIMENTAL */ + sh_div_strategy = SH_DIV_CALL_TABLE; + else + sh_div_strategy = SH_DIV_CALL_DIV1; + } + if (!TARGET_SH1) + TARGET_PRETEND_CMOVE = 0; + if (sh_divsi3_libfunc[0]) + ; /* User supplied - leave it alone. */ + else if (TARGET_DIVIDE_CALL_FP) + sh_divsi3_libfunc = "__sdivsi3_i4"; + else if (TARGET_DIVIDE_CALL_TABLE) + sh_divsi3_libfunc = "__sdivsi3_i4i"; + else if (TARGET_SH5) + sh_divsi3_libfunc = "__sdivsi3_1"; + else + sh_divsi3_libfunc = "__sdivsi3"; + if (TARGET_FMOVD) + reg_class_from_letter['e' - 'a'] = NO_REGS; + + for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) + if (! VALID_REGISTER_P (regno)) + sh_register_names[regno][0] = '\0'; + + for (regno = 0; regno < ADDREGNAMES_SIZE; regno++) + if (! VALID_REGISTER_P (ADDREGNAMES_REGNO (regno))) + sh_additional_register_names[regno][0] = '\0'; + + if (flag_omit_frame_pointer < 0) + { + /* The debugging information is sufficient, + but gdb doesn't implement this yet */ + if (0) + flag_omit_frame_pointer + = (PREFERRED_DEBUGGING_TYPE == DWARF2_DEBUG); + else + flag_omit_frame_pointer = 0; + } + + if ((flag_pic && ! TARGET_PREFERGOT) + || (TARGET_SHMEDIA && !TARGET_PT_FIXED)) + flag_no_function_cse = 1; + + if (SMALL_REGISTER_CLASSES) + { + /* Never run scheduling before reload, since that can + break global alloc, and generates slower code anyway due + to the pressure on R0. */ + /* Enable sched1 for SH4; ready queue will be reordered by + the target hooks when pressure is high. We can not do this for + SH3 and lower as they give spill failures for R0. */ + if (!TARGET_HARD_SH4 || flag_pic) + flag_schedule_insns = 0; + /* ??? Current exception handling places basic block boundaries + after call_insns. It causes the high pressure on R0 and gives + spill failures for R0 in reload. See PR 22553 and the thread + on gcc-patches + <http://gcc.gnu.org/ml/gcc-patches/2005-10/msg00816.html>. */ + else if (flag_exceptions) + { + if (flag_schedule_insns == 1) + warning (0, "ignoring -fschedule-insns because of exception handling bug"); + flag_schedule_insns = 0; + } + } + + if (align_loops == 0) + align_loops = 1 << (TARGET_SH5 ? 3 : 2); +#if defined(OPENBSD_NATIVE) || defined(OPENBSD_CROSS) + /* Do not align jump targets to cache line boundaries at -O2 */ + if (align_jumps == 0) + align_jumps = 2; +#else + if (align_jumps == 0) + align_jumps = 1 << CACHE_LOG; +#endif + else if (align_jumps < (TARGET_SHMEDIA ? 4 : 2)) + align_jumps = TARGET_SHMEDIA ? 4 : 2; + + /* Allocation boundary (in *bytes*) for the code of a function. + SH1: 32 bit alignment is faster, because instructions are always + fetched as a pair from a longword boundary. + SH2 .. SH5 : align to cache line start. */ + if (align_functions == 0) + align_functions + = TARGET_SMALLCODE ? FUNCTION_BOUNDARY/8 : (1 << CACHE_LOG); + /* The linker relaxation code breaks when a function contains + alignments that are larger than that at the start of a + compilation unit. */ + if (TARGET_RELAX) + { + int min_align + = align_loops > align_jumps ? align_loops : align_jumps; + + /* Also take possible .long constants / mova tables int account. */ + if (min_align < 4) + min_align = 4; + if (align_functions < min_align) + align_functions = min_align; + } +} diff --git a/gnu/gcc/gcc/config/sh/sh.h b/gnu/gcc/gcc/config/sh/sh.h index fc4e1f282a4..ef35840be41 100644 --- a/gnu/gcc/gcc/config/sh/sh.h +++ b/gnu/gcc/gcc/config/sh/sh.h @@ -521,231 +521,7 @@ extern enum sh_divide_strategy_e sh_div_strategy; #define SH_DIV_STRATEGY_DEFAULT SH_DIV_CALL #endif -#define OVERRIDE_OPTIONS \ -do { \ - int regno; \ - \ - if (flag_finite_math_only == 2) \ - flag_finite_math_only \ - = !flag_signaling_nans && TARGET_SH2E && ! TARGET_IEEE; \ - if (TARGET_SH2E && !flag_finite_math_only) \ - target_flags |= MASK_IEEE; \ - sh_cpu = CPU_SH1; \ - assembler_dialect = 0; \ - if (TARGET_SH2) \ - sh_cpu = CPU_SH2; \ - if (TARGET_SH2E) \ - sh_cpu = CPU_SH2E; \ - if (TARGET_SH2A) \ - { \ - sh_cpu = CPU_SH2A; \ - if (TARGET_SH2A_DOUBLE) \ - target_flags |= MASK_FMOVD; \ - } \ - if (TARGET_SH3) \ - sh_cpu = CPU_SH3; \ - if (TARGET_SH3E) \ - sh_cpu = CPU_SH3E; \ - if (TARGET_SH4) \ - { \ - assembler_dialect = 1; \ - sh_cpu = CPU_SH4; \ - } \ - if (TARGET_SH4A_ARCH) \ - { \ - assembler_dialect = 1; \ - sh_cpu = CPU_SH4A; \ - } \ - if (TARGET_SH5) \ - { \ - sh_cpu = CPU_SH5; \ - target_flags |= MASK_ALIGN_DOUBLE; \ - if (TARGET_SHMEDIA_FPU) \ - target_flags |= MASK_FMOVD; \ - if (TARGET_SHMEDIA) \ - { \ - /* There are no delay slots on SHmedia. */ \ - flag_delayed_branch = 0; \ - /* Relaxation isn't yet supported for SHmedia */ \ - target_flags &= ~MASK_RELAX; \ - /* After reload, if conversion does little good but can cause \ - ICEs: \ - - find_if_block doesn't do anything for SH because we don't\ - have conditional execution patterns. (We use conditional\ - move patterns, which are handled differently, and only \ - before reload). \ - - find_cond_trap doesn't do anything for the SH because we \ - don't have conditional traps. \ - - find_if_case_1 uses redirect_edge_and_branch_force in \ - the only path that does an optimization, and this causes \ - an ICE when branch targets are in registers. \ - - find_if_case_2 doesn't do anything for the SHmedia after \ - reload except when it can redirect a tablejump - and \ - that's rather rare. */ \ - flag_if_conversion2 = 0; \ - if (! strcmp (sh_div_str, "call")) \ - sh_div_strategy = SH_DIV_CALL; \ - else if (! strcmp (sh_div_str, "call2")) \ - sh_div_strategy = SH_DIV_CALL2; \ - if (! strcmp (sh_div_str, "fp") && TARGET_FPU_ANY) \ - sh_div_strategy = SH_DIV_FP; \ - else if (! strcmp (sh_div_str, "inv")) \ - sh_div_strategy = SH_DIV_INV; \ - else if (! strcmp (sh_div_str, "inv:minlat")) \ - sh_div_strategy = SH_DIV_INV_MINLAT; \ - else if (! strcmp (sh_div_str, "inv20u")) \ - sh_div_strategy = SH_DIV_INV20U; \ - else if (! strcmp (sh_div_str, "inv20l")) \ - sh_div_strategy = SH_DIV_INV20L; \ - else if (! strcmp (sh_div_str, "inv:call2")) \ - sh_div_strategy = SH_DIV_INV_CALL2; \ - else if (! strcmp (sh_div_str, "inv:call")) \ - sh_div_strategy = SH_DIV_INV_CALL; \ - else if (! strcmp (sh_div_str, "inv:fp")) \ - { \ - if (TARGET_FPU_ANY) \ - sh_div_strategy = SH_DIV_INV_FP; \ - else \ - sh_div_strategy = SH_DIV_INV; \ - } \ - } \ - /* -fprofile-arcs needs a working libgcov . In unified tree \ - configurations with newlib, this requires to configure with \ - --with-newlib --with-headers. But there is no way to check \ - here we have a working libgcov, so just assume that we have. */\ - if (profile_flag) \ - warning (0, "profiling is still experimental for this target");\ - } \ - else \ - { \ - /* Only the sh64-elf assembler fully supports .quad properly. */\ - targetm.asm_out.aligned_op.di = NULL; \ - targetm.asm_out.unaligned_op.di = NULL; \ - } \ - if (TARGET_SH1) \ - { \ - if (! strcmp (sh_div_str, "call-div1")) \ - sh_div_strategy = SH_DIV_CALL_DIV1; \ - else if (! strcmp (sh_div_str, "call-fp") \ - && (TARGET_FPU_DOUBLE \ - || (TARGET_HARD_SH4 && TARGET_SH2E) \ - || (TARGET_SHCOMPACT && TARGET_FPU_ANY))) \ - sh_div_strategy = SH_DIV_CALL_FP; \ - else if (! strcmp (sh_div_str, "call-table") && TARGET_SH2) \ - sh_div_strategy = SH_DIV_CALL_TABLE; \ - else \ - /* Pick one that makes most sense for the target in general. \ - It is not much good to use different functions depending \ - on -Os, since then we'll end up with two different functions \ - when some of the code is compiled for size, and some for \ - speed. */ \ - \ - /* SH4 tends to emphasize speed. */ \ - if (TARGET_HARD_SH4) \ - sh_div_strategy = SH_DIV_CALL_TABLE; \ - /* These have their own way of doing things. */ \ - else if (TARGET_SH2A) \ - sh_div_strategy = SH_DIV_INTRINSIC; \ - /* ??? Should we use the integer SHmedia function instead? */ \ - else if (TARGET_SHCOMPACT && TARGET_FPU_ANY) \ - sh_div_strategy = SH_DIV_CALL_FP; \ - /* SH1 .. SH3 cores often go into small-footprint systems, so \ - default to the smallest implementation available. */ \ - else if (TARGET_SH2) /* ??? EXPERIMENTAL */ \ - sh_div_strategy = SH_DIV_CALL_TABLE; \ - else \ - sh_div_strategy = SH_DIV_CALL_DIV1; \ - } \ - if (!TARGET_SH1) \ - TARGET_PRETEND_CMOVE = 0; \ - if (sh_divsi3_libfunc[0]) \ - ; /* User supplied - leave it alone. */ \ - else if (TARGET_DIVIDE_CALL_FP) \ - sh_divsi3_libfunc = "__sdivsi3_i4"; \ - else if (TARGET_DIVIDE_CALL_TABLE) \ - sh_divsi3_libfunc = "__sdivsi3_i4i"; \ - else if (TARGET_SH5) \ - sh_divsi3_libfunc = "__sdivsi3_1"; \ - else \ - sh_divsi3_libfunc = "__sdivsi3"; \ - if (TARGET_FMOVD) \ - reg_class_from_letter['e' - 'a'] = NO_REGS; \ - \ - for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \ - if (! VALID_REGISTER_P (regno)) \ - sh_register_names[regno][0] = '\0'; \ - \ - for (regno = 0; regno < ADDREGNAMES_SIZE; regno++) \ - if (! VALID_REGISTER_P (ADDREGNAMES_REGNO (regno))) \ - sh_additional_register_names[regno][0] = '\0'; \ - \ - if (flag_omit_frame_pointer < 0) \ - { \ - /* The debugging information is sufficient, \ - but gdb doesn't implement this yet */ \ - if (0) \ - flag_omit_frame_pointer \ - = (PREFERRED_DEBUGGING_TYPE == DWARF2_DEBUG); \ - else \ - flag_omit_frame_pointer = 0; \ - } \ - \ - if ((flag_pic && ! TARGET_PREFERGOT) \ - || (TARGET_SHMEDIA && !TARGET_PT_FIXED)) \ - flag_no_function_cse = 1; \ - \ - if (SMALL_REGISTER_CLASSES) \ - { \ - /* Never run scheduling before reload, since that can \ - break global alloc, and generates slower code anyway due \ - to the pressure on R0. */ \ - /* Enable sched1 for SH4; ready queue will be reordered by \ - the target hooks when pressure is high. We can not do this for \ - SH3 and lower as they give spill failures for R0. */ \ - if (!TARGET_HARD_SH4) \ - flag_schedule_insns = 0; \ - /* ??? Current exception handling places basic block boundaries \ - after call_insns. It causes the high pressure on R0 and gives \ - spill failures for R0 in reload. See PR 22553 and the thread \ - on gcc-patches \ - <http://gcc.gnu.org/ml/gcc-patches/2005-10/msg00816.html>. */ \ - else if (flag_exceptions) \ - { \ - if (flag_schedule_insns == 1) \ - warning (0, "ignoring -fschedule-insns because of exception handling bug"); \ - flag_schedule_insns = 0; \ - } \ - } \ - \ - if (align_loops == 0) \ - align_loops = 1 << (TARGET_SH5 ? 3 : 2); \ - if (align_jumps == 0) \ - align_jumps = 1 << CACHE_LOG; \ - else if (align_jumps < (TARGET_SHMEDIA ? 4 : 2)) \ - align_jumps = TARGET_SHMEDIA ? 4 : 2; \ - \ - /* Allocation boundary (in *bytes*) for the code of a function. \ - SH1: 32 bit alignment is faster, because instructions are always \ - fetched as a pair from a longword boundary. \ - SH2 .. SH5 : align to cache line start. */ \ - if (align_functions == 0) \ - align_functions \ - = TARGET_SMALLCODE ? FUNCTION_BOUNDARY/8 : (1 << CACHE_LOG); \ - /* The linker relaxation code breaks when a function contains \ - alignments that are larger than that at the start of a \ - compilation unit. */ \ - if (TARGET_RELAX) \ - { \ - int min_align \ - = align_loops > align_jumps ? align_loops : align_jumps; \ - \ - /* Also take possible .long constants / mova tables int account. */\ - if (min_align < 4) \ - min_align = 4; \ - if (align_functions < min_align) \ - align_functions = min_align; \ - } \ -} while (0) +#define OVERRIDE_OPTIONS sh_override_options () /* Target machine storage layout. */ diff --git a/gnu/usr.bin/cc/Makefile.tgt b/gnu/usr.bin/cc/Makefile.tgt index 61fd0d59183..9b19a2716e5 100644 --- a/gnu/usr.bin/cc/Makefile.tgt +++ b/gnu/usr.bin/cc/Makefile.tgt @@ -1,5 +1,5 @@ # $FreeBSD: src/gnu/usr.bin/cc/Makefile.tgt,v 1.11.8.1 2009/04/15 03:14:26 kensmith Exp $ -# $OpenBSD: Makefile.tgt,v 1.6 2010/08/01 21:23:02 kettenis Exp $ +# $OpenBSD: Makefile.tgt,v 1.7 2010/09/09 19:16:50 jsg Exp $ TARGET_ARCH?= ${MACHINE_ARCH} @@ -12,6 +12,8 @@ GCC_CPU= i386 .elif ${TARGET_ARCH} == "hppa" GCC_CPU= pa TARGET_CPU_DEFAULT= MASK_PA_11 +.elif ${TARGET_ARCH} == "sh" +GCC_CPU= sh .elif ${TARGET_ARCH} == "powerpc" GCC_CPU= rs6000 .elif ${TARGET_ARCH} == "sparc" diff --git a/gnu/usr.bin/cc/cc_tools/Makefile b/gnu/usr.bin/cc/cc_tools/Makefile index e20747e221b..2a200195317 100644 --- a/gnu/usr.bin/cc/cc_tools/Makefile +++ b/gnu/usr.bin/cc/cc_tools/Makefile @@ -1,5 +1,5 @@ # $FreeBSD: src/gnu/usr.bin/cc/cc_tools/Makefile,v 1.88.8.1 2009/04/15 03:14:26 kensmith Exp $ -# $OpenBSD: Makefile,v 1.6 2010/05/04 18:37:00 naddy Exp $ +# $OpenBSD: Makefile,v 1.7 2010/09/09 19:16:50 jsg Exp $ .include <bsd.own.mk> @@ -27,6 +27,9 @@ TARGET_INC+= options.h .if ${TARGET_ARCH} == "amd64" TARGET_INC+= i386/biarch64.h .endif +.if ${TARGET_ARCH} == "sh" +TARGET_INC+= sh/little.h +.endif .if ${TARGET_ARCH} != "arm" TARGET_INC+= ${GCC_CPU}/${GCC_CPU}.h .endif @@ -41,6 +44,9 @@ TARGET_INC+= alpha/openbsd1.h .else TARGET_INC+= elfos.h .endif +.if ${TARGET_ARCH} == "sh" +TARGET_INC+= sh/elf.h +.endif TARGET_INC+= openbsd.h TARGET_INC+= openbsd-libpthread.h TARGET_INC+= openbsd-native.h diff --git a/gnu/usr.bin/cc/libgcc/Makefile b/gnu/usr.bin/cc/libgcc/Makefile index ab050a1d78f..fabe46ef9b3 100644 --- a/gnu/usr.bin/cc/libgcc/Makefile +++ b/gnu/usr.bin/cc/libgcc/Makefile @@ -1,5 +1,5 @@ # $FreeBSD: src/gnu/lib/libgcc/Makefile,v 1.58.8.1 2009/04/15 03:14:26 kensmith Exp $ -# $OpenBSD: Makefile,v 1.12 2010/08/01 21:23:02 kettenis Exp $ +# $OpenBSD: Makefile,v 1.13 2010/09/09 19:16:50 jsg Exp $ .include <bsd.own.mk> @@ -138,6 +138,15 @@ LIB1ASMSRC = pa/milli64.S LIB2FUNCS_EXTRA = fptr.c .endif +.if ${TARGET_ARCH} == "sh" +CFLAGS+= -fpic +LIB1ASMSRC = sh/lib1funcs.asm +LIB1ASMFUNCS = _ashiftrt _ashiftrt_n _ashiftlt _lshiftrt _movmem \ + _movmem_i4 _mulsi3 _sdivsi3 _sdivsi3_i4 _udivsi3 _udivsi3_i4 _set_fpscr \ + _div_table _udiv_qrnnd_16 \ + _ic_invalidate +.endif + .if ${TARGET_ARCH} == "powerpc" # from config/rs6000/t-ppccomm LIB2FUNCS_EXTRA = tramp.asm darwin-ldouble.c |