diff options
-rw-r--r-- | lib/libarch/mips64/Makefile | 5 | ||||
-rw-r--r-- | lib/libarch/mips64/get_fpc_csr.3 | 68 | ||||
-rw-r--r-- | lib/libc/arch/mips64/gen/Makefile.inc | 4 | ||||
-rw-r--r-- | lib/libc/arch/mips64/gen/fpc_csr.c | 44 |
4 files changed, 117 insertions, 4 deletions
diff --git a/lib/libarch/mips64/Makefile b/lib/libarch/mips64/Makefile index b9667366d73..027fb68abfa 100644 --- a/lib/libarch/mips64/Makefile +++ b/lib/libarch/mips64/Makefile @@ -1,6 +1,7 @@ -# $OpenBSD: Makefile,v 1.2 2010/02/03 20:49:00 miod Exp $ +# $OpenBSD: Makefile,v 1.3 2010/09/24 13:54:05 miod Exp $ -MAN= cacheflush.3 +MAN= cacheflush.3 get_fpc_csr.3 +MLINKS= get_fpc_csr.3 set_fpc_csr.3 MANSUBDIR= loongson sgi #.if ${MACHINE_CPU} == "mips64" diff --git a/lib/libarch/mips64/get_fpc_csr.3 b/lib/libarch/mips64/get_fpc_csr.3 new file mode 100644 index 00000000000..f3f7631ad33 --- /dev/null +++ b/lib/libarch/mips64/get_fpc_csr.3 @@ -0,0 +1,68 @@ +.\" $OpenBSD: get_fpc_csr.3,v 1.1 2010/09/24 13:54:05 miod Exp $ +.\" +.\" Copyright (c) 2010 Miodrag Vallat. +.\" +.\" Permission to use, copy, modify, and distribute this software for any +.\" purpose with or without fee is hereby granted, provided that the above +.\" copyright notice and this permission notice appear in all copies. +.\" +.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. +.\" +.Dd $Mdocdate: September 24 2010 $ +.Dt GET_FPC_CSR 3 +.Os +.Sh NAME +.Nm get_fpc_csr , +.Nm set_fpc_csr +.Nd Floating-point control register access +.Sh SYNOPSIS +.In machine/fpu.h +.Ft int +.Fn get_fpc_csr +.Ft int +.Fn set_fpc_csr "int csr" +.Sh DESCRIPTION +The +.Fn get_fpc_csr +function returns the curent value of the floating-point control register. +The +.Fn set_fpc_csr +function replaces the value of the floating-point control register with +.Fa csr +and returns the previous value. +.Pp +These functions are provided for +.Tn IRIX +compatibility, and should only be used to control the value of the +.Li FPCSR_FS +bit in the floating-point control register. +Portable code should use the +.Nm fpgetmask , +.Nm fpgetround , +.Nm fpgetsticky , +.Nm fpsetmask , +.Nm fpsetround +and +.Nm fpsetsticky +functions to inquire or alter the floating-point control register. +.Sh RETURN VALUES +The +.Nm get_fpc_csr +and +.Nm set_fpc_csr +functions return the +.Pq previous +value of the floating-point control register. +.Sh SEE ALSO +.Xr fpgetmask 2 , +.Xr fpgetround 2 , +.Xr fpgetsticky 2 , +.Xr fpsetmask 2 , +.Xr fpsetround 2 , +.Xr fpsetsticky 2 diff --git a/lib/libc/arch/mips64/gen/Makefile.inc b/lib/libc/arch/mips64/gen/Makefile.inc index d1e0a54c66d..296154bc164 100644 --- a/lib/libc/arch/mips64/gen/Makefile.inc +++ b/lib/libc/arch/mips64/gen/Makefile.inc @@ -1,10 +1,10 @@ -# $OpenBSD: Makefile.inc,v 1.8 2009/09/27 18:20:13 miod Exp $ +# $OpenBSD: Makefile.inc,v 1.9 2010/09/24 13:54:06 miod Exp $ SRCS+= _setjmp.S fabs.S infinity.c ldexp.S modf.S nan.c SRCS+= flt_rounds.c fpgetmask.c fpgetround.c fpgetsticky.c fpsetmask.c \ fpsetround.c fpsetsticky.c SRCS+= fpclassifyl.c isfinitel.c isinfl.c isnanl.c isnormall.c signbitl.c SRCS+= setjmp.S sigsetjmp.S -SRCS+= cacheflush.c +SRCS+= cacheflush.c fpc_csr.c SRCS+= alloca.c diff --git a/lib/libc/arch/mips64/gen/fpc_csr.c b/lib/libc/arch/mips64/gen/fpc_csr.c new file mode 100644 index 00000000000..636554aba41 --- /dev/null +++ b/lib/libc/arch/mips64/gen/fpc_csr.c @@ -0,0 +1,44 @@ +/* $OpenBSD: fpc_csr.c,v 1.1 2010/09/24 13:54:06 miod Exp $ */ + +/* + * Copyright (c) 2010 Miodrag Vallat. + * + * Permission to use, copy, modify, and distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +/* + * IRIX-compatible get_fpc_csr() and set_fpc_csr() functions + */ + +#include <sys/types.h> +#include <machine/fpu.h> + +int +get_fpc_csr() +{ + int32_t csr; + + __asm__("cfc1 %0,$31" : "=r" (csr)); + return csr; +} + +int +set_fpc_csr(int csr) +{ + int32_t oldcsr; + + __asm__("cfc1 %0,$31" : "=r" (oldcsr)); + __asm__("ctc1 %0,$31" :: "r" (csr)); + + return oldcsr; +} |