diff options
| -rw-r--r-- | sys/arch/luna88k/include/cpu.h | 15 | ||||
| -rw-r--r-- | sys/arch/luna88k/luna88k/clock.c | 20 | ||||
| -rw-r--r-- | sys/arch/luna88k/luna88k/machdep.c | 161 | ||||
| -rw-r--r-- | sys/arch/m88k/include/cpu.h | 4 | ||||
| -rw-r--r-- | sys/arch/m88k/m88k/m88k_machdep.c | 5 |
5 files changed, 100 insertions, 105 deletions
diff --git a/sys/arch/luna88k/include/cpu.h b/sys/arch/luna88k/include/cpu.h index ce284226024..9d3a160b701 100644 --- a/sys/arch/luna88k/include/cpu.h +++ b/sys/arch/luna88k/include/cpu.h @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.h,v 1.7 2014/06/03 22:43:51 aoyama Exp $ */ +/* $OpenBSD: cpu.h,v 1.8 2017/03/19 10:57:29 miod Exp $ */ /* public domain */ #ifndef _MACHINE_CPU_H_ #define _MACHINE_CPU_H_ @@ -6,6 +6,19 @@ #include <m88k/cpu.h> #ifdef _KERNEL + +/* + * 88110 systems only have cpudep6..7 available so far. + * By the time Luna2001/2010 are supported, we can grow ci_cpudep to a + * couple more fields to unbreak this. + */ +#ifndef M88110 +#define ci_curspl ci_cpudep4 +#define ci_swireg ci_cpudep5 +#endif +#define ci_intr_mask ci_cpudep6 +#define ci_clock_ack ci_cpudep7 + void luna88k_ext_int(struct trapframe *eframe); #define md_interrupt_func luna88k_ext_int #endif /* _KERNEL */ diff --git a/sys/arch/luna88k/luna88k/clock.c b/sys/arch/luna88k/luna88k/clock.c index a4094b39a07..1742d421114 100644 --- a/sys/arch/luna88k/luna88k/clock.c +++ b/sys/arch/luna88k/luna88k/clock.c @@ -1,4 +1,4 @@ -/* $OpenBSD: clock.c,v 1.11 2016/09/04 00:56:08 aoyama Exp $ */ +/* $OpenBSD: clock.c,v 1.12 2017/03/19 10:57:29 miod Exp $ */ /* $NetBSD: clock.c,v 1.2 2000/01/11 10:29:35 nisimura Exp $ */ /* @@ -212,35 +212,19 @@ resettodr() } /* - * *clock_reg[CPU] - * Points to the clock register for each CPU. - */ -volatile u_int32_t *clock_reg[] = { - (u_int32_t *)OBIO_CLOCK0, - (u_int32_t *)OBIO_CLOCK1, - (u_int32_t *)OBIO_CLOCK2, - (u_int32_t *)OBIO_CLOCK3 -}; - -/* * Clock interrupt routine */ int clockintr(void *eframe) { -#ifdef MULTIPROCESSOR struct cpu_info *ci = curcpu(); - u_int cpu = ci->ci_cpuid; -#else - u_int cpu = cpu_number(); -#endif #ifdef MULTIPROCESSOR if (CPU_IS_PRIMARY(ci)) #endif clockevc->ec_count++; - *clock_reg[cpu] = 0xffffffff; + *(volatile uint32_t *)(ci->ci_clock_ack) = ~0; if (clockinitted) hardclock(eframe); return 1; diff --git a/sys/arch/luna88k/luna88k/machdep.c b/sys/arch/luna88k/luna88k/machdep.c index 4601e71d4c4..1ebb31de176 100644 --- a/sys/arch/luna88k/luna88k/machdep.c +++ b/sys/arch/luna88k/luna88k/machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: machdep.c,v 1.122 2017/01/13 09:18:11 fcambus Exp $ */ +/* $OpenBSD: machdep.c,v 1.123 2017/03/19 10:57:29 miod Exp $ */ /* * Copyright (c) 1998, 1999, 2000, 2001 Steve Murphree, Jr. * Copyright (c) 1996 Nivas Madhur @@ -119,6 +119,7 @@ void luna88k_bootstrap(void); #ifdef MULTIPROCESSOR void luna88k_ipi_handler(struct trapframe *); #endif +struct cpu_info *luna88k_set_cpu_number(cpuid_t); void luna88k_vector_init(uint32_t *, uint32_t *); char *nvram_by_symbol(char *); void powerdown(void); @@ -131,29 +132,6 @@ vaddr_t size_memory(void); extern int clockintr(void *); /* in clock.c */ extern void get_autoboot_device(void); /* in autoconf.c */ -/* - * *int_mask_reg[CPU] - * Points to the hardware interrupt status register for each CPU. - * - * When write: - * Bits 31 to 26 are used to enable ('1') or disable ('0') each - * interrupt level. Bit 31 is for level 6, bit 26 is for level 1. - * - * When read: - * Bits 31 to 29 shows the highest level of current (or most recent?) - * interrupt in 3 bits binary value (0 to 7). - * Bits 23 to 18 shows the current mask, which is the most recent - * written value in bits 31 to 26 as described above. - */ -volatile u_int32_t *int_mask_reg[] = { - (u_int32_t *)INT_ST_MASK0, - (u_int32_t *)INT_ST_MASK1, - (u_int32_t *)INT_ST_MASK2, - (u_int32_t *)INT_ST_MASK3 -}; - -u_int luna88k_curspl[] = { IPL_HIGH, IPL_HIGH, IPL_HIGH, IPL_HIGH }; - u_int32_t int_set_val[INT_LEVEL] = { INT_SET_LV0, INT_SET_LV1, @@ -166,17 +144,6 @@ u_int32_t int_set_val[INT_LEVEL] = { }; /* - * *swi_reg[CPU] - * Points to the software interrupt register for each CPU. - */ -volatile u_int32_t *swi_reg[] = { - (u_int32_t *)SOFT_INT0, - (u_int32_t *)SOFT_INT1, - (u_int32_t *)SOFT_INT2, - (u_int32_t *)SOFT_INT3 -}; - -/* * FUSE ROM and NVRAM data */ struct fuse_rom_byte { @@ -494,7 +461,7 @@ haltsys: printf("halted\n\n"); } else { /* Reset all cpus, which causes reboot */ - *((volatile unsigned *)0x6d000010) = 0; + *((volatile uint32_t *)RESET_CPU_ALL) = 0; } for (;;) @@ -691,6 +658,54 @@ cpu_setup_secondary_processors() #endif } +struct cpu_info * +luna88k_set_cpu_number(cpuid_t number) +{ + struct cpu_info *ci; + + /* clock register for each CPU. */ + static const uint32_t clock_ack[] = { + OBIO_CLOCK0, + OBIO_CLOCK1, + OBIO_CLOCK2, + OBIO_CLOCK3 + }; + + /* hardware interrupt mask and status register for each CPU. + * + * When written to: + * Bits 31 to 26 are used to enable ('1') or disable ('0') each + * interrupt level. Bit 31 is for level 6, bit 26 is for level 1. + * + * When read: + * Bits 31 to 29 shows the highest level of current (or most recent?) + * interrupt in 3 bits binary value (0 to 7). + * Bits 23 to 18 shows the current mask, which is the most recent + * written value in bits 31 to 26 as described above. + */ + static const uint32_t intr_mask[] = { + INT_ST_MASK0, + INT_ST_MASK1, + INT_ST_MASK2, + INT_ST_MASK3 + }; + + /* software interrupt register for each CPU. */ + static const uint32_t swi_reg[] = { + SOFT_INT0, + SOFT_INT1, + SOFT_INT2, + SOFT_INT3 + }; + + ci = set_cpu_number(number); + ci->ci_curspl = IPL_HIGH; + ci->ci_swireg = swi_reg[number]; + ci->ci_intr_mask = intr_mask[number]; + ci->ci_clock_ack = clock_ack[number]; + return ci; +} + #ifdef MULTIPROCESSOR /* * Release cpu_boot_mutex to let secondary processors start running @@ -723,8 +738,7 @@ secondary_pre_main() /* * Now initialize your cpu_info structure. */ - set_cpu_number(cmmu_cpu_number()); - ci = curcpu(); + ci = luna88k_set_cpu_number(cmmu_cpu_number()); ci->ci_curproc = &proc0; m88100_smp_setup(ci); @@ -803,17 +817,12 @@ secondary_main() void luna88k_ext_int(struct trapframe *eframe) { -#ifdef MULTIPROCESSOR struct cpu_info *ci = curcpu(); - u_int cpu = ci->ci_cpuid; -#else - u_int cpu = cpu_number(); -#endif - u_int32_t cur_isr; + uint32_t cur_isr; u_int level, cur_int_level, old_spl; int unmasked = 0; - cur_isr = *int_mask_reg[cpu]; + cur_isr = *(volatile uint32_t *)ci->ci_intr_mask; old_spl = eframe->tf_mask; cur_int_level = cur_isr >> 29; @@ -841,7 +850,7 @@ luna88k_ext_int(struct trapframe *eframe) while (cur_int_level == IPL_SOFTINT) { luna88k_ipi_handler(eframe); - cur_isr = *int_mask_reg[cpu]; + cur_isr = *(volatile uint32_t *)ci->ci_intr_mask; cur_int_level = cur_isr >> 29; } if (cur_int_level == 0) @@ -872,11 +881,11 @@ luna88k_ext_int(struct trapframe *eframe) break; default: printf("%s: cpu%d level %d interrupt.\n", - __func__, cpu, cur_int_level); + __func__, ci->ci_cpuid, cur_int_level); break; } - cur_isr = *int_mask_reg[cpu]; + cur_isr = *(volatile uint32_t *)ci->ci_intr_mask; cur_int_level = cur_isr >> 29; } while (cur_int_level != 0); @@ -978,14 +987,16 @@ luna88k_bootstrap() cmmu = &cmmu8820x; /* clear and disable all interrupts */ - *int_mask_reg[0] = *int_mask_reg[1] = - *int_mask_reg[2] = *int_mask_reg[3] = 0; + *(volatile uint32_t *)INT_ST_MASK0 = + *(volatile uint32_t *)INT_ST_MASK1 = + *(volatile uint32_t *)INT_ST_MASK2 = + *(volatile uint32_t *)INT_ST_MASK3 = 0; /* clear software interrupts; just read registers */ - *(volatile uint32_t *)swi_reg[0]; - *(volatile uint32_t *)swi_reg[1]; - *(volatile uint32_t *)swi_reg[2]; - *(volatile uint32_t *)swi_reg[3]; + *(volatile uint32_t *)SOFT_INT0; + *(volatile uint32_t *)SOFT_INT1; + *(volatile uint32_t *)SOFT_INT2; + *(volatile uint32_t *)SOFT_INT3; uvmexp.pagesize = PAGE_SIZE; uvm_setpagesize(); @@ -996,7 +1007,7 @@ luna88k_bootstrap() setup_board_config(); master_cpu = cmmu_init(); - set_cpu_number(master_cpu); + (void)luna88k_set_cpu_number(master_cpu); #ifdef MULTIPROCESSOR m88100_smp_setup(curcpu()); #endif @@ -1207,12 +1218,7 @@ void setlevel(u_int level) { u_int32_t set_value; -#ifdef MULTIPROCESSOR struct cpu_info *ci = curcpu(); - int cpu = ci->ci_cpuid; -#else - int cpu = cpu_number(); -#endif set_value = int_set_val[level]; @@ -1221,8 +1227,8 @@ setlevel(u_int level) set_value &= INT_SLAVE_MASK; #endif - luna88k_curspl[cpu] = level; - *int_mask_reg[cpu] = set_value; + ci->ci_curspl = level; + *(volatile uint32_t *)ci->ci_intr_mask = set_value; /* * We do not flush the pipeline here, because we are invoked * with interrupts disabled, and the caller will synchronize @@ -1233,50 +1239,42 @@ setlevel(u_int level) int getipl(void) { - return (int)luna88k_curspl[cpu_number()]; + return (int)curcpu()->ci_curspl; } int setipl(int level) { - u_int curspl, psr; -#ifdef MULTIPROCESSOR + int curspl; + uint32_t psr; struct cpu_info *ci = curcpu(); - int cpu = ci->ci_cpuid; -#else - int cpu = cpu_number(); -#endif psr = get_psr(); set_psr(psr | PSR_IND); - curspl = luna88k_curspl[cpu]; + curspl = (int)ci->ci_curspl; setlevel((u_int)level); set_psr(psr); - return (int)curspl; + return curspl; } int splraise(int level) { - u_int curspl, psr; -#ifdef MULTIPROCESSOR + int curspl; + uint32_t psr; struct cpu_info *ci = curcpu(); - int cpu = ci->ci_cpuid; -#else - int cpu = cpu_number(); -#endif psr = get_psr(); set_psr(psr | PSR_IND); - curspl = luna88k_curspl[cpu]; + curspl = (int)ci->ci_curspl; if (curspl < (u_int)level) setlevel((u_int)level); set_psr(psr); - return (int)curspl; + return curspl; } #ifdef MULTIPROCESSOR @@ -1289,7 +1287,7 @@ m88k_send_ipi(int ipi, cpuid_t cpu) return; atomic_setbits_int(&ci->ci_ipi, ipi); - *swi_reg[cpu] = 0xffffffff; + *(volatile uint32_t *)ci->ci_swireg = ~0; } /* @@ -1304,11 +1302,10 @@ void luna88k_ipi_handler(struct trapframe *eframe) { struct cpu_info *ci = curcpu(); - int cpu = ci->ci_cpuid; int ipi = ci->ci_ipi & (CI_IPI_DDB | CI_IPI_NOTIFY); /* just read; reset software interrupt */ - *swi_reg[cpu]; + *(volatile uint32_t *)ci->ci_swireg; atomic_clearbits_int(&ci->ci_ipi, ipi); if (ipi & CI_IPI_DDB) { diff --git a/sys/arch/m88k/include/cpu.h b/sys/arch/m88k/include/cpu.h index 7b1c28d7901..bc0c6453a66 100644 --- a/sys/arch/m88k/include/cpu.h +++ b/sys/arch/m88k/include/cpu.h @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.h,v 1.64 2015/07/02 01:33:59 dlg Exp $ */ +/* $OpenBSD: cpu.h,v 1.65 2017/03/19 10:57:29 miod Exp $ */ /* * Copyright (c) 1996 Nivas Madhur * Copyright (c) 1992, 1993 @@ -218,7 +218,7 @@ void m88k_broadcast_ipi(int); #define CPU_BUSY_CYCLE() do {} while (0) -void set_cpu_number(cpuid_t); +struct cpu_info *set_cpu_number(cpuid_t); /* * The md code may hardcode this in some very specific situations. diff --git a/sys/arch/m88k/m88k/m88k_machdep.c b/sys/arch/m88k/m88k/m88k_machdep.c index 02c1af3876d..be18179c549 100644 --- a/sys/arch/m88k/m88k/m88k_machdep.c +++ b/sys/arch/m88k/m88k/m88k_machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: m88k_machdep.c,v 1.66 2016/10/09 20:16:50 guenther Exp $ */ +/* $OpenBSD: m88k_machdep.c,v 1.67 2017/03/19 10:57:29 miod Exp $ */ /* * Copyright (c) 1998, 1999, 2000, 2001 Steve Murphree, Jr. * Copyright (c) 1996 Nivas Madhur @@ -296,7 +296,7 @@ regdump(struct trapframe *f) /* * Set up the cpu_info pointer and the cpu number for the current processor. */ -void +struct cpu_info * set_cpu_number(cpuid_t number) { struct cpu_info *ci; @@ -310,6 +310,7 @@ set_cpu_number(cpuid_t number) __asm__ volatile ("stcr %0, %%cr17" :: "r" (ci)); flush_pipeline(); + return ci; } /* |