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-rw-r--r--sys/arch/i386/stand/libsa/memprobe.c4
-rw-r--r--sys/arch/i386/stand/mbr/mbr.S8
2 files changed, 6 insertions, 6 deletions
diff --git a/sys/arch/i386/stand/libsa/memprobe.c b/sys/arch/i386/stand/libsa/memprobe.c
index 07743d16eeb..77051b03b3e 100644
--- a/sys/arch/i386/stand/libsa/memprobe.c
+++ b/sys/arch/i386/stand/libsa/memprobe.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: memprobe.c,v 1.57 2016/06/10 18:36:06 jcs Exp $ */
+/* $OpenBSD: memprobe.c,v 1.58 2024/11/18 02:32:22 mlarkin Exp $ */
/*
* Copyright (c) 1997-1999 Michael Shalayeff
@@ -100,7 +100,7 @@ bios_E820(bios_memmap_t *mp)
/*
* BIOS int 15, AX=8800
*
- * Only used if int 15, AX=E801 does not work.
+ * Only used if int 15, AX=E820 does not work.
* Machines with this are restricted to 64MB.
*/
static __inline bios_memmap_t *
diff --git a/sys/arch/i386/stand/mbr/mbr.S b/sys/arch/i386/stand/mbr/mbr.S
index cc172b692f2..2b3587bdfbc 100644
--- a/sys/arch/i386/stand/mbr/mbr.S
+++ b/sys/arch/i386/stand/mbr/mbr.S
@@ -1,4 +1,4 @@
-/* $OpenBSD: mbr.S,v 1.27 2022/09/02 07:46:03 krw Exp $ */
+/* $OpenBSD: mbr.S,v 1.28 2024/11/18 02:32:22 mlarkin Exp $ */
/*
* Copyright (c) 1997 Michael Shalayeff and Tobias Weingartner
@@ -14,8 +14,8 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
@@ -99,7 +99,7 @@ start:
/*
* We don't need to disable and re-enable interrupts around the
- * the load of ss and sp.
+ * load of ss and sp.
*
* From 80386 Programmer's Reference Manual:
* "A MOV into SS inhibits all interrupts until after the execution