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Diffstat (limited to 'sys/arch/mips64')
-rw-r--r--sys/arch/mips64/include/cpu.h10
-rw-r--r--sys/arch/mips64/mips64/cache_octeon.c3
2 files changed, 6 insertions, 7 deletions
diff --git a/sys/arch/mips64/include/cpu.h b/sys/arch/mips64/include/cpu.h
index b4b082ee006..118e6a9eb50 100644
--- a/sys/arch/mips64/include/cpu.h
+++ b/sys/arch/mips64/include/cpu.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: cpu.h,v 1.75 2012/03/24 20:06:02 miod Exp $ */
+/* $OpenBSD: cpu.h,v 1.76 2012/03/24 20:10:08 miod Exp $ */
/*-
* Copyright (c) 1992, 1993
@@ -568,7 +568,7 @@ void tlb_set_wired(int);
/*
* Available cache operation routines. See <machine/cpu.h> for more.
*/
-int Octeon_ConfigCache(struct cpu_info *);
+void Octeon_ConfigCache(struct cpu_info *);
void Octeon_SyncCache(struct cpu_info *);
void Octeon_InvalidateICache(struct cpu_info *, vaddr_t, size_t);
void Octeon_SyncDCachePage(struct cpu_info *, paddr_t);
@@ -576,7 +576,7 @@ void Octeon_HitSyncDCache(struct cpu_info *, paddr_t, size_t);
void Octeon_HitInvalidateDCache(struct cpu_info *, paddr_t, size_t);
void Octeon_IOSyncDCache(struct cpu_info *, paddr_t, size_t, int);
-int Loongson2_ConfigCache(struct cpu_info *);
+void Loongson2_ConfigCache(struct cpu_info *);
void Loongson2_SyncCache(struct cpu_info *);
void Loongson2_InvalidateICache(struct cpu_info *, vaddr_t, size_t);
void Loongson2_SyncDCachePage(struct cpu_info *, paddr_t);
@@ -584,7 +584,7 @@ void Loongson2_HitSyncDCache(struct cpu_info *, paddr_t, size_t);
void Loongson2_HitInvalidateDCache(struct cpu_info *, paddr_t, size_t);
void Loongson2_IOSyncDCache(struct cpu_info *, paddr_t, size_t, int);
-int Mips5k_ConfigCache(struct cpu_info *);
+void Mips5k_ConfigCache(struct cpu_info *);
void Mips5k_SyncCache(struct cpu_info *);
void Mips5k_InvalidateICache(struct cpu_info *, vaddr_t, size_t);
void Mips5k_SyncDCachePage(struct cpu_info *, vaddr_t);
@@ -592,7 +592,7 @@ void Mips5k_HitSyncDCache(struct cpu_info *, vaddr_t, size_t);
void Mips5k_HitInvalidateDCache(struct cpu_info *, vaddr_t, size_t);
void Mips5k_IOSyncDCache(struct cpu_info *, vaddr_t, size_t, int);
-int Mips10k_ConfigCache(struct cpu_info *);
+void Mips10k_ConfigCache(struct cpu_info *);
void Mips10k_SyncCache(struct cpu_info *);
void Mips10k_InvalidateICache(struct cpu_info *, vaddr_t, size_t);
void Mips10k_SyncDCachePage(struct cpu_info *, vaddr_t);
diff --git a/sys/arch/mips64/mips64/cache_octeon.c b/sys/arch/mips64/mips64/cache_octeon.c
index 4b1d261be27..07107fd1f69 100644
--- a/sys/arch/mips64/mips64/cache_octeon.c
+++ b/sys/arch/mips64/mips64/cache_octeon.c
@@ -56,7 +56,7 @@
"nop\n" \
".set pop")
-int
+void
Octeon_ConfigCache(struct cpu_info *ci)
{
ci->ci_cacheways = 4;
@@ -66,7 +66,6 @@ Octeon_ConfigCache(struct cpu_info *ci)
ci->ci_l1datacacheline = 128;
ci->ci_l2size = 128 * 1024;
ci->ci_l3size = 0;
- return 0;
}
void