diff options
Diffstat (limited to 'sys/arch')
| -rw-r--r-- | sys/arch/amd64/amd64/cacheinfo.c | 19 | ||||
| -rw-r--r-- | sys/arch/amd64/include/cacheinfo.h | 11 |
2 files changed, 3 insertions, 27 deletions
diff --git a/sys/arch/amd64/amd64/cacheinfo.c b/sys/arch/amd64/amd64/cacheinfo.c index 195e5cc9bf7..9a672186e9e 100644 --- a/sys/arch/amd64/amd64/cacheinfo.c +++ b/sys/arch/amd64/amd64/cacheinfo.c @@ -1,4 +1,4 @@ -/* $OpenBSD: cacheinfo.c,v 1.8 2016/02/03 03:25:07 guenther Exp $ */ +/* $OpenBSD: cacheinfo.c,v 1.9 2020/12/22 03:42:03 jsg Exp $ */ /*- * Copyright (c) 2000 The NetBSD Foundation, Inc. @@ -243,22 +243,6 @@ amd_cpu_cacheinfo(struct cpu_info *ci) cai->cai_associativity = cp->cai_associativity; else cai->cai_associativity = 0; /* XXX Unknown/reserved */ - - /* - * Determine L3 cache, Intel is different - */ - if (!strcmp(cpu_vendor, "AuthenticAMD") && family >= 0xf) { - cai = &ci->ci_cinfo[CAI_L3CACHE]; - cai->cai_totalsize = AMD_L3_EDX_C_SIZE(descs[3]); - cai->cai_associativity = AMD_L3_EDX_C_ASSOC(descs[3]); - cai->cai_linesize = AMD_L3_EDX_C_LS(descs[3]); - cp = cache_info_lookup(amd_cpuid_l2cache_assoc_info, - cai->cai_associativity); - if (cp != NULL) - cai->cai_associativity = cp->cai_associativity; - else - cai->cai_associativity = 0; /* XXX Unknown/reserved */ - } } void @@ -269,7 +253,6 @@ x86_print_cacheinfo(struct cpu_info *ci) sep = print_cache_config(ci, CAI_ICACHE, "I-cache", NULL); sep = print_cache_config(ci, CAI_DCACHE, "D-cache", sep); sep = print_cache_config(ci, CAI_L2CACHE, "L2 cache", sep); - sep = print_cache_config(ci, CAI_L3CACHE, "L3 cache", sep); if (sep != NULL) printf("\n"); sep = print_tlb_config(ci, CAI_ITLB, "ITLB", NULL); diff --git a/sys/arch/amd64/include/cacheinfo.h b/sys/arch/amd64/include/cacheinfo.h index 5cd7d4e6488..3c3323b34f8 100644 --- a/sys/arch/amd64/include/cacheinfo.h +++ b/sys/arch/amd64/include/cacheinfo.h @@ -1,4 +1,4 @@ -/* $OpenBSD: cacheinfo.h,v 1.2 2012/03/16 01:53:00 haesbaert Exp $ */ +/* $OpenBSD: cacheinfo.h,v 1.3 2020/12/22 03:42:03 jsg Exp $ */ /* $NetBSD: cacheinfo.h,v 1.1 2003/04/25 21:54:30 fvdl Exp $ */ #ifndef _X86_CACHEINFO_H @@ -20,9 +20,8 @@ struct x86_cache_info { #define CAI_ICACHE 4 /* Instruction cache */ #define CAI_DCACHE 5 /* Data cache */ #define CAI_L2CACHE 6 /* Level 2 cache */ -#define CAI_L3CACHE 7 /* Level 3 cache */ -#define CAI_COUNT 8 +#define CAI_COUNT 7 struct cpu_info; @@ -109,10 +108,4 @@ void x86_print_cacheinfo(struct cpu_info *); #define AMD_L2_ECX_C_LPT(x) (((x) >> 8) & 0xf) #define AMD_L2_ECX_C_LS(x) ( (x) & 0xff) -/* L3 Cache */ -#define AMD_L3_EDX_C_SIZE(x) ((((x) >> 18) & 0x3fff) * 512 * 1024) -#define AMD_L3_EDX_C_ASSOC(x) (((x) >> 12) & 0xf) -#define AMD_L3_EDX_C_LPT(x) (((x) >> 8) & 0xf) -#define AMD_L3_EDX_C_LS(x) ( (x) & 0xff) - #endif /* _X86_CACHEINFO_H */ |