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-rw-r--r--sys/arch/armv7/imx/imxccm.c81
-rw-r--r--sys/arch/armv7/imx/imxccm_clocks.h2
-rw-r--r--sys/arch/armv7/imx/imxesdhc.c4
-rw-r--r--sys/arch/armv7/imx/imxiic.c4
-rw-r--r--sys/arch/armv7/imx/imxuart.c4
5 files changed, 41 insertions, 54 deletions
diff --git a/sys/arch/armv7/imx/imxccm.c b/sys/arch/armv7/imx/imxccm.c
index 4847d49f92f..cd95e233c4f 100644
--- a/sys/arch/armv7/imx/imxccm.c
+++ b/sys/arch/armv7/imx/imxccm.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: imxccm.c,v 1.9 2017/07/18 15:06:37 patrick Exp $ */
+/* $OpenBSD: imxccm.c,v 1.10 2017/12/30 13:34:56 kettenis Exp $ */
/*
* Copyright (c) 2012-2013 Patrick Wildt <patrick@blueri.se>
*
@@ -156,8 +156,8 @@
#define CCM_PMU_MISC1_LVDSCLK1_OBEN (1 << 10)
#define CCM_PMU_MISC1_LVDSCLK1_IBEN (1 << 12)
-#define HCLK_FREQ 24000
-#define PLL3_80M 80000
+#define HCLK_FREQ 24000000
+#define PLL3_80M 80000000
#define HREAD4(sc, reg) \
(bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (reg)))
@@ -226,20 +226,18 @@ struct cfdriver imxccm_cd = {
NULL, "imxccm", DV_DULL
};
-int imxccm_cpuspeed(int *);
-unsigned int imxccm_decode_pll(enum clocks, unsigned int);
-unsigned int imxccm_get_pll2_pfd(unsigned int);
-unsigned int imxccm_get_pll3_pfd(unsigned int);
-unsigned int imxccm_get_armclk(void);
+uint32_t imxccm_decode_pll(enum clocks, uint32_t);
+uint32_t imxccm_get_pll2_pfd(unsigned int);
+uint32_t imxccm_get_pll3_pfd(unsigned int);
+uint32_t imxccm_get_armclk(void);
void imxccm_armclk_set_parent(enum clocks);
-void imxccm_armclk_set_freq(unsigned int);
-unsigned int imxccm_get_usdhx(int x);
-unsigned int imxccm_get_periphclk(void);
-unsigned int imxccm_get_fecclk(void);
-unsigned int imxccm_get_ahbclk(void);
-unsigned int imxccm_get_ipgclk(void);
-unsigned int imxccm_get_ipg_perclk(void);
-unsigned int imxccm_get_uartclk(void);
+uint32_t imxccm_get_usdhx(int x);
+uint32_t imxccm_get_periphclk(void);
+uint32_t imxccm_get_fecclk(void);
+uint32_t imxccm_get_ahbclk(void);
+uint32_t imxccm_get_ipgclk(void);
+uint32_t imxccm_get_ipg_perclk(void);
+uint32_t imxccm_get_uartclk(void);
void imxccm_enable(void *, uint32_t *, int);
uint32_t imxccm_get_frequency(void *, uint32_t *);
void imxccm_disable_usb1_chrg_detect(void);
@@ -287,7 +285,7 @@ imxccm_attach(struct device *parent, struct device *self, void *aux)
printf(": imx6 rev 1.%d CPU freq: %d MHz",
HREAD4(sc, CCM_ANALOG_DIGPROG) & CCM_ANALOG_DIGPROG_MINOR_MASK,
- imxccm_get_armclk() / 1000);
+ imxccm_get_armclk() / 1000000);
printf("\n");
@@ -296,19 +294,10 @@ imxccm_attach(struct device *parent, struct device *self, void *aux)
sc->sc_cd.cd_enable = imxccm_enable;
sc->sc_cd.cd_get_frequency = imxccm_get_frequency;
clock_register(&sc->sc_cd);
-
- cpu_cpuspeed = imxccm_cpuspeed;
-}
-
-int
-imxccm_cpuspeed(int *freq)
-{
- *freq = imxccm_get_armclk() / 1000;
- return (0);
}
-unsigned int
-imxccm_decode_pll(enum clocks pll, unsigned int freq)
+uint32_t
+imxccm_decode_pll(enum clocks pll, uint32_t freq)
{
struct imxccm_softc *sc = imxccm_sc;
uint32_t div;
@@ -334,25 +323,25 @@ imxccm_decode_pll(enum clocks pll, unsigned int freq)
}
}
-unsigned int
+uint32_t
imxccm_get_pll2_pfd(unsigned int pfd)
{
struct imxccm_softc *sc = imxccm_sc;
- return imxccm_decode_pll(SYS_PLL2, HCLK_FREQ) * 18
+ return imxccm_decode_pll(SYS_PLL2, HCLK_FREQ) * 18ULL
/ CCM_ANALOG_PFD_528_PFDx_FRAC(HREAD4(sc, CCM_ANALOG_PFD_528), pfd);
}
-unsigned int
+uint32_t
imxccm_get_pll3_pfd(unsigned int pfd)
{
struct imxccm_softc *sc = imxccm_sc;
- return imxccm_decode_pll(USB1_PLL3, HCLK_FREQ) * 18
+ return imxccm_decode_pll(USB1_PLL3, HCLK_FREQ) * 18ULL
/ CCM_ANALOG_PFD_480_PFDx_FRAC(HREAD4(sc, CCM_ANALOG_PFD_480), pfd);
}
-unsigned int
+uint32_t
imxccm_get_armclk(void)
{
struct imxccm_softc *sc = imxccm_sc;
@@ -397,14 +386,6 @@ imxccm_armclk_set_parent(enum clocks clock)
}
}
-void
-imxccm_armclk_set_freq(unsigned int freq)
-{
- if (freq > 1296000 || freq < 648000)
- panic("%s: frequency must be between 648MHz and 1296MHz!",
- __func__);
-}
-
unsigned int
imxccm_get_usdhx(int x)
{
@@ -427,7 +408,7 @@ imxccm_get_usdhx(int x)
return clkroot / (podf + 1);
}
-unsigned int
+uint32_t
imxccm_get_uartclk(void)
{
struct imxccm_softc *sc = imxccm_sc;
@@ -438,7 +419,7 @@ imxccm_get_uartclk(void)
return clkroot / (podf + 1);
}
-unsigned int
+uint32_t
imxccm_get_periphclk(void)
{
struct imxccm_softc *sc = imxccm_sc;
@@ -472,7 +453,7 @@ imxccm_get_periphclk(void)
}
}
-unsigned int
+uint32_t
imxccm_get_fecclk(void)
{
struct imxccm_softc *sc = imxccm_sc;
@@ -494,10 +475,10 @@ imxccm_get_fecclk(void)
break;
}
- return 500000 / div ;
+ return 500000000 / div ;
}
-unsigned int
+uint32_t
imxccm_get_ahbclk(void)
{
struct imxccm_softc *sc = imxccm_sc;
@@ -508,7 +489,7 @@ imxccm_get_ahbclk(void)
return imxccm_get_periphclk() / (ahb_podf + 1);
}
-unsigned int
+uint32_t
imxccm_get_ipgclk(void)
{
struct imxccm_softc *sc = imxccm_sc;
@@ -519,7 +500,7 @@ imxccm_get_ipgclk(void)
return imxccm_get_ahbclk() / (ipg_podf + 1);
}
-unsigned int
+uint32_t
imxccm_get_ipg_perclk(void)
{
struct imxccm_softc *sc = imxccm_sc;
@@ -580,6 +561,8 @@ imxccm_get_frequency(void *cookie, uint32_t *cells)
if (sc->sc_gates == imx6ul_gates) {
switch (idx) {
+ case IMX6UL_CLK_ARM:
+ return imxccm_get_armclk();
case IMX6UL_CLK_IPG:
return imxccm_get_ipgclk();
case IMX6UL_CLK_PERCLK:
@@ -592,6 +575,8 @@ imxccm_get_frequency(void *cookie, uint32_t *cells)
}
} else {
switch (idx) {
+ case IMX6_CLK_ARM:
+ return imxccm_get_armclk();
case IMX6_CLK_IPG:
return imxccm_get_ipgclk();
case IMX6_CLK_IPG_PER:
diff --git a/sys/arch/armv7/imx/imxccm_clocks.h b/sys/arch/armv7/imx/imxccm_clocks.h
index 5324f1e3fea..650644ef788 100644
--- a/sys/arch/armv7/imx/imxccm_clocks.h
+++ b/sys/arch/armv7/imx/imxccm_clocks.h
@@ -6,6 +6,7 @@
#define IMX6_CLK_IPG 0x3e
#define IMX6_CLK_IPG_PER 0x3f
+#define IMX6_CLK_ARM 0x68
#define IMX6_CLK_I2C1 0x7d
#define IMX6_CLK_I2C2 0x7e
#define IMX6_CLK_I2C3 0x7f
@@ -34,6 +35,7 @@ struct imxccm_gate imx6_gates[] = {
* i.MX6UL clocks.
*/
+#define IMX6UL_CLK_ARM 0x5d
#define IMX6UL_CLK_PERCLK 0x63
#define IMX6UL_CLK_IPG 0x64
#define IMX6UL_CLK_GPT1_BUS 0x98
diff --git a/sys/arch/armv7/imx/imxesdhc.c b/sys/arch/armv7/imx/imxesdhc.c
index 164aed48c43..8414dedcb37 100644
--- a/sys/arch/armv7/imx/imxesdhc.c
+++ b/sys/arch/armv7/imx/imxesdhc.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: imxesdhc.c,v 1.37 2017/07/18 18:45:44 patrick Exp $ */
+/* $OpenBSD: imxesdhc.c,v 1.38 2017/12/30 13:34:56 kettenis Exp $ */
/*
* Copyright (c) 2009 Dale Rahn <drahn@openbsd.org>
* Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org>
@@ -338,7 +338,7 @@ imxesdhc_attach(struct device *parent, struct device *self, void *aux)
/*
* Determine the base clock frequency. (2.2.24)
*/
- sc->clkbase = clock_get_frequency(faa->fa_node, "per");
+ sc->clkbase = clock_get_frequency(faa->fa_node, "per") / 1000;
printf("%s: %d MHz base clock\n", DEVNAME(sc), sc->clkbase / 1000);
diff --git a/sys/arch/armv7/imx/imxiic.c b/sys/arch/armv7/imx/imxiic.c
index fb12045e0f3..79a7af8c81d 100644
--- a/sys/arch/armv7/imx/imxiic.c
+++ b/sys/arch/armv7/imx/imxiic.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: imxiic.c,v 1.13 2017/03/06 06:44:46 kettenis Exp $ */
+/* $OpenBSD: imxiic.c,v 1.14 2017/12/30 13:34:56 kettenis Exp $ */
/*
* Copyright (c) 2013 Patrick Wildt <patrick@blueri.se>
*
@@ -166,7 +166,7 @@ imxiic_setspeed(struct imxiic_softc *sc, u_int speed)
uint32_t div;
int i;
- i2c_clk_rate = clock_get_frequency(sc->sc_node, NULL);
+ i2c_clk_rate = clock_get_frequency(sc->sc_node, NULL) / 1000;
div = (i2c_clk_rate + speed - 1) / speed;
if (div < imxiic_clk_div[0][0])
i = 0;
diff --git a/sys/arch/armv7/imx/imxuart.c b/sys/arch/armv7/imx/imxuart.c
index ed8744264d3..5f2e686511b 100644
--- a/sys/arch/armv7/imx/imxuart.c
+++ b/sys/arch/armv7/imx/imxuart.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: imxuart.c,v 1.16 2017/10/27 11:23:28 kevlo Exp $ */
+/* $OpenBSD: imxuart.c,v 1.17 2017/12/30 13:34:56 kettenis Exp $ */
/*
* Copyright (c) 2005 Dale Rahn <drahn@motorola.com>
*
@@ -548,7 +548,7 @@ imxuartopen(dev_t dev, int flag, int mode, struct proc *p)
/* formula: clk / (rfdiv * 1600) */
bus_space_write_2(iot, ioh, IMXUART_UBMR,
- (clock_get_frequency(sc->sc_node, "per") * 1000) / 1600);
+ clock_get_frequency(sc->sc_node, "per") / 1600);
SET(sc->sc_ucr1, IMXUART_CR1_EN|IMXUART_CR1_RRDYEN);
SET(sc->sc_ucr2, IMXUART_CR2_TXEN|IMXUART_CR2_RXEN);