diff options
Diffstat (limited to 'sys/arch')
| -rw-r--r-- | sys/arch/m88k/include/cmmu.h | 14 | ||||
| -rw-r--r-- | sys/arch/m88k/include/cpu.h | 83 | ||||
| -rw-r--r-- | sys/arch/m88k/m88k/m8820x_machdep.c | 12 | ||||
| -rw-r--r-- | sys/arch/m88k/m88k/m88k_machdep.c | 5 | ||||
| -rw-r--r-- | sys/arch/mvme88k/include/cpu.h | 3 | ||||
| -rw-r--r-- | sys/arch/mvme88k/include/mvme197.h | 3 | ||||
| -rw-r--r-- | sys/arch/mvme88k/mvme88k/m188_machdep.c | 10 | ||||
| -rw-r--r-- | sys/arch/mvme88k/mvme88k/m197_machdep.c | 116 | ||||
| -rw-r--r-- | sys/arch/mvme88k/mvme88k/m88110.c | 60 | ||||
| -rw-r--r-- | sys/arch/mvme88k/mvme88k/machdep.c | 9 |
10 files changed, 223 insertions, 92 deletions
diff --git a/sys/arch/m88k/include/cmmu.h b/sys/arch/m88k/include/cmmu.h index 4861b4c7d7f..30968c4b944 100644 --- a/sys/arch/m88k/include/cmmu.h +++ b/sys/arch/m88k/include/cmmu.h @@ -1,4 +1,4 @@ -/* $OpenBSD: cmmu.h,v 1.21 2009/02/01 00:52:17 miod Exp $ */ +/* $OpenBSD: cmmu.h,v 1.22 2009/02/16 23:03:31 miod Exp $ */ /* * Mach Operating System * Copyright (c) 1993-1992 Carnegie Mellon University @@ -47,6 +47,7 @@ struct cmmu_p { void (*flush_inst_cache)(cpuid_t, paddr_t, psize_t); void (*dma_cachectl)(paddr_t, psize_t, int); #ifdef MULTIPROCESSOR + void (*dma_cachectl_local)(paddr_t, psize_t, int); void (*initialize_cpu)(cpuid_t); #endif }; @@ -79,14 +80,17 @@ extern __cpu_simple_lock_t cmmu_cpu_lock; #define cmmu_flush_cache(a, b, c) (cmmu->flush_cache)(a, b, c) #define cmmu_flush_inst_cache(a, b, c) (cmmu->flush_inst_cache)(a, b, c) #define dma_cachectl(a, b, c) (cmmu->dma_cachectl)(a, b, c) +#define dma_cachectl_local(a, b, c) (cmmu->dma_cachectl_local)(a, b, c) #define cmmu_initialize_cpu(a) (cmmu->initialize_cpu)(a) /* - * dma_cachectl() modes + * dma_cachectl{,_local}() modes */ -#define DMA_CACHE_SYNC 0 -#define DMA_CACHE_SYNC_INVAL 1 -#define DMA_CACHE_INV 2 +#define DMA_CACHE_SYNC 0x00 +#define DMA_CACHE_SYNC_INVAL 0x01 +#define DMA_CACHE_INV 0x02 + +#define DMA_CACHE_MASK 0x03 #endif /* _KERNEL && !_LOCORE */ diff --git a/sys/arch/m88k/include/cpu.h b/sys/arch/m88k/include/cpu.h index 96bd7a101e2..78fcd755598 100644 --- a/sys/arch/m88k/include/cpu.h +++ b/sys/arch/m88k/include/cpu.h @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.h,v 1.40 2009/02/08 21:40:56 miod Exp $ */ +/* $OpenBSD: cpu.h,v 1.41 2009/02/16 23:03:31 miod Exp $ */ /* * Copyright (c) 1996 Nivas Madhur * Copyright (c) 1992, 1993 @@ -84,51 +84,73 @@ extern u_int max_cpus; */ struct cpu_info { - u_int ci_flags; + u_int ci_flags; #define CIF_ALIVE 0x01 /* cpu initialized */ #define CIF_PRIMARY 0x02 /* primary cpu */ - struct proc *ci_curproc; /* current process... */ - struct pcb *ci_curpcb; /* ...and its pcb */ - - u_int ci_cpuid; /* cpu number */ - - u_int ci_pfsr_i0, ci_pfsr_i1; /* instruction... */ - u_int ci_pfsr_d0, ci_pfsr_d1; /* ... and data CMMU PFSRs */ - - struct schedstate_percpu ci_schedstate; /* scheduling state */ - int ci_want_resched; /* need_resched() invoked */ - - u_int ci_intrdepth; /* interrupt depth */ - - u_long ci_spin_locks; /* spin locks counter */ - - int ci_ddb_state; /* ddb status */ + struct proc *ci_curproc; /* current process... */ + struct pcb *ci_curpcb; /* ...and its pcb */ + + u_int ci_cpuid; /* cpu number */ + + /* + * The following fields are used differently depending on + * the processor type. Think of them as an anonymous union + * of two anonymous structs. + */ + u_int ci_cpudep0; + u_int ci_cpudep1; + u_int ci_cpudep2; + u_int ci_cpudep3; + u_int ci_cpudep4; + u_int ci_cpudep5; + u_int ci_cpudep6; + u_int ci_cpudep7; + + /* 88100 fields */ +#define ci_pfsr_i0 ci_cpudep0 /* instruction... */ +#define ci_pfsr_i1 ci_cpudep1 +#define ci_pfsr_d0 ci_cpudep2 /* ...and data CMMU PFSRs */ +#define ci_pfsr_d1 ci_cpudep3 + + /* 88110 fields */ +#define ci_nmi_stack ci_cpudep0 /* NMI stack */ +#define ci_ipi_arg1 ci_cpudep1 /* Complex IPI arguments */ +#define ci_ipi_arg2 ci_cpudep2 +#define ci_h_sxip ci_cpudep3 /* trapframe values */ +#define ci_h_epsr ci_cpudep4 /* for hardclock */ +#define ci_s_sxip ci_cpudep5 /* and softclock */ +#define ci_s_epsr ci_cpudep6 + + struct schedstate_percpu + ci_schedstate; /* scheduling state */ + int ci_want_resched; /* need_resched() invoked */ + + u_int ci_intrdepth; /* interrupt depth */ + + u_long ci_spin_locks; /* spin locks counter */ + + int ci_ddb_state; /* ddb status */ #define CI_DDB_RUNNING 0 #define CI_DDB_ENTERDDB 1 #define CI_DDB_INDDB 2 #define CI_DDB_PAUSE 3 - int ci_softintr; /* pending soft interrupts */ - u_int32_t ci_randseed; /* per-cpu random seed */ - - vaddr_t ci_nmi_stack; /* NMI stack (88110) */ - -#ifdef MULTIPROCESSOR + int ci_softintr; /* pending soft interrupts */ + u_int32_t ci_randseed; /* per-cpu random seed */ - int ci_ipi; /* pending ipis */ + int ci_ipi; /* pending ipis */ #define CI_IPI_NOTIFY 0x00000001 #define CI_IPI_HARDCLOCK 0x00000002 #define CI_IPI_STATCLOCK 0x00000004 #define CI_IPI_DDB 0x00000008 +/* 88110 simple ipi */ #define CI_IPI_TLB_FLUSH_KERNEL 0x00000010 #define CI_IPI_TLB_FLUSH_USER 0x00000020 - +/* 88110 complex ipi */ #define CI_IPI_CACHE_FLUSH 0x00000040 #define CI_IPI_ICACHE_FLUSH 0x00000080 - u_int32_t ci_ipi_arg1; - u_int32_t ci_ipi_arg2; -#endif +#define CI_IPI_DMA_CACHECTL 0x00000100 }; extern cpuid_t master_cpu; @@ -220,10 +242,12 @@ struct clockframe { #define SIR_NET 0x01 #define SIR_CLOCK 0x02 +#define SIR_IPI 0x04 #define setsoftint(x) atomic_setbits_int(&curcpu()->ci_softintr, x) #define setsoftnet() setsoftint(SIR_NET) #define setsoftclock() setsoftint(SIR_CLOCK) +#define setsoftipi() setsoftint(SIR_IPI) #define aston(p) ((p)->p_md.md_astpending = 1) @@ -248,6 +272,7 @@ struct clockframe { void need_resched(struct cpu_info *); void signotify(struct proc *); +void softipi(void); int badaddr(vaddr_t addr, int size); diff --git a/sys/arch/m88k/m88k/m8820x_machdep.c b/sys/arch/m88k/m88k/m8820x_machdep.c index bda3957101d..145a5d31e79 100644 --- a/sys/arch/m88k/m88k/m8820x_machdep.c +++ b/sys/arch/m88k/m88k/m8820x_machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: m8820x_machdep.c,v 1.36 2009/02/01 00:52:19 miod Exp $ */ +/* $OpenBSD: m8820x_machdep.c,v 1.37 2009/02/16 23:03:33 miod Exp $ */ /* * Copyright (c) 2004, 2007, Miodrag Vallat. * @@ -102,6 +102,7 @@ void m8820x_flush_tlb(cpuid_t, u_int, vaddr_t, u_int); void m8820x_flush_cache(cpuid_t, paddr_t, psize_t); void m8820x_flush_inst_cache(cpuid_t, paddr_t, psize_t); void m8820x_dma_cachectl(paddr_t, psize_t, int); +void m8820x_dma_cachectl_local(paddr_t, psize_t, int); void m8820x_initialize_cpu(cpuid_t); /* This is the function table for the MC8820x CMMUs */ @@ -118,6 +119,7 @@ struct cmmu_p cmmu8820x = { m8820x_flush_inst_cache, m8820x_dma_cachectl, #ifdef MULTIPROCESSOR + m8820x_dma_cachectl_local, m8820x_initialize_cpu, #endif }; @@ -753,3 +755,11 @@ m8820x_dma_cachectl(paddr_t _pa, psize_t _size, int op) CMMU_UNLOCK; set_psr(psr); } + +#ifdef MULTIPROCESSOR +void +m8820x_dma_cachectl_local(paddr_t pa, psize_t size, int op) +{ + /* This function is not used on 88100 systems */ +} +#endif diff --git a/sys/arch/m88k/m88k/m88k_machdep.c b/sys/arch/m88k/m88k/m88k_machdep.c index 9976d3be34d..f0d8fac8e0c 100644 --- a/sys/arch/m88k/m88k/m88k_machdep.c +++ b/sys/arch/m88k/m88k/m88k_machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: m88k_machdep.c,v 1.43 2008/12/21 21:43:52 miod Exp $ */ +/* $OpenBSD: m88k_machdep.c,v 1.44 2009/02/16 23:03:33 miod Exp $ */ /* * Copyright (c) 1998, 1999, 2000, 2001 Steve Murphree, Jr. * Copyright (c) 1996 Nivas Madhur @@ -390,6 +390,9 @@ dosoftint() softclock(); #ifdef MULTIPROCESSOR + if (ISSET(sir, SIR_IPI)) + softipi(); + __mp_unlock(&kernel_lock); #endif } diff --git a/sys/arch/mvme88k/include/cpu.h b/sys/arch/mvme88k/include/cpu.h index 929fb8f6a35..c386d65e2de 100644 --- a/sys/arch/mvme88k/include/cpu.h +++ b/sys/arch/mvme88k/include/cpu.h @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.h,v 1.40 2009/02/16 22:55:03 miod Exp $ */ +/* $OpenBSD: cpu.h,v 1.41 2009/02/16 23:03:33 miod Exp $ */ /* * Copyright (c) 1996 Nivas Madhur * Copyright (c) 1992, 1993 @@ -56,6 +56,7 @@ extern u_int (*md_raiseipl)(u_int); extern void (*md_init_clocks)(void); extern void (*md_send_ipi)(int, cpuid_t); extern void (*md_delay)(int); +extern void (*md_soft_ipi)(void); struct intrhand { SLIST_ENTRY(intrhand) ih_link; diff --git a/sys/arch/mvme88k/include/mvme197.h b/sys/arch/mvme88k/include/mvme197.h index 35d70652828..2f66bd88dc0 100644 --- a/sys/arch/mvme88k/include/mvme197.h +++ b/sys/arch/mvme88k/include/mvme197.h @@ -1,4 +1,4 @@ -/* $OpenBSD: mvme197.h,v 1.9 2007/12/15 19:34:35 miod Exp $ */ +/* $OpenBSD: mvme197.h,v 1.10 2009/02/16 23:03:33 miod Exp $ */ /* * Copyright (c) 1996 Nivas Madhur * Copyright (c) 1999 Steve Murphree, Jr. @@ -59,6 +59,7 @@ #define M197_IACK 0xfff00100 /* interrupt ACK base */ #ifdef _KERNEL +void m197_broadcast_complex_ipi(int, u_int32_t, u_int32_t); void m197_send_complex_ipi(int, cpuid_t, u_int32_t, u_int32_t); void m197_send_ipi(int, cpuid_t); #endif diff --git a/sys/arch/mvme88k/mvme88k/m188_machdep.c b/sys/arch/mvme88k/mvme88k/m188_machdep.c index a5294ffd3b1..8f326c3d96d 100644 --- a/sys/arch/mvme88k/mvme88k/m188_machdep.c +++ b/sys/arch/mvme88k/mvme88k/m188_machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: m188_machdep.c,v 1.47 2009/02/16 22:55:03 miod Exp $ */ +/* $OpenBSD: m188_machdep.c,v 1.48 2009/02/16 23:03:33 miod Exp $ */ /* * Copyright (c) 1998, 1999, 2000, 2001 Steve Murphree, Jr. * Copyright (c) 1996 Nivas Madhur @@ -146,6 +146,7 @@ vaddr_t m188_memsize(void); u_int m188_raiseipl(u_int); void m188_send_ipi(int, cpuid_t); u_int m188_setipl(u_int); +void m188_soft_ipi(void); void m188_startup(void); /* @@ -220,6 +221,7 @@ m188_bootstrap() md_init_clocks = m188_init_clocks; #ifdef MULTIPROCESSOR md_send_ipi = m188_send_ipi; + md_soft_ipi = m188_soft_ipi; #endif md_delay = m188_delay; @@ -429,6 +431,12 @@ m188_clock_ipi_handler(struct trapframe *eframe) statclock((struct clockframe *)eframe); } +void +m188_soft_ipi() +{ + /* this function is not used on MVME188 */ +} + #endif /* diff --git a/sys/arch/mvme88k/mvme88k/m197_machdep.c b/sys/arch/mvme88k/mvme88k/m197_machdep.c index e7bd5c123c8..450065ce4ab 100644 --- a/sys/arch/mvme88k/mvme88k/m197_machdep.c +++ b/sys/arch/mvme88k/mvme88k/m197_machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: m197_machdep.c,v 1.32 2009/02/16 22:55:03 miod Exp $ */ +/* $OpenBSD: m197_machdep.c,v 1.33 2009/02/16 23:03:33 miod Exp $ */ /* * Copyright (c) 2009 Miodrag Vallat. @@ -84,7 +84,6 @@ #endif void m197_bootstrap(void); -void m197_clock_ipi_handler(struct trapframe *); void m197_delay(int); void m197_ext_int(struct trapframe *); u_int m197_getipl(void); @@ -93,11 +92,17 @@ vaddr_t m197_memsize(void); void m197_nmi(struct trapframe *); u_int m197_raiseipl(u_int); u_int m197_setipl(u_int); +void m197_soft_ipi(void); void m197_startup(void); vaddr_t obiova; vaddr_t flashva; +#define CI_IPI_MASKABLE \ + (CI_IPI_HARDCLOCK | CI_IPI_STATCLOCK) +#define CI_IPI_COMPLEX \ + (CI_IPI_CACHE_FLUSH | CI_IPI_ICACHE_FLUSH | CI_IPI_DMA_CACHECTL) + /* * Figure out how much real memory is available. * @@ -187,9 +192,6 @@ m197_startup() void m197_ext_int(struct trapframe *eframe) { -#ifdef MULTIPROCESSOR - struct cpu_info *ci = curcpu(); -#endif u_int32_t psr; int level; struct intrhand *intr; @@ -215,16 +217,6 @@ m197_ext_int(struct trapframe *eframe) psr = get_psr(); set_psr(psr & ~PSR_IND); -#ifdef MULTIPROCESSOR - /* - * If we have pending hardware IPIs and the current - * level allows them to be processed, do them now. - */ - if (eframe->tf_mask < IPL_SCHED && - ISSET(ci->ci_ipi, CI_IPI_HARDCLOCK | CI_IPI_STATCLOCK)) - m197_clock_ipi_handler(eframe); -#endif - list = &intr_handlers[vec]; if (SLIST_EMPTY(list)) printf("Spurious interrupt (level %x and vec %x)\n", @@ -267,16 +259,21 @@ m197_ext_int(struct trapframe *eframe) #endif } +/* + * NMI handler. Invoked with interrupts disabled. + */ void m197_nmi(struct trapframe *eframe) { - u_int32_t psr; u_int8_t abort; +#if 0 + u_int32_t psr; /* block all hardware interrupts */ m197_setipl(IPL_HIGH); /* IPL_IPI? */ psr = get_psr(); set_psr(psr & ~PSR_IND); +#endif /* * Non-maskable interrupts are either the abort switch (on @@ -424,6 +421,7 @@ m197_bootstrap() md_init_clocks = m1x7_init_clocks; #ifdef MULTIPROCESSOR md_send_ipi = m197_send_ipi; + md_soft_ipi = m197_soft_ipi; md_delay = m197_delay; #else md_delay = m1x7_delay; @@ -488,6 +486,16 @@ m197_send_complex_ipi(int ipi, cpuid_t cpu, u_int32_t arg1, u_int32_t arg2) } void +m197_broadcast_complex_ipi(int ipi, u_int32_t arg1, u_int32_t arg2) +{ + /* + * This relies upon the fact that we only have two processors, + * and their cpuid are 0 and 1. + */ + m197_send_complex_ipi(ipi, 1 - curcpu()->ci_cpuid, arg1, arg2); +} + +void m197_ipi_handler(struct trapframe *eframe) { struct cpu_info *ci = curcpu(); @@ -497,9 +505,33 @@ m197_ipi_handler(struct trapframe *eframe) int need_ddb = 0; #endif - if (ipi != 0) { - atomic_clearbits_int(&ci->ci_ipi, - ipi & ~(CI_IPI_HARDCLOCK | CI_IPI_STATCLOCK)); + if (ipi == 0) + return; + + atomic_clearbits_int(&ci->ci_ipi, ipi); + + if (ipi & CI_IPI_MASKABLE) { + /* + * Even if the current spl level would allow it, we can + * not run the clock handlers from there because we would + * need to grab the kernel lock, which might already + * held by the other processor. + * + * Instead, schedule a soft interrupt. But remember the + * important fields from the exception frame first, so + * that a valid clockframe can be reconstructed from the + * soft interrupt handler (which can not get an exception + * frame). + */ + if (ipi & CI_IPI_HARDCLOCK) { + ci->ci_h_sxip = eframe->tf_sxip; + ci->ci_h_epsr = eframe->tf_epsr; + } + if (ipi & CI_IPI_STATCLOCK) { + ci->ci_s_sxip = eframe->tf_sxip; + ci->ci_s_epsr = eframe->tf_epsr; + } + setsoftipi(); } /* @@ -507,8 +539,7 @@ m197_ipi_handler(struct trapframe *eframe) * pending at the same time, sending processor will wait for us * to have processed the current one before sending a new one. */ - if (ipi & - (CI_IPI_CACHE_FLUSH | CI_IPI_ICACHE_FLUSH)) { + if (ipi & CI_IPI_COMPLEX) { arg1 = ci->ci_ipi_arg1; arg2 = ci->ci_ipi_arg2; @@ -518,6 +549,10 @@ m197_ipi_handler(struct trapframe *eframe) else if (ipi & CI_IPI_ICACHE_FLUSH) { cmmu_flush_inst_cache(ci->ci_cpuid, arg1, arg2); } + else if (ipi & CI_IPI_DMA_CACHECTL) { + dma_cachectl_local(arg1, arg2 & ~DMA_CACHE_MASK, + arg2 & DMA_CACHE_MASK); + } } /* @@ -551,9 +586,8 @@ m197_ipi_handler(struct trapframe *eframe) need_ddb = 1; #endif } - if (ipi & (CI_IPI_NOTIFY | CI_IPI_HARDCLOCK | CI_IPI_STATCLOCK)) { - /* force an AST */ - aston(ci->ci_curproc); + if (ipi & CI_IPI_NOTIFY) { + /* nothing to do! */ } #ifdef DDB @@ -566,27 +600,39 @@ m197_ipi_handler(struct trapframe *eframe) * Maskable IPIs. * * These IPIs are received as non maskable, but are not processed in - * the NMI handler; instead, they are checked again when changing - * spl level on return from regular interrupts to process them as soon - * as possible. + * the NMI handler; instead, they are processed from the soft interrupt + * handler. * * XXX This is grossly suboptimal. */ void -m197_clock_ipi_handler(struct trapframe *eframe) +m197_soft_ipi() { struct cpu_info *ci = curcpu(); - int ipi = ci->ci_ipi & (CI_IPI_HARDCLOCK | CI_IPI_STATCLOCK); + struct trapframe faketf; int s; - atomic_clearbits_int(&ci->ci_ipi, ipi); - + __mp_lock(&kernel_lock); s = splclock(); - if (ipi & CI_IPI_HARDCLOCK) - hardclock((struct clockframe *)eframe); - if (ipi & CI_IPI_STATCLOCK) - statclock((struct clockframe *)eframe); + + if (ci->ci_h_sxip != 0) { + faketf.tf_cpu = ci; + faketf.tf_sxip = ci->ci_h_sxip; + faketf.tf_epsr = ci->ci_h_epsr; + ci->ci_h_sxip = 0; + hardclock((struct clockframe *)&faketf); + } + + if (ci->ci_s_sxip != 0) { + faketf.tf_cpu = ci; + faketf.tf_sxip = ci->ci_s_sxip; + faketf.tf_epsr = ci->ci_s_epsr; + ci->ci_s_sxip = 0; + statclock((struct clockframe *)&faketf); + } + splx(s); + __mp_unlock(&kernel_lock); } /* diff --git a/sys/arch/mvme88k/mvme88k/m88110.c b/sys/arch/mvme88k/mvme88k/m88110.c index a01e2a24f95..7bfee743cd5 100644 --- a/sys/arch/mvme88k/mvme88k/m88110.c +++ b/sys/arch/mvme88k/mvme88k/m88110.c @@ -1,4 +1,4 @@ -/* $OpenBSD: m88110.c,v 1.61 2009/02/13 23:29:38 miod Exp $ */ +/* $OpenBSD: m88110.c,v 1.62 2009/02/16 23:03:33 miod Exp $ */ /* * Copyright (c) 1998 Steve Murphree, Jr. * All rights reserved. @@ -92,7 +92,9 @@ void m88410_flush_cache(cpuid_t, paddr_t, psize_t); void m88110_flush_inst_cache(cpuid_t, paddr_t, psize_t); void m88410_flush_inst_cache(cpuid_t, paddr_t, psize_t); void m88110_dma_cachectl(paddr_t, psize_t, int); +void m88110_dma_cachectl_local(paddr_t, psize_t, int); void m88410_dma_cachectl(paddr_t, psize_t, int); +void m88410_dma_cachectl_local(paddr_t, psize_t, int); void m88110_initialize_cpu(cpuid_t); void m88410_initialize_cpu(cpuid_t); @@ -113,6 +115,7 @@ struct cmmu_p cmmu88110 = { m88110_flush_inst_cache, m88110_dma_cachectl, #ifdef MULTIPROCESSOR + m88110_dma_cachectl_local, m88110_initialize_cpu, #endif }; @@ -134,6 +137,7 @@ struct cmmu_p cmmu88410 = { m88410_flush_inst_cache, m88410_dma_cachectl, #ifdef MULTIPROCESSOR + m88410_dma_cachectl_local, m88410_initialize_cpu, #endif }; @@ -660,17 +664,13 @@ m88110_dma_cachectl(paddr_t _pa, psize_t _size, int op) } void -m88410_dma_cachectl(paddr_t _pa, psize_t _size, int op) +m88410_dma_cachectl_local(paddr_t pa, psize_t size, int op) { u_int32_t psr; - paddr_t pa; - psize_t size, count; + psize_t count; void (*flusher)(paddr_t, psize_t); void (*ext_flusher)(void); - pa = trunc_cache_line(_pa); - size = round_cache_line(_pa + _size) - pa; - switch (op) { case DMA_CACHE_SYNC: #if 0 @@ -683,17 +683,12 @@ m88410_dma_cachectl(paddr_t _pa, psize_t _size, int op) ext_flusher = mc88410_sync; break; default: - if (pa != _pa || size != _size || size >= PAGE_SIZE) { - flusher = m88110_cmmu_sync_inval_cache; - ext_flusher = mc88410_sync; - } else { - flusher = m88110_cmmu_inval_cache; + flusher = m88110_cmmu_inval_cache; #ifdef notyet - ext_flusher = mc88410_inval; + ext_flusher = mc88410_inval; #else - ext_flusher = mc88410_sync; + ext_flusher = mc88410_sync; #endif - } break; } @@ -701,8 +696,6 @@ m88410_dma_cachectl(paddr_t _pa, psize_t _size, int op) set_psr(psr | PSR_IND); if (op == DMA_CACHE_SYNC) { - pa = trunc_page(_pa); - size = round_page(_pa + _size) - pa; CMMU_LOCK; while (size != 0) { m88110_cmmu_sync_cache(pa, PAGE_SIZE); @@ -729,3 +722,36 @@ m88410_dma_cachectl(paddr_t _pa, psize_t _size, int op) set_psr(psr); } + +void +m88410_dma_cachectl(paddr_t _pa, psize_t _size, int op) +{ + paddr_t pa; + psize_t size; + + if (op == DMA_CACHE_SYNC) { + pa = trunc_page(_pa); + size = round_page(_pa + _size) - pa; + } else { + pa = trunc_cache_line(_pa); + size = round_cache_line(_pa + _size) - pa; + + if (op == DMA_CACHE_INV) { + if (pa != _pa || size != _size || size >= PAGE_SIZE) + op = DMA_CACHE_SYNC_INVAL; + } + } + + m88410_dma_cachectl_local(pa, size, op); +#ifdef MULTIPROCESSOR + m197_broadcast_complex_ipi(CI_IPI_DMA_CACHECTL, pa, size | op); +#endif +} + +#ifdef MULTIPROCESSOR +void +m88110_dma_cachectl_local(paddr_t _pa, psize_t _size, int op) +{ + /* Obviously nothing to do. */ +} +#endif diff --git a/sys/arch/mvme88k/mvme88k/machdep.c b/sys/arch/mvme88k/mvme88k/machdep.c index 8629dd09631..043aceb3a5e 100644 --- a/sys/arch/mvme88k/mvme88k/machdep.c +++ b/sys/arch/mvme88k/mvme88k/machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: machdep.c,v 1.221 2009/02/16 22:55:03 miod Exp $ */ +/* $OpenBSD: machdep.c,v 1.222 2009/02/16 23:03:33 miod Exp $ */ /* * Copyright (c) 1998, 1999, 2000, 2001 Steve Murphree, Jr. * Copyright (c) 1996 Nivas Madhur @@ -133,6 +133,7 @@ u_int (*md_setipl)(u_int); u_int (*md_raiseipl)(u_int); #ifdef MULTIPROCESSOR void (*md_send_ipi)(int, cpuid_t); +void (*md_soft_ipi)(void); #endif void (*md_delay)(int) = dumb_delay; @@ -1204,6 +1205,12 @@ m88k_broadcast_ipi(int ipi) } } +void +softipi() +{ + (*md_soft_ipi)(); +} + #endif void |