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path: root/sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c
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Diffstat (limited to 'sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c')
-rw-r--r--sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c13
1 files changed, 3 insertions, 10 deletions
diff --git a/sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c b/sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c
index 744fd26c2b3..699e1829fa2 100644
--- a/sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c
+++ b/sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c
@@ -7892,22 +7892,15 @@ static int gfx_v10_0_update_gfx_clock_gating(struct amdgpu_device *adev,
static void gfx_v10_0_update_spm_vmid_internal(struct amdgpu_device *adev,
unsigned int vmid)
{
- u32 reg, data;
+ u32 data;
/* not for *_SOC15 */
- reg = SOC15_REG_OFFSET(GC, 0, mmRLC_SPM_MC_CNTL);
- if (amdgpu_sriov_is_pp_one_vf(adev))
- data = RREG32_NO_KIQ(reg);
- else
- data = RREG32_SOC15(GC, 0, mmRLC_SPM_MC_CNTL);
+ data = RREG32_SOC15_NO_KIQ(GC, 0, mmRLC_SPM_MC_CNTL);
data &= ~RLC_SPM_MC_CNTL__RLC_SPM_VMID_MASK;
data |= (vmid & RLC_SPM_MC_CNTL__RLC_SPM_VMID_MASK) << RLC_SPM_MC_CNTL__RLC_SPM_VMID__SHIFT;
- if (amdgpu_sriov_is_pp_one_vf(adev))
- WREG32_SOC15_NO_KIQ(GC, 0, mmRLC_SPM_MC_CNTL, data);
- else
- WREG32_SOC15(GC, 0, mmRLC_SPM_MC_CNTL, data);
+ WREG32_SOC15_NO_KIQ(GC, 0, mmRLC_SPM_MC_CNTL, data);
}
static void gfx_v10_0_update_spm_vmid(struct amdgpu_device *adev, unsigned int vmid)