diff options
Diffstat (limited to 'sys/dev/pci/if_bgereg.h')
| -rw-r--r-- | sys/dev/pci/if_bgereg.h | 19 |
1 files changed, 11 insertions, 8 deletions
diff --git a/sys/dev/pci/if_bgereg.h b/sys/dev/pci/if_bgereg.h index 14ce6ccc8f8..e3ef4b178c8 100644 --- a/sys/dev/pci/if_bgereg.h +++ b/sys/dev/pci/if_bgereg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: if_bgereg.h,v 1.107 2013/01/15 05:04:17 claudio Exp $ */ +/* $OpenBSD: if_bgereg.h,v 1.108 2013/01/15 23:06:11 claudio Exp $ */ /* * Copyright (c) 2001 Wind River Systems @@ -713,7 +713,7 @@ #define BGE_LEDCTL_10MBPS_LED 0x00000008 #define BGE_LEDCTL_TRAFLED_OVERRIDE 0x00000010 #define BGE_LEDCTL_TRAFLED_BLINK 0x00000020 -#define BGE_LEDCTL_TREFLED_BLINK_2 0x00000040 +#define BGE_LEDCTL_TRAFLED_BLINK_2 0x00000040 #define BGE_LEDCTL_1000MBPS_STS 0x00000080 #define BGE_LEDCTL_100MBPS_STS 0x00000100 #define BGE_LEDCTL_10MBPS_STS 0x00000200 @@ -951,8 +951,8 @@ #define BGE_MIMODE_SHORTPREAMBLE 0x00000002 #define BGE_MIMODE_AUTOPOLL 0x00000010 -#define BGE_MIMODE_500KHZ_CONST 0x00008000 #define BGE_MIMODE_CLKCNT 0x001F0000 +#define BGE_MIMODE_500KHZ_CONST 0x00008000 #define BGE_MIMODE_BASE 0x000C0000 /* @@ -1640,7 +1640,7 @@ #define BGE_WDMAMODE_ALL_ATTNS 0x000003FC #define BGE_WDMAMODE_RX_ACCEL 0x00000400 #define BGE_WDMAMODE_STATUS_TAG_FIX 0x20000000 -#define BGE_WDMAMODE_BURST_ALL_DATA 0xc0000000 +#define BGE_WDMAMODE_BURST_ALL_DATA 0xC0000000 /* Write DMA status register */ #define BGE_WDMASTAT_PCI_TGT_ABRT_ATTN 0x00000004 @@ -1708,7 +1708,6 @@ #define BGE_VCPU_EXT_CTRL_HALT_CPU 0x00400000 #define BGE_VCPU_EXT_CTRL_DISABLE_WOL 0x20000000 - /* * TX CPU registers */ @@ -1946,15 +1945,17 @@ #define BGE_MODE_CTL 0x6800 #define BGE_MISC_CFG 0x6804 #define BGE_MISC_LOCAL_CTL 0x6808 -#define BGE_CPU_EVENT 0x6810 +#define BGE_RX_CPU_EVENT 0x6810 +#define BGE_TX_CPU_EVENT 0x6820 #define BGE_EE_ADDR 0x6838 #define BGE_EE_DATA 0x683C #define BGE_EE_CTL 0x6840 #define BGE_MDI_CTL 0x6844 #define BGE_EE_DELAY 0x6848 - #define BGE_FASTBOOT_PC 0x6894 +#define BGE_RX_CPU_DRV_EVENT 0x00004000 + /* * NVRAM Control registers */ @@ -2053,9 +2054,11 @@ /* Misc. config register */ #define BGE_MISCCFG_RESET_CORE_CLOCKS 0x00000001 #define BGE_MISCCFG_TIMER_PRESCALER 0x000000FE +#define BGE_MISCCFG_BOARD_ID_MASK 0x0001E000 +#define BGE_MISCCFG_BOARD_ID_5704 0x00000000 +#define BGE_MISCCFG_BOARD_ID_5704CIOBE 0x00004000 #define BGE_MISCCFG_BOARD_ID_5788 0x00010000 #define BGE_MISCCFG_BOARD_ID_5788M 0x00018000 -#define BGE_MISCCFG_BOARD_ID_MASK 0x0001e000 #define BGE_MISCCFG_EPHY_IDDQ 0x00200000 #define BGE_MISCCFG_KEEP_GPHY_POWER 0x04000000 |