diff options
Diffstat (limited to 'sys')
| -rw-r--r-- | sys/arch/alpha/alpha/pmap.c | 4 | ||||
| -rw-r--r-- | sys/arch/amd64/amd64/cpu.c | 4 | ||||
| -rw-r--r-- | sys/arch/amd64/amd64/lapic.c | 4 | ||||
| -rw-r--r-- | sys/arch/amd64/include/pmap.h | 4 | ||||
| -rw-r--r-- | sys/arch/i386/i386/cpu.c | 4 | ||||
| -rw-r--r-- | sys/arch/i386/i386/lapic.c | 4 | ||||
| -rw-r--r-- | sys/arch/i386/i386/pmap.c | 8 | ||||
| -rw-r--r-- | sys/arch/i386/i386/pmapae.c | 6 |
8 files changed, 19 insertions, 19 deletions
diff --git a/sys/arch/alpha/alpha/pmap.c b/sys/arch/alpha/alpha/pmap.c index 48265d41a85..390e822e1fe 100644 --- a/sys/arch/alpha/alpha/pmap.c +++ b/sys/arch/alpha/alpha/pmap.c @@ -1,4 +1,4 @@ -/* $OpenBSD: pmap.c,v 1.84 2016/09/15 02:00:16 dlg Exp $ */ +/* $OpenBSD: pmap.c,v 1.85 2018/04/20 07:27:54 mlarkin Exp $ */ /* $NetBSD: pmap.c,v 1.154 2000/12/07 22:18:55 thorpej Exp $ */ /*- @@ -724,7 +724,7 @@ pmap_bootstrap(paddr_t ptaddr, u_int maxasn, u_long ncpuids) kmeminit_nkmempages(); /* - * Figure out how many PTE's are necessary to map the kernel. + * Figure out how many PTEs are necessary to map the kernel. */ lev3mapsize = (VM_PHYS_SIZE + 16 * NCARGS + PAGER_MAP_SIZE) / PAGE_SIZE + (maxthread * UPAGES) + nkmempages; diff --git a/sys/arch/amd64/amd64/cpu.c b/sys/arch/amd64/amd64/cpu.c index e2f9fc9ac79..1f8dc370a30 100644 --- a/sys/arch/amd64/amd64/cpu.c +++ b/sys/arch/amd64/amd64/cpu.c @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.c,v 1.114 2018/03/29 01:21:02 guenther Exp $ */ +/* $OpenBSD: cpu.c,v 1.115 2018/04/20 07:27:54 mlarkin Exp $ */ /* $NetBSD: cpu.c,v 1.1 2003/04/26 18:39:26 fvdl Exp $ */ /*- @@ -547,7 +547,7 @@ cpu_init(struct cpu_info *ci) #ifdef MULTIPROCESSOR ci->ci_flags |= CPUF_RUNNING; /* - * Big hammer: flush all TLB entries, including ones from PTE's + * Big hammer: flush all TLB entries, including ones from PTEs * with the G bit set. This should only be necessary if TLB * shootdown falls far behind. */ diff --git a/sys/arch/amd64/amd64/lapic.c b/sys/arch/amd64/amd64/lapic.c index 83ee4472d9f..493b783c728 100644 --- a/sys/arch/amd64/amd64/lapic.c +++ b/sys/arch/amd64/amd64/lapic.c @@ -1,4 +1,4 @@ -/* $OpenBSD: lapic.c,v 1.50 2018/02/21 19:24:15 guenther Exp $ */ +/* $OpenBSD: lapic.c,v 1.51 2018/04/20 07:27:54 mlarkin Exp $ */ /* $NetBSD: lapic.c,v 1.2 2003/05/08 01:04:35 fvdl Exp $ */ /*- @@ -214,7 +214,7 @@ lapic_map(paddr_t lapic_base) /* * Map local apic. If we have a local apic, it's safe to * assume we're on a 486 or better and can use invlpg and - * non-cacheable PTE's + * non-cacheable PTEs * * Whap the PTE "by hand" rather than calling pmap_kenter_pa * because the latter will attempt to invoke TLB shootdown diff --git a/sys/arch/amd64/include/pmap.h b/sys/arch/amd64/include/pmap.h index dc82f52be7f..5a07779d334 100644 --- a/sys/arch/amd64/include/pmap.h +++ b/sys/arch/amd64/include/pmap.h @@ -1,4 +1,4 @@ -/* $OpenBSD: pmap.h,v 1.66 2018/03/13 07:37:58 guenther Exp $ */ +/* $OpenBSD: pmap.h,v 1.67 2018/04/20 07:27:54 mlarkin Exp $ */ /* $NetBSD: pmap.h,v 1.1 2003/04/26 18:39:46 fvdl Exp $ */ /* @@ -243,7 +243,7 @@ /* PG_AVAIL3 not used */ /* - * Number of PTE's per cache line. 8 byte pte, 64-byte cache line + * Number of PTEs per cache line. 8 byte pte, 64-byte cache line * Used to avoid false sharing of cache lines. */ #define NPTECL 8 diff --git a/sys/arch/i386/i386/cpu.c b/sys/arch/i386/i386/cpu.c index 54e4395f6f3..48527ddd8a3 100644 --- a/sys/arch/i386/i386/cpu.c +++ b/sys/arch/i386/i386/cpu.c @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.c,v 1.89 2018/04/11 15:44:08 bluhm Exp $ */ +/* $OpenBSD: cpu.c,v 1.90 2018/04/20 07:27:54 mlarkin Exp $ */ /* $NetBSD: cpu.c,v 1.1.2.7 2000/06/26 02:04:05 sommerfeld Exp $ */ /*- @@ -432,7 +432,7 @@ cpu_init(struct cpu_info *ci) #ifdef MULTIPROCESSOR ci->ci_flags |= CPUF_RUNNING; /* - * Big hammer: flush all TLB entries, including ones from PTE's + * Big hammer: flush all TLB entries, including ones from PTEs * with the G bit set. This should only be necessary if TLB * shootdown falls far behind. * diff --git a/sys/arch/i386/i386/lapic.c b/sys/arch/i386/i386/lapic.c index 631707b42fd..6bcf61c3c73 100644 --- a/sys/arch/i386/i386/lapic.c +++ b/sys/arch/i386/i386/lapic.c @@ -1,4 +1,4 @@ -/* $OpenBSD: lapic.c,v 1.45 2018/04/11 15:44:08 bluhm Exp $ */ +/* $OpenBSD: lapic.c,v 1.46 2018/04/20 07:27:54 mlarkin Exp $ */ /* $NetBSD: lapic.c,v 1.1.2.8 2000/02/23 06:10:50 sommerfeld Exp $ */ /*- @@ -85,7 +85,7 @@ lapic_map(paddr_t lapic_base) /* * Map local apic. If we have a local apic, it's safe to assume - * we're on a 486 or better and can use invlpg and non-cacheable PTE's + * we're on a 486 or better and can use invlpg and non-cacheable PTEs * * Whap the PTE "by hand" rather than calling pmap_kenter_pa because * the latter will attempt to invoke TLB shootdown code just as we diff --git a/sys/arch/i386/i386/pmap.c b/sys/arch/i386/i386/pmap.c index ba1dcf0c1e9..340bc4fd789 100644 --- a/sys/arch/i386/i386/pmap.c +++ b/sys/arch/i386/i386/pmap.c @@ -1,4 +1,4 @@ -/* $OpenBSD: pmap.c,v 1.200 2018/04/11 15:44:08 bluhm Exp $ */ +/* $OpenBSD: pmap.c,v 1.201 2018/04/20 07:27:54 mlarkin Exp $ */ /* $NetBSD: pmap.c,v 1.91 2000/06/02 17:46:37 thorpej Exp $ */ /* @@ -393,8 +393,8 @@ uint32_t protection_codes[8]; /* maps MI prot to i386 prot code */ boolean_t pmap_initialized = FALSE; /* pmap_init done yet? */ /* - * MULTIPROCESSOR: special VA's/ PTE's are actually allocated inside a - * MAXCPUS*NPTECL array of PTE's, to avoid cache line thrashing + * MULTIPROCESSOR: special VAs/ PTEs are actually allocated inside a + * MAXCPUS*NPTECL array of PTEs, to avoid cache line thrashing * due to false sharing. */ @@ -974,7 +974,7 @@ pmap_bootstrap(vaddr_t kva_start) /* * Waste some VA space to avoid false sharing of cache lines * for page table pages: Give each possible CPU a cache line - * of PTE's (16) to play with, though we only need 4. We could + * of PTEs (16) to play with, though we only need 4. We could * recycle some of this waste by putting the idle stacks here * as well; we could waste less space if we knew the largest * CPU ID beforehand. diff --git a/sys/arch/i386/i386/pmapae.c b/sys/arch/i386/i386/pmapae.c index 8387ce88f8b..5f076400690 100644 --- a/sys/arch/i386/i386/pmapae.c +++ b/sys/arch/i386/i386/pmapae.c @@ -1,4 +1,4 @@ -/* $OpenBSD: pmapae.c,v 1.53 2018/04/11 15:44:08 bluhm Exp $ */ +/* $OpenBSD: pmapae.c,v 1.54 2018/04/20 07:27:54 mlarkin Exp $ */ /* * Copyright (c) 2006-2008 Michael Shalayeff @@ -433,8 +433,8 @@ extern vaddr_t kernel_text, etext, __rodata_start, erodata, __data_start; extern vaddr_t edata, __bss_start, end, ssym, esym, PTmap; /* - * MULTIPROCESSOR: special VA's/ PTE's are actually allocated inside a - * MAXCPUS*NPTECL array of PTE's, to avoid cache line thrashing + * MULTIPROCESSOR: special VAs/ PTEs are actually allocated inside a + * MAXCPUS*NPTECL array of PTEs, to avoid cache line thrashing * due to false sharing. */ |