diff options
Diffstat (limited to 'sys')
| -rw-r--r-- | sys/dev/pci/if_oce.c | 4 | ||||
| -rw-r--r-- | sys/dev/pci/oce.c | 34 | ||||
| -rw-r--r-- | sys/dev/pci/ocereg.h | 4 | ||||
| -rw-r--r-- | sys/dev/pci/ocevar.h | 4 |
4 files changed, 24 insertions, 22 deletions
diff --git a/sys/dev/pci/if_oce.c b/sys/dev/pci/if_oce.c index b0a1405a57e..d183c3d4565 100644 --- a/sys/dev/pci/if_oce.c +++ b/sys/dev/pci/if_oce.c @@ -1,4 +1,4 @@ -/* $OpenBSD: if_oce.c,v 1.28 2012/10/26 17:56:24 mikeb Exp $ */ +/* $OpenBSD: if_oce.c,v 1.29 2012/10/26 18:05:50 mikeb Exp $ */ /* * Copyright (c) 2012 Mike Belopuhov @@ -546,7 +546,7 @@ oce_pci_alloc(struct oce_softc *sc) if (OCE_SLI_IFTYPE(reg) == OCE_INTF_IF_TYPE_1) sc->flags |= OCE_FLAGS_MBOX_ENDIAN_RQD; if (OCE_SLI_HINT1(reg) == OCE_INTF_FUNC_RESET_REQD) - sc->flags |= OCE_FLAGS_FUNCRESET_RQD; + sc->flags |= OCE_FLAGS_RESET_RQD; if (OCE_SLI_FUNCTION(reg) == OCE_INTF_VIRT_FUNC) sc->flags |= OCE_FLAGS_VIRTUAL_PORT; diff --git a/sys/dev/pci/oce.c b/sys/dev/pci/oce.c index 6ce4bd3278a..5276b7c54d5 100644 --- a/sys/dev/pci/oce.c +++ b/sys/dev/pci/oce.c @@ -1,4 +1,4 @@ -/* $OpenBSD: oce.c,v 1.16 2012/10/26 17:56:24 mikeb Exp $ */ +/* $OpenBSD: oce.c,v 1.17 2012/10/26 18:05:50 mikeb Exp $ */ /* * Copyright (c) 2012 Mike Belopuhov @@ -118,17 +118,16 @@ int oce_init_fw(struct oce_softc *sc) { struct ioctl_common_function_reset fwcmd; - mpu_ep_semaphore_t post_status; - int tmo = 60000; - int err = 0; + uint32_t reg; + int err = 0, tmo = 60000; /* read semaphore CSR */ - post_status.dw0 = OCE_READ_REG32(sc, csr, MPU_EP_SEMAPHORE(sc)); + reg = OCE_READ_REG32(sc, csr, MPU_EP_SEMAPHORE(sc)); /* if host is ready then wait for fw ready else send POST */ - if (post_status.bits.stage <= POST_STAGE_AWAITING_HOST_RDY) { - post_status.bits.stage = POST_STAGE_CHIP_RESET; - OCE_WRITE_REG32(sc, csr, MPU_EP_SEMAPHORE(sc), post_status.dw0); + if ((reg & MPU_EP_SEM_STAGE_MASK) <= POST_STAGE_AWAITING_HOST_RDY) { + reg = (reg & ~MPU_EP_SEM_STAGE_MASK) | POST_STAGE_CHIP_RESET; + OCE_WRITE_REG32(sc, csr, MPU_EP_SEMAPHORE(sc), reg); } /* wait for FW to become ready */ @@ -138,25 +137,26 @@ oce_init_fw(struct oce_softc *sc) DELAY(1000); - post_status.dw0 = OCE_READ_REG32(sc, csr, MPU_EP_SEMAPHORE(sc)); - if (post_status.bits.error) { - printf(": POST failed: %x\n", post_status.dw0); - return ENXIO; + reg = OCE_READ_REG32(sc, csr, MPU_EP_SEMAPHORE(sc)); + if (reg & MPU_EP_SEM_ERROR) { + printf(": POST failed: %#x\n", reg); + return (ENXIO); } - if (post_status.bits.stage == POST_STAGE_ARMFW_READY) { + if ((reg & MPU_EP_SEM_STAGE_MASK) == POST_STAGE_ARMFW_READY) { /* reset FW */ - bzero(&fwcmd, sizeof(fwcmd)); - if (sc->flags & OCE_FLAGS_FUNCRESET_RQD) + if (sc->flags & OCE_FLAGS_RESET_RQD) { + bzero(&fwcmd, sizeof(fwcmd)); err = oce_fw(sc, MBX_SUBSYSTEM_COMMON, OPCODE_COMMON_FUNCTION_RESET, OCE_MBX_VER_V0, &fwcmd, sizeof(fwcmd)); + } return (err); } } - printf(": POST timed out: %x\n", post_status.dw0); + printf(": POST timed out: %#x\n", reg); - return ENXIO; + return (ENXIO); } /** diff --git a/sys/dev/pci/ocereg.h b/sys/dev/pci/ocereg.h index fd34ae8c131..0761574b0b1 100644 --- a/sys/dev/pci/ocereg.h +++ b/sys/dev/pci/ocereg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: ocereg.h,v 1.9 2012/10/26 17:56:24 mikeb Exp $ */ +/* $OpenBSD: ocereg.h,v 1.10 2012/10/26 18:05:50 mikeb Exp $ */ /*- * Copyright (C) 2012 Emulex @@ -51,6 +51,8 @@ #define MPU_EP_SEMAPHORE_XE201 0x400 #define MPU_EP_SEMAPHORE(sc) \ ((IS_BE(sc)) ? MPU_EP_SEMAPHORE_BE3 : MPU_EP_SEMAPHORE_XE201) +#define MPU_EP_SEM_STAGE_MASK 0xffff +#define MPU_EP_SEM_ERROR (1<<31) #define PCI_INTR_CTRL 0xfc #define HOSTINTR_MASK (1<<29) diff --git a/sys/dev/pci/ocevar.h b/sys/dev/pci/ocevar.h index 41af4a07c99..dcee5cc7e65 100644 --- a/sys/dev/pci/ocevar.h +++ b/sys/dev/pci/ocevar.h @@ -1,4 +1,4 @@ -/* $OpenBSD: ocevar.h,v 1.17 2012/10/26 17:56:24 mikeb Exp $ */ +/* $OpenBSD: ocevar.h,v 1.18 2012/10/26 18:05:50 mikeb Exp $ */ /*- * Copyright (C) 2012 Emulex @@ -532,7 +532,7 @@ struct link_status { #define OCE_FLAGS_MSIX_CAPABLE 0x00000008 #define OCE_FLAGS_USING_MSI 0x00000010 #define OCE_FLAGS_USING_MSIX 0x00000020 -#define OCE_FLAGS_FUNCRESET_RQD 0x00000040 +#define OCE_FLAGS_RESET_RQD 0x00000040 #define OCE_FLAGS_VIRTUAL_PORT 0x00000080 #define OCE_FLAGS_MBOX_ENDIAN_RQD 0x00000100 #define OCE_FLAGS_BE3 0x00000200 |